1/*
2 * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier:	GPL-2.0+
5 */
6
7#include "config.h"
8
9#ifdef CONFIG_RESET_VECTOR_ADDRESS
10#define RESET_VECTOR_ADDRESS	CONFIG_RESET_VECTOR_ADDRESS
11#else
12#define RESET_VECTOR_ADDRESS	0xfffffffc
13#endif
14
15#ifndef CONFIG_SYS_MONITOR_LEN
16#define CONFIG_SYS_MONITOR_LEN	0x80000
17#endif
18
19OUTPUT_ARCH(powerpc)
20ENTRY(_start_e500)
21
22PHDRS
23{
24  text PT_LOAD;
25  bss PT_LOAD;
26}
27
28SECTIONS
29{
30  /* Read-only sections, merged into text segment: */
31  . = + SIZEOF_HEADERS;
32  .interp : { *(.interp) }
33  .text      :
34  {
35    *(.text*)
36   } :text
37    _etext = .;
38    PROVIDE (etext = .);
39    .rodata    :
40   {
41    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
42  } :text
43
44  /* Read-write section, merged into data segment: */
45  . = (. + 0x00FF) & 0xFFFFFF00;
46  _erotext = .;
47  PROVIDE (erotext = .);
48  .reloc   :
49  {
50    _GOT2_TABLE_ = .;
51    KEEP(*(.got2))
52    KEEP(*(.got))
53    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
54    _FIXUP_TABLE_ = .;
55    KEEP(*(.fixup))
56  }
57  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
58  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
59
60  .data    :
61  {
62    *(.data*)
63    *(.sdata*)
64  }
65  _edata  =  .;
66  PROVIDE (edata = .);
67
68  . = .;
69
70  . = ALIGN(4);
71  .u_boot_list : {
72	KEEP(*(SORT(.u_boot_list*)));
73  }
74
75  . = .;
76  __start___ex_table = .;
77  __ex_table : { *(__ex_table) }
78  __stop___ex_table = .;
79
80  . = ALIGN(256);
81  __init_begin = .;
82  .text.init : { *(.text.init) }
83  .data.init : { *(.data.init) }
84  . = ALIGN(256);
85  __init_end = .;
86
87#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
88  .bootpg ADDR(.text) - 0x1000 :
89  {
90    KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
91  } :text = 0xffff
92  . = ADDR(.text) + CONFIG_SYS_MONITOR_LEN;
93#else
94  .bootpg RESET_VECTOR_ADDRESS - 0xffc :
95  {
96    arch/powerpc/cpu/mpc85xx/start.o	(.bootpg)
97  } :text = 0xffff
98
99  .resetvec RESET_VECTOR_ADDRESS :
100  {
101    KEEP(*(.resetvec))
102  } :text = 0xffff
103
104  . = RESET_VECTOR_ADDRESS + 0x4;
105
106  /*
107   * Make sure that the bss segment isn't linked at 0x0, otherwise its
108   * address won't be updated during relocation fixups.  Note that
109   * this is a temporary fix.  Code to dynamically the fixup the bss
110   * location will be added in the future.  When the bss relocation
111   * fixup code is present this workaround should be removed.
112   */
113#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
114  . |= 0x10;
115#endif
116#endif
117
118  __bss_start = .;
119  .bss (NOLOAD)       :
120  {
121   *(.sbss*)
122   *(.bss*)
123   *(COMMON)
124  } :bss
125
126  . = ALIGN(4);
127  __bss_end = . ;
128  PROVIDE (end = .);
129}
130