1/*
2 * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier:	GPL-2.0+
5 */
6
7#include "config.h"
8
9#ifdef CONFIG_RESET_VECTOR_ADDRESS
10#define RESET_VECTOR_ADDRESS	CONFIG_RESET_VECTOR_ADDRESS
11#else
12#define RESET_VECTOR_ADDRESS	0xfffffffc
13#endif
14
15#ifndef CONFIG_SYS_MONITOR_LEN
16#define CONFIG_SYS_MONITOR_LEN	0x80000
17#endif
18
19OUTPUT_ARCH(powerpc)
20ENTRY(_start_e500)
21
22PHDRS
23{
24  text PT_LOAD;
25  bss PT_LOAD;
26}
27
28SECTIONS
29{
30  /* Read-only sections, merged into text segment: */
31  . = + SIZEOF_HEADERS;
32  .interp : { *(.interp) }
33  .text      :
34  {
35    *(.text*)
36   } :text
37    _etext = .;
38    PROVIDE (etext = .);
39    .rodata    :
40   {
41    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
42  } :text
43
44  /* Read-write section, merged into data segment: */
45  . = (. + 0x00FF) & 0xFFFFFF00;
46  _erotext = .;
47  PROVIDE (erotext = .);
48  .reloc   :
49  {
50    _GOT2_TABLE_ = .;
51    KEEP(*(.got2))
52    KEEP(*(.got))
53    _FIXUP_TABLE_ = .;
54    KEEP(*(.fixup))
55  }
56  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
57  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
58
59  .data    :
60  {
61    *(.data*)
62    *(.sdata*)
63  }
64  _edata  =  .;
65  PROVIDE (edata = .);
66
67  . = .;
68
69  . = ALIGN(4);
70  .u_boot_list : {
71	KEEP(*(SORT(.u_boot_list*)));
72  }
73
74  . = .;
75  __start___ex_table = .;
76  __ex_table : { *(__ex_table) }
77  __stop___ex_table = .;
78
79  . = ALIGN(256);
80  __init_begin = .;
81  .text.init : { *(.text.init) }
82  .data.init : { *(.data.init) }
83  . = ALIGN(256);
84  __init_end = .;
85
86#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
87  .bootpg ADDR(.text) - 0x1000 :
88  {
89    KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
90  } :text = 0xffff
91  . = ADDR(.text) + CONFIG_SYS_MONITOR_LEN;
92#else
93  .bootpg RESET_VECTOR_ADDRESS - 0xffc :
94  {
95    arch/powerpc/cpu/mpc85xx/start.o	(.bootpg)
96  } :text = 0xffff
97
98  .resetvec RESET_VECTOR_ADDRESS :
99  {
100    KEEP(*(.resetvec))
101  } :text = 0xffff
102
103  . = RESET_VECTOR_ADDRESS + 0x4;
104
105  /*
106   * Make sure that the bss segment isn't linked at 0x0, otherwise its
107   * address won't be updated during relocation fixups.  Note that
108   * this is a temporary fix.  Code to dynamically the fixup the bss
109   * location will be added in the future.  When the bss relocation
110   * fixup code is present this workaround should be removed.
111   */
112#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
113  . |= 0x10;
114#endif
115#endif
116
117  __bss_start = .;
118  .bss (NOLOAD)       :
119  {
120   *(.sbss*)
121   *(.bss*)
122   *(COMMON)
123  } :bss
124
125  . = ALIGN(4);
126  __bss_end = . ;
127  PROVIDE (end = .);
128}
129