1a47a12beSStefan Roese/*
27a577fdaSKumar Gala * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
3a47a12beSStefan Roese *
41a459660SWolfgang Denk * SPDX-License-Identifier:	GPL-2.0+
5a47a12beSStefan Roese */
6a47a12beSStefan Roese
77a577fdaSKumar Gala#include "config.h"	/* CONFIG_BOARDDIR */
87a577fdaSKumar Gala
97a577fdaSKumar Gala#ifdef CONFIG_RESET_VECTOR_ADDRESS
107a577fdaSKumar Gala#define RESET_VECTOR_ADDRESS	CONFIG_RESET_VECTOR_ADDRESS
117a577fdaSKumar Gala#else
12a47a12beSStefan Roese#define RESET_VECTOR_ADDRESS	0xfffffffc
13a47a12beSStefan Roese#endif
14a47a12beSStefan Roese
15a47a12beSStefan RoeseOUTPUT_ARCH(powerpc)
16*fd96ea4dSAlexander GrafENTRY(_start_e500)
17fbe53f59SPeter Tyser
18a47a12beSStefan RoesePHDRS
19a47a12beSStefan Roese{
20a47a12beSStefan Roese  text PT_LOAD;
21a47a12beSStefan Roese  bss PT_LOAD;
22a47a12beSStefan Roese}
23a47a12beSStefan Roese
24a47a12beSStefan RoeseSECTIONS
25a47a12beSStefan Roese{
26a47a12beSStefan Roese  /* Read-only sections, merged into text segment: */
27a47a12beSStefan Roese  . = + SIZEOF_HEADERS;
28a47a12beSStefan Roese  .interp : { *(.interp) }
29a47a12beSStefan Roese  .text      :
30a47a12beSStefan Roese  {
31fbe53f59SPeter Tyser    *(.text*)
32a47a12beSStefan Roese   } :text
33a47a12beSStefan Roese    _etext = .;
34a47a12beSStefan Roese    PROVIDE (etext = .);
35a47a12beSStefan Roese    .rodata    :
36a47a12beSStefan Roese   {
37a47a12beSStefan Roese    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
38a47a12beSStefan Roese  } :text
39a47a12beSStefan Roese
40a47a12beSStefan Roese  /* Read-write section, merged into data segment: */
41a47a12beSStefan Roese  . = (. + 0x00FF) & 0xFFFFFF00;
42a47a12beSStefan Roese  _erotext = .;
43a47a12beSStefan Roese  PROVIDE (erotext = .);
44a47a12beSStefan Roese  .reloc   :
45a47a12beSStefan Roese  {
46a47a12beSStefan Roese    _GOT2_TABLE_ = .;
47fbe53f59SPeter Tyser    KEEP(*(.got2))
48337f5f50SJoakim Tjernlund    KEEP(*(.got))
49337f5f50SJoakim Tjernlund    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
50a47a12beSStefan Roese    _FIXUP_TABLE_ = .;
51fbe53f59SPeter Tyser    KEEP(*(.fixup))
52a47a12beSStefan Roese  }
53337f5f50SJoakim Tjernlund  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
54a47a12beSStefan Roese  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
55a47a12beSStefan Roese
56a47a12beSStefan Roese  .data    :
57a47a12beSStefan Roese  {
58fbe53f59SPeter Tyser    *(.data*)
59fbe53f59SPeter Tyser    *(.sdata*)
60a47a12beSStefan Roese  }
61a47a12beSStefan Roese  _edata  =  .;
62a47a12beSStefan Roese  PROVIDE (edata = .);
63a47a12beSStefan Roese
64a47a12beSStefan Roese  . = .;
65a47a12beSStefan Roese
6655675142SMarek Vasut  . = ALIGN(4);
6755675142SMarek Vasut  .u_boot_list : {
68ef123c52SAlbert ARIBAUD	KEEP(*(SORT(.u_boot_list*)));
6955675142SMarek Vasut  }
7055675142SMarek Vasut
71a47a12beSStefan Roese  . = .;
72a47a12beSStefan Roese  __start___ex_table = .;
73a47a12beSStefan Roese  __ex_table : { *(__ex_table) }
74a47a12beSStefan Roese  __stop___ex_table = .;
75a47a12beSStefan Roese
76a47a12beSStefan Roese  . = ALIGN(256);
77a47a12beSStefan Roese  __init_begin = .;
78a47a12beSStefan Roese  .text.init : { *(.text.init) }
79a47a12beSStefan Roese  .data.init : { *(.data.init) }
80a47a12beSStefan Roese  . = ALIGN(256);
81a47a12beSStefan Roese  __init_end = .;
82a47a12beSStefan Roese
835df572f0SYing Zhang#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
845df572f0SYing Zhang  .bootpg ADDR(.text) - 0x1000 :
855df572f0SYing Zhang  {
865df572f0SYing Zhang    KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
875df572f0SYing Zhang  } :text = 0xffff
885df572f0SYing Zhang  . = ADDR(.text) + 0x80000;
895df572f0SYing Zhang#else
90a47a12beSStefan Roese  .bootpg RESET_VECTOR_ADDRESS - 0xffc :
91a47a12beSStefan Roese  {
92a47a12beSStefan Roese    arch/powerpc/cpu/mpc85xx/start.o	(.bootpg)
93a47a12beSStefan Roese  } :text = 0xffff
94a47a12beSStefan Roese
95a47a12beSStefan Roese  .resetvec RESET_VECTOR_ADDRESS :
96a47a12beSStefan Roese  {
97fbe53f59SPeter Tyser    KEEP(*(.resetvec))
98a47a12beSStefan Roese  } :text = 0xffff
99a47a12beSStefan Roese
100a47a12beSStefan Roese  . = RESET_VECTOR_ADDRESS + 0x4;
101a47a12beSStefan Roese
102a47a12beSStefan Roese  /*
103a47a12beSStefan Roese   * Make sure that the bss segment isn't linked at 0x0, otherwise its
104a47a12beSStefan Roese   * address won't be updated during relocation fixups.  Note that
105a47a12beSStefan Roese   * this is a temporary fix.  Code to dynamically the fixup the bss
106a47a12beSStefan Roese   * location will be added in the future.  When the bss relocation
107a47a12beSStefan Roese   * fixup code is present this workaround should be removed.
108a47a12beSStefan Roese   */
109a47a12beSStefan Roese#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
110a47a12beSStefan Roese  . |= 0x10;
111a47a12beSStefan Roese#endif
1125df572f0SYing Zhang#endif
113a47a12beSStefan Roese
114a47a12beSStefan Roese  __bss_start = .;
115a47a12beSStefan Roese  .bss (NOLOAD)       :
116a47a12beSStefan Roese  {
117fbe53f59SPeter Tyser   *(.sbss*)
118fbe53f59SPeter Tyser   *(.bss*)
119a47a12beSStefan Roese   *(COMMON)
120a47a12beSStefan Roese  } :bss
121a47a12beSStefan Roese
122a47a12beSStefan Roese  . = ALIGN(4);
1233929fb0aSSimon Glass  __bss_end = . ;
124a47a12beSStefan Roese  PROVIDE (end = .);
125a47a12beSStefan Roese}
126