1a47a12beSStefan Roese/* 27a577fdaSKumar Gala * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc. 3a47a12beSStefan Roese * 41a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 5a47a12beSStefan Roese */ 6a47a12beSStefan Roese 7*6f2ed0e9SMasahiro Yamada#include "config.h" 87a577fdaSKumar Gala 97a577fdaSKumar Gala#ifdef CONFIG_RESET_VECTOR_ADDRESS 107a577fdaSKumar Gala#define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS 117a577fdaSKumar Gala#else 12a47a12beSStefan Roese#define RESET_VECTOR_ADDRESS 0xfffffffc 13a47a12beSStefan Roese#endif 14a47a12beSStefan Roese 150938b609SPrabhakar Kushwaha#ifndef CONFIG_SYS_MONITOR_LEN 160938b609SPrabhakar Kushwaha#define CONFIG_SYS_MONITOR_LEN 0x80000 170938b609SPrabhakar Kushwaha#endif 180938b609SPrabhakar Kushwaha 19a47a12beSStefan RoeseOUTPUT_ARCH(powerpc) 20fd96ea4dSAlexander GrafENTRY(_start_e500) 21fbe53f59SPeter Tyser 22a47a12beSStefan RoesePHDRS 23a47a12beSStefan Roese{ 24a47a12beSStefan Roese text PT_LOAD; 25a47a12beSStefan Roese bss PT_LOAD; 26a47a12beSStefan Roese} 27a47a12beSStefan Roese 28a47a12beSStefan RoeseSECTIONS 29a47a12beSStefan Roese{ 30a47a12beSStefan Roese /* Read-only sections, merged into text segment: */ 31a47a12beSStefan Roese . = + SIZEOF_HEADERS; 32a47a12beSStefan Roese .interp : { *(.interp) } 33a47a12beSStefan Roese .text : 34a47a12beSStefan Roese { 35fbe53f59SPeter Tyser *(.text*) 36a47a12beSStefan Roese } :text 37a47a12beSStefan Roese _etext = .; 38a47a12beSStefan Roese PROVIDE (etext = .); 39a47a12beSStefan Roese .rodata : 40a47a12beSStefan Roese { 41a47a12beSStefan Roese *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) 42a47a12beSStefan Roese } :text 43a47a12beSStefan Roese 44a47a12beSStefan Roese /* Read-write section, merged into data segment: */ 45a47a12beSStefan Roese . = (. + 0x00FF) & 0xFFFFFF00; 46a47a12beSStefan Roese _erotext = .; 47a47a12beSStefan Roese PROVIDE (erotext = .); 48a47a12beSStefan Roese .reloc : 49a47a12beSStefan Roese { 50a47a12beSStefan Roese _GOT2_TABLE_ = .; 51fbe53f59SPeter Tyser KEEP(*(.got2)) 52337f5f50SJoakim Tjernlund KEEP(*(.got)) 53337f5f50SJoakim Tjernlund PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); 54a47a12beSStefan Roese _FIXUP_TABLE_ = .; 55fbe53f59SPeter Tyser KEEP(*(.fixup)) 56a47a12beSStefan Roese } 57337f5f50SJoakim Tjernlund __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; 58a47a12beSStefan Roese __fixup_entries = (. - _FIXUP_TABLE_) >> 2; 59a47a12beSStefan Roese 60a47a12beSStefan Roese .data : 61a47a12beSStefan Roese { 62fbe53f59SPeter Tyser *(.data*) 63fbe53f59SPeter Tyser *(.sdata*) 64a47a12beSStefan Roese } 65a47a12beSStefan Roese _edata = .; 66a47a12beSStefan Roese PROVIDE (edata = .); 67a47a12beSStefan Roese 68a47a12beSStefan Roese . = .; 69a47a12beSStefan Roese 7055675142SMarek Vasut . = ALIGN(4); 7155675142SMarek Vasut .u_boot_list : { 72ef123c52SAlbert ARIBAUD KEEP(*(SORT(.u_boot_list*))); 7355675142SMarek Vasut } 7455675142SMarek Vasut 75a47a12beSStefan Roese . = .; 76a47a12beSStefan Roese __start___ex_table = .; 77a47a12beSStefan Roese __ex_table : { *(__ex_table) } 78a47a12beSStefan Roese __stop___ex_table = .; 79a47a12beSStefan Roese 80a47a12beSStefan Roese . = ALIGN(256); 81a47a12beSStefan Roese __init_begin = .; 82a47a12beSStefan Roese .text.init : { *(.text.init) } 83a47a12beSStefan Roese .data.init : { *(.data.init) } 84a47a12beSStefan Roese . = ALIGN(256); 85a47a12beSStefan Roese __init_end = .; 86a47a12beSStefan Roese 875df572f0SYing Zhang#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC 885df572f0SYing Zhang .bootpg ADDR(.text) - 0x1000 : 895df572f0SYing Zhang { 905df572f0SYing Zhang KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg)) 915df572f0SYing Zhang } :text = 0xffff 920938b609SPrabhakar Kushwaha . = ADDR(.text) + CONFIG_SYS_MONITOR_LEN; 935df572f0SYing Zhang#else 94a47a12beSStefan Roese .bootpg RESET_VECTOR_ADDRESS - 0xffc : 95a47a12beSStefan Roese { 96a47a12beSStefan Roese arch/powerpc/cpu/mpc85xx/start.o (.bootpg) 97a47a12beSStefan Roese } :text = 0xffff 98a47a12beSStefan Roese 99a47a12beSStefan Roese .resetvec RESET_VECTOR_ADDRESS : 100a47a12beSStefan Roese { 101fbe53f59SPeter Tyser KEEP(*(.resetvec)) 102a47a12beSStefan Roese } :text = 0xffff 103a47a12beSStefan Roese 104a47a12beSStefan Roese . = RESET_VECTOR_ADDRESS + 0x4; 105a47a12beSStefan Roese 106a47a12beSStefan Roese /* 107a47a12beSStefan Roese * Make sure that the bss segment isn't linked at 0x0, otherwise its 108a47a12beSStefan Roese * address won't be updated during relocation fixups. Note that 109a47a12beSStefan Roese * this is a temporary fix. Code to dynamically the fixup the bss 110a47a12beSStefan Roese * location will be added in the future. When the bss relocation 111a47a12beSStefan Roese * fixup code is present this workaround should be removed. 112a47a12beSStefan Roese */ 113a47a12beSStefan Roese#if (RESET_VECTOR_ADDRESS == 0xfffffffc) 114a47a12beSStefan Roese . |= 0x10; 115a47a12beSStefan Roese#endif 1165df572f0SYing Zhang#endif 117a47a12beSStefan Roese 118a47a12beSStefan Roese __bss_start = .; 119a47a12beSStefan Roese .bss (NOLOAD) : 120a47a12beSStefan Roese { 121fbe53f59SPeter Tyser *(.sbss*) 122fbe53f59SPeter Tyser *(.bss*) 123a47a12beSStefan Roese *(COMMON) 124a47a12beSStefan Roese } :bss 125a47a12beSStefan Roese 126a47a12beSStefan Roese . = ALIGN(4); 1273929fb0aSSimon Glass __bss_end = . ; 128a47a12beSStefan Roese PROVIDE (end = .); 129a47a12beSStefan Roese} 130