183d290c5STom Rini/* SPDX-License-Identifier: GPL-2.0+ */
2a47a12beSStefan Roese/*
37a577fdaSKumar Gala * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
4a47a12beSStefan Roese */
5a47a12beSStefan Roese
66f2ed0e9SMasahiro Yamada#include "config.h"
77a577fdaSKumar Gala
87a577fdaSKumar Gala#ifdef CONFIG_RESET_VECTOR_ADDRESS
97a577fdaSKumar Gala#define RESET_VECTOR_ADDRESS	CONFIG_RESET_VECTOR_ADDRESS
107a577fdaSKumar Gala#else
11a47a12beSStefan Roese#define RESET_VECTOR_ADDRESS	0xfffffffc
12a47a12beSStefan Roese#endif
13a47a12beSStefan Roese
140938b609SPrabhakar Kushwaha#ifndef CONFIG_SYS_MONITOR_LEN
150938b609SPrabhakar Kushwaha#define CONFIG_SYS_MONITOR_LEN	0x80000
160938b609SPrabhakar Kushwaha#endif
170938b609SPrabhakar Kushwaha
18a47a12beSStefan RoeseOUTPUT_ARCH(powerpc)
19fd96ea4dSAlexander GrafENTRY(_start_e500)
20fbe53f59SPeter Tyser
21a47a12beSStefan RoesePHDRS
22a47a12beSStefan Roese{
23a47a12beSStefan Roese  text PT_LOAD;
24a47a12beSStefan Roese  bss PT_LOAD;
25a47a12beSStefan Roese}
26a47a12beSStefan Roese
27a47a12beSStefan RoeseSECTIONS
28a47a12beSStefan Roese{
29a47a12beSStefan Roese  /* Read-only sections, merged into text segment: */
30a47a12beSStefan Roese  . = + SIZEOF_HEADERS;
31a47a12beSStefan Roese  .interp : { *(.interp) }
32a47a12beSStefan Roese  .text      :
33a47a12beSStefan Roese  {
34fbe53f59SPeter Tyser    *(.text*)
35a47a12beSStefan Roese   } :text
36a47a12beSStefan Roese    _etext = .;
37a47a12beSStefan Roese    PROVIDE (etext = .);
38a47a12beSStefan Roese    .rodata    :
39a47a12beSStefan Roese   {
40a47a12beSStefan Roese    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
41a47a12beSStefan Roese  } :text
42a47a12beSStefan Roese
43a47a12beSStefan Roese  /* Read-write section, merged into data segment: */
44a47a12beSStefan Roese  . = (. + 0x00FF) & 0xFFFFFF00;
45a47a12beSStefan Roese  _erotext = .;
46a47a12beSStefan Roese  PROVIDE (erotext = .);
47a47a12beSStefan Roese  .reloc   :
48a47a12beSStefan Roese  {
49a47a12beSStefan Roese    _GOT2_TABLE_ = .;
50fbe53f59SPeter Tyser    KEEP(*(.got2))
51337f5f50SJoakim Tjernlund    KEEP(*(.got))
52a47a12beSStefan Roese    _FIXUP_TABLE_ = .;
53fbe53f59SPeter Tyser    KEEP(*(.fixup))
54a47a12beSStefan Roese  }
55337f5f50SJoakim Tjernlund  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
56a47a12beSStefan Roese  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
57a47a12beSStefan Roese
58a47a12beSStefan Roese  .data    :
59a47a12beSStefan Roese  {
60fbe53f59SPeter Tyser    *(.data*)
61fbe53f59SPeter Tyser    *(.sdata*)
62a47a12beSStefan Roese  }
63a47a12beSStefan Roese  _edata  =  .;
64a47a12beSStefan Roese  PROVIDE (edata = .);
65a47a12beSStefan Roese
66a47a12beSStefan Roese  . = .;
67a47a12beSStefan Roese
6855675142SMarek Vasut  . = ALIGN(4);
6955675142SMarek Vasut  .u_boot_list : {
70ef123c52SAlbert ARIBAUD	KEEP(*(SORT(.u_boot_list*)));
7155675142SMarek Vasut  }
7255675142SMarek Vasut
73a47a12beSStefan Roese  . = .;
74a47a12beSStefan Roese  __start___ex_table = .;
75a47a12beSStefan Roese  __ex_table : { *(__ex_table) }
76a47a12beSStefan Roese  __stop___ex_table = .;
77a47a12beSStefan Roese
78a47a12beSStefan Roese  . = ALIGN(256);
79a47a12beSStefan Roese  __init_begin = .;
80a47a12beSStefan Roese  .text.init : { *(.text.init) }
81a47a12beSStefan Roese  .data.init : { *(.data.init) }
82a47a12beSStefan Roese  . = ALIGN(256);
83a47a12beSStefan Roese  __init_end = .;
84*4d3294b1SJagdish Gediya  _end = .;
85a47a12beSStefan Roese
865df572f0SYing Zhang#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
875df572f0SYing Zhang  .bootpg ADDR(.text) - 0x1000 :
885df572f0SYing Zhang  {
895df572f0SYing Zhang    KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
905df572f0SYing Zhang  } :text = 0xffff
910938b609SPrabhakar Kushwaha  . = ADDR(.text) + CONFIG_SYS_MONITOR_LEN;
925df572f0SYing Zhang#else
93a47a12beSStefan Roese  .bootpg RESET_VECTOR_ADDRESS - 0xffc :
94a47a12beSStefan Roese  {
95a47a12beSStefan Roese    arch/powerpc/cpu/mpc85xx/start.o	(.bootpg)
96a47a12beSStefan Roese  } :text = 0xffff
97a47a12beSStefan Roese
98a47a12beSStefan Roese  .resetvec RESET_VECTOR_ADDRESS :
99a47a12beSStefan Roese  {
100fbe53f59SPeter Tyser    KEEP(*(.resetvec))
101a47a12beSStefan Roese  } :text = 0xffff
102a47a12beSStefan Roese
103a47a12beSStefan Roese  . = RESET_VECTOR_ADDRESS + 0x4;
104a47a12beSStefan Roese
105a47a12beSStefan Roese  /*
106a47a12beSStefan Roese   * Make sure that the bss segment isn't linked at 0x0, otherwise its
107a47a12beSStefan Roese   * address won't be updated during relocation fixups.  Note that
108a47a12beSStefan Roese   * this is a temporary fix.  Code to dynamically the fixup the bss
109a47a12beSStefan Roese   * location will be added in the future.  When the bss relocation
110a47a12beSStefan Roese   * fixup code is present this workaround should be removed.
111a47a12beSStefan Roese   */
112a47a12beSStefan Roese#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
113a47a12beSStefan Roese  . |= 0x10;
114a47a12beSStefan Roese#endif
1155df572f0SYing Zhang#endif
116a47a12beSStefan Roese
117a47a12beSStefan Roese  __bss_start = .;
118a47a12beSStefan Roese  .bss (NOLOAD)       :
119a47a12beSStefan Roese  {
120fbe53f59SPeter Tyser   *(.sbss*)
121fbe53f59SPeter Tyser   *(.bss*)
122a47a12beSStefan Roese   *(COMMON)
123a47a12beSStefan Roese  } :bss
124a47a12beSStefan Roese
125a47a12beSStefan Roese  . = ALIGN(4);
1263929fb0aSSimon Glass  __bss_end = . ;
127a47a12beSStefan Roese  PROVIDE (end = .);
128a47a12beSStefan Roese}
129