1/* 2 * (C) Copyright 2006 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de 4 * 5 * Copyright 2009 Freescale Semiconductor, Inc. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10#include "config.h" 11 12OUTPUT_ARCH(powerpc) 13#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC 14PHDRS 15{ 16 text PT_LOAD; 17 bss PT_LOAD; 18} 19#endif 20SECTIONS 21{ 22 . = CONFIG_SPL_TEXT_BASE; 23 .text : { 24 *(.text*) 25 } 26 _etext = .; 27 28 .reloc : { 29 _GOT2_TABLE_ = .; 30 KEEP(*(.got2)) 31 KEEP(*(.got)) 32 PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); 33 _FIXUP_TABLE_ = .; 34 KEEP(*(.fixup)) 35 } 36 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; 37 __fixup_entries = (. - _FIXUP_TABLE_) >> 2; 38 39 . = ALIGN(8); 40 .data : { 41 *(.rodata*) 42 *(.data*) 43 *(.sdata*) 44 } 45 _edata = .; 46 47 . = ALIGN(4); 48 .u_boot_list : { 49 KEEP(*(SORT(.u_boot_list*))); 50 } 51 52 . = .; 53 __start___ex_table = .; 54 __ex_table : { *(__ex_table) } 55 __stop___ex_table = .; 56 57 . = ALIGN(8); 58 __init_begin = .; 59 __init_end = .; 60#ifdef CONFIG_SPL_SKIP_RELOCATE 61 . = ALIGN(4); 62 __bss_start = .; 63 .bss : { 64 *(.sbss*) 65 *(.bss*) 66 } 67 . = ALIGN(4); 68 __bss_end = .; 69#endif 70 71/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */ 72#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC 73 .bootpg ADDR(.text) - 0x1000 : 74 { 75 KEEP(*(.bootpg)) 76 } :text = 0xffff 77#else 78#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */ 79#ifndef BOOT_PAGE_OFFSET 80#define BOOT_PAGE_OFFSET 0x1000 81#endif 82 .bootpg ADDR(.text) + BOOT_PAGE_OFFSET : 83 { 84 arch/powerpc/cpu/mpc85xx/start.o (.bootpg) 85 } 86#ifndef RESET_VECTOR_OFFSET 87#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */ 88#endif 89#elif defined(CONFIG_FSL_ELBC) 90#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */ 91#else 92#error unknown NAND controller 93#endif 94 .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : { 95 KEEP(*(.resetvec)) 96 } = 0xffff 97#endif 98 99#ifndef CONFIG_SPL_SKIP_RELOCATE 100 /* 101 * Make sure that the bss segment isn't linked at 0x0, otherwise its 102 * address won't be updated during relocation fixups. 103 */ 104 . |= 0x10; 105 106 . = ALIGN(4); 107 __bss_start = .; 108 .bss : { 109 *(.sbss*) 110 *(.bss*) 111 } 112 . = ALIGN(4); 113 __bss_end = .; 114#endif 115} 116