1/*
2 * (C) Copyright 2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de
4 *
5 * Copyright 2009 Freescale Semiconductor, Inc.
6 *
7 * SPDX-License-Identifier:	GPL-2.0+
8 */
9
10#include "config.h"
11
12OUTPUT_ARCH(powerpc)
13#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
14PHDRS
15{
16	text PT_LOAD;
17	bss PT_LOAD;
18}
19#endif
20SECTIONS
21{
22	. = CONFIG_SPL_TEXT_BASE;
23	.text : {
24		*(.text*)
25	}
26	_etext = .;
27
28	.reloc : {
29		_GOT2_TABLE_ = .;
30		KEEP(*(.got2))
31		KEEP(*(.got))
32		_FIXUP_TABLE_ = .;
33		KEEP(*(.fixup))
34	}
35	__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
36	__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
37
38	. = ALIGN(8);
39	.data : {
40		*(.rodata*)
41		*(.data*)
42		*(.sdata*)
43	}
44	_edata  =  .;
45
46	. = ALIGN(4);
47	.u_boot_list : {
48		KEEP(*(SORT(.u_boot_list*)));
49	}
50
51	. = .;
52	__start___ex_table = .;
53	__ex_table : { *(__ex_table) }
54	__stop___ex_table = .;
55
56	. = ALIGN(8);
57	__init_begin = .;
58	__init_end = .;
59#ifdef CONFIG_SPL_SKIP_RELOCATE
60	. = ALIGN(4);
61	__bss_start = .;
62	.bss : {
63		*(.sbss*)
64		*(.bss*)
65	}
66	. = ALIGN(4);
67	__bss_end = .;
68#endif
69
70/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
71#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
72	.bootpg ADDR(.text) - 0x1000 :
73	{
74		KEEP(*(.bootpg))
75	} :text = 0xffff
76#else
77#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
78#ifndef BOOT_PAGE_OFFSET
79#define BOOT_PAGE_OFFSET 0x1000
80#endif
81	.bootpg ADDR(.text) + BOOT_PAGE_OFFSET :
82	{
83		arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
84	}
85#ifndef RESET_VECTOR_OFFSET
86#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
87#endif
88#elif defined(CONFIG_FSL_ELBC)
89#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
90#else
91#error unknown NAND controller
92#endif
93	.resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
94		KEEP(*(.resetvec))
95	} = 0xffff
96#endif
97
98#ifndef CONFIG_SPL_SKIP_RELOCATE
99	/*
100	 * Make sure that the bss segment isn't linked at 0x0, otherwise its
101	 * address won't be updated during relocation fixups.
102	 */
103	. |= 0x10;
104
105	. = ALIGN(4);
106	__bss_start = .;
107	.bss : {
108		*(.sbss*)
109		*(.bss*)
110	}
111	. = ALIGN(4);
112	__bss_end = .;
113#endif
114}
115