1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de
5 *
6 * Copyright 2009 Freescale Semiconductor, Inc.
7 */
8
9#include "config.h"
10
11OUTPUT_ARCH(powerpc)
12#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
13PHDRS
14{
15	text PT_LOAD;
16	bss PT_LOAD;
17}
18#endif
19SECTIONS
20{
21	. = CONFIG_SPL_TEXT_BASE;
22	.text : {
23		*(.text*)
24	}
25	_etext = .;
26
27	.reloc : {
28		_GOT2_TABLE_ = .;
29		KEEP(*(.got2))
30		KEEP(*(.got))
31		_FIXUP_TABLE_ = .;
32		KEEP(*(.fixup))
33	}
34	__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
35	__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
36
37	. = ALIGN(8);
38	.data : {
39		*(.rodata*)
40		*(.data*)
41		*(.sdata*)
42	}
43	_edata  =  .;
44
45	. = ALIGN(4);
46	.u_boot_list : {
47		KEEP(*(SORT(.u_boot_list*)));
48	}
49
50	. = .;
51	__start___ex_table = .;
52	__ex_table : { *(__ex_table) }
53	__stop___ex_table = .;
54
55	. = ALIGN(8);
56	__init_begin = .;
57	__init_end = .;
58#ifdef CONFIG_SPL_SKIP_RELOCATE
59	. = ALIGN(4);
60	__bss_start = .;
61	.bss : {
62		*(.sbss*)
63		*(.bss*)
64	}
65	. = ALIGN(4);
66	__bss_end = .;
67#endif
68
69/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
70#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
71	.bootpg ADDR(.text) - 0x1000 :
72	{
73		KEEP(*(.bootpg))
74	} :text = 0xffff
75#else
76#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
77#ifndef BOOT_PAGE_OFFSET
78#define BOOT_PAGE_OFFSET 0x1000
79#endif
80	.bootpg ADDR(.text) + BOOT_PAGE_OFFSET :
81	{
82		arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
83	}
84#ifndef RESET_VECTOR_OFFSET
85#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
86#endif
87#elif defined(CONFIG_FSL_ELBC)
88#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
89#else
90#error unknown NAND controller
91#endif
92	.resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
93		KEEP(*(.resetvec))
94	} = 0xffff
95#endif
96
97#ifndef CONFIG_SPL_SKIP_RELOCATE
98	/*
99	 * Make sure that the bss segment isn't linked at 0x0, otherwise its
100	 * address won't be updated during relocation fixups.
101	 */
102	. |= 0x10;
103
104	. = ALIGN(4);
105	__bss_start = .;
106	.bss : {
107		*(.sbss*)
108		*(.bss*)
109	}
110	. = ALIGN(4);
111	__bss_end = .;
112#endif
113}
114