1/*
2 * (C) Copyright 2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de
4 *
5 * Copyright 2009 Freescale Semiconductor, Inc.
6 *
7 * SPDX-License-Identifier:	GPL-2.0+
8 */
9
10#include "config.h"	/* CONFIG_BOARDDIR */
11
12OUTPUT_ARCH(powerpc)
13SECTIONS
14{
15	. = 0xfff00000;
16	.text : {
17		*(.text*)
18	}
19	_etext = .;
20
21	.reloc : {
22		_GOT2_TABLE_ = .;
23		KEEP(*(.got2))
24		KEEP(*(.got))
25		PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
26		_FIXUP_TABLE_ = .;
27		KEEP(*(.fixup))
28	}
29	__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
30	__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
31
32	. = ALIGN(8);
33	.data : {
34		*(.rodata*)
35		*(.data*)
36		*(.sdata*)
37	}
38	_edata  =  .;
39
40	.u_boot_list : {
41		KEEP(*(SORT(.u_boot_list*)));
42	}
43
44	. = ALIGN(8);
45	__init_begin = .;
46	__init_end = .;
47#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
48	.bootpg ADDR(.text) + 0x1000 :
49	{
50		start.o	(.bootpg)
51	}
52#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
53#elif defined(CONFIG_FSL_ELBC)
54#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
55#else
56#error unknown NAND controller
57#endif
58	.resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
59		KEEP(*(.resetvec))
60	} = 0xffff
61
62	__bss_start = .;
63	.bss : {
64		*(.sbss*)
65		*(.bss*)
66	}
67	__bss_end = .;
68}
69ASSERT(__init_end <= (0xfff00000 + RESET_VECTOR_OFFSET), "NAND bootstrap too big");
70