1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de
5 *
6 * Copyright 2009 Freescale Semiconductor, Inc.
7 */
8
9#include "config.h"
10
11OUTPUT_ARCH(powerpc)
12SECTIONS
13{
14	. = 0xfff00000;
15	.text : {
16		*(.text*)
17	}
18	_etext = .;
19
20	.reloc : {
21		_GOT2_TABLE_ = .;
22		KEEP(*(.got2))
23		KEEP(*(.got))
24		_FIXUP_TABLE_ = .;
25		KEEP(*(.fixup))
26	}
27	__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
28	__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
29
30	. = ALIGN(8);
31	.data : {
32		*(.rodata*)
33		*(.data*)
34		*(.sdata*)
35	}
36	_edata  =  .;
37
38	.u_boot_list : {
39		KEEP(*(SORT(.u_boot_list*)));
40	}
41
42	. = ALIGN(8);
43	__init_begin = .;
44	__init_end = .;
45#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
46	.bootpg ADDR(.text) + 0x1000 :
47	{
48		start.o	(.bootpg)
49	}
50#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
51#elif defined(CONFIG_FSL_ELBC)
52#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
53#else
54#error unknown NAND controller
55#endif
56	.resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
57		KEEP(*(.resetvec))
58	} = 0xffff
59
60	__bss_start = .;
61	.bss : {
62		*(.sbss*)
63		*(.bss*)
64	}
65	__bss_end = .;
66}
67ASSERT(__init_end <= (0xfff00000 + RESET_VECTOR_OFFSET), "NAND bootstrap too big");
68