1/*
2 * (C) Copyright 2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de
4 *
5 * Copyright 2009 Freescale Semiconductor, Inc.
6 *
7 * SPDX-License-Identifier:	GPL-2.0+
8 */
9
10#include "config.h"
11
12OUTPUT_ARCH(powerpc)
13SECTIONS
14{
15	. = 0xfff00000;
16	.text : {
17		*(.text*)
18	}
19	_etext = .;
20
21	.reloc : {
22		_GOT2_TABLE_ = .;
23		KEEP(*(.got2))
24		KEEP(*(.got))
25		_FIXUP_TABLE_ = .;
26		KEEP(*(.fixup))
27	}
28	__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
29	__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
30
31	. = ALIGN(8);
32	.data : {
33		*(.rodata*)
34		*(.data*)
35		*(.sdata*)
36	}
37	_edata  =  .;
38
39	.u_boot_list : {
40		KEEP(*(SORT(.u_boot_list*)));
41	}
42
43	. = ALIGN(8);
44	__init_begin = .;
45	__init_end = .;
46#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
47	.bootpg ADDR(.text) + 0x1000 :
48	{
49		start.o	(.bootpg)
50	}
51#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
52#elif defined(CONFIG_FSL_ELBC)
53#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
54#else
55#error unknown NAND controller
56#endif
57	.resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
58		KEEP(*(.resetvec))
59	} = 0xffff
60
61	__bss_start = .;
62	.bss : {
63		*(.sbss*)
64		*(.bss*)
65	}
66	__bss_end = .;
67}
68ASSERT(__init_end <= (0xfff00000 + RESET_VECTOR_OFFSET), "NAND bootstrap too big");
69