1 /* 2 * linux/arch/powerpc/kernel/traps.c 3 * 4 * Copyright 2007 Freescale Semiconductor. 5 * Copyright (C) 2003 Motorola 6 * Modified by Xianghua Xiao(x.xiao@motorola.com) 7 * 8 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 9 * 10 * Modified by Cort Dougan (cort@cs.nmt.edu) 11 * and Paul Mackerras (paulus@cs.anu.edu.au) 12 * 13 * (C) Copyright 2000 14 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 15 * 16 * SPDX-License-Identifier: GPL-2.0+ 17 */ 18 19 /* 20 * This file handles the architecture-dependent parts of hardware exceptions 21 */ 22 23 #include <common.h> 24 #include <command.h> 25 #include <kgdb.h> 26 #include <asm/processor.h> 27 28 DECLARE_GLOBAL_DATA_PTR; 29 30 /* Returns 0 if exception not found and fixup otherwise. */ 31 extern unsigned long search_exception_table(unsigned long); 32 33 /* 34 * End of addressable memory. This may be less than the actual 35 * amount of memory on the system if we're unable to keep all 36 * the memory mapped in. 37 */ 38 #define END_OF_MEM (gd->bd->bi_memstart + get_effective_memsize()) 39 40 static __inline__ void set_tsr(unsigned long val) 41 { 42 asm volatile("mtspr 0x150, %0" : : "r" (val)); 43 } 44 45 static __inline__ unsigned long get_esr(void) 46 { 47 unsigned long val; 48 asm volatile("mfspr %0, 0x03e" : "=r" (val) :); 49 return val; 50 } 51 52 #define ESR_MCI 0x80000000 53 #define ESR_PIL 0x08000000 54 #define ESR_PPR 0x04000000 55 #define ESR_PTR 0x02000000 56 #define ESR_DST 0x00800000 57 #define ESR_DIZ 0x00400000 58 #define ESR_U0F 0x00008000 59 60 #if defined(CONFIG_CMD_BEDBUG) 61 extern void do_bedbug_breakpoint(struct pt_regs *); 62 #endif 63 64 /* 65 * Trap & Exception support 66 */ 67 68 static void print_backtrace(unsigned long *sp) 69 { 70 int cnt = 0; 71 unsigned long i; 72 73 printf("Call backtrace: "); 74 while (sp) { 75 if ((uint)sp > END_OF_MEM) 76 break; 77 78 i = sp[1]; 79 if (cnt++ % 7 == 0) 80 printf("\n"); 81 printf("%08lX ", i); 82 if (cnt > 32) break; 83 sp = (unsigned long *)*sp; 84 } 85 printf("\n"); 86 } 87 88 void show_regs(struct pt_regs *regs) 89 { 90 int i; 91 92 printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n", 93 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); 94 printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n", 95 regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0, 96 regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0, 97 regs->msr&MSR_IR ? 1 : 0, 98 regs->msr&MSR_DR ? 1 : 0); 99 100 printf("\n"); 101 for (i = 0; i < 32; i++) { 102 if ((i % 8) == 0) 103 { 104 printf("GPR%02d: ", i); 105 } 106 107 printf("%08lX ", regs->gpr[i]); 108 if ((i % 8) == 7) 109 { 110 printf("\n"); 111 } 112 } 113 } 114 115 116 static void _exception(int signr, struct pt_regs *regs) 117 { 118 show_regs(regs); 119 print_backtrace((unsigned long *)regs->gpr[1]); 120 panic("Exception in kernel pc %lx signal %d",regs->nip,signr); 121 } 122 123 void CritcalInputException(struct pt_regs *regs) 124 { 125 panic("Critical Input Exception"); 126 } 127 128 int machinecheck_count = 0; 129 int machinecheck_error = 0; 130 void MachineCheckException(struct pt_regs *regs) 131 { 132 unsigned long fixup; 133 unsigned int mcsr, mcsrr0, mcsrr1, mcar; 134 135 /* Probing PCI using config cycles cause this exception 136 * when a device is not present. Catch it and return to 137 * the PCI exception handler. 138 */ 139 if ((fixup = search_exception_table(regs->nip)) != 0) { 140 regs->nip = fixup; 141 return; 142 } 143 144 mcsrr0 = mfspr(SPRN_MCSRR0); 145 mcsrr1 = mfspr(SPRN_MCSRR1); 146 mcsr = mfspr(SPRN_MCSR); 147 mcar = mfspr(SPRN_MCAR); 148 149 machinecheck_count++; 150 machinecheck_error=1; 151 152 #if defined(CONFIG_CMD_KGDB) 153 if (debugger_exception_handler && (*debugger_exception_handler)(regs)) 154 return; 155 #endif 156 157 printf("Machine check in kernel mode.\n"); 158 printf("Caused by (from mcsr): "); 159 printf("mcsr = 0x%08x\n", mcsr); 160 if (mcsr & 0x80000000) 161 printf("Machine check input pin\n"); 162 if (mcsr & 0x40000000) 163 printf("Instruction cache parity error\n"); 164 if (mcsr & 0x20000000) 165 printf("Data cache push parity error\n"); 166 if (mcsr & 0x10000000) 167 printf("Data cache parity error\n"); 168 if (mcsr & 0x00000080) 169 printf("Bus instruction address error\n"); 170 if (mcsr & 0x00000040) 171 printf("Bus Read address error\n"); 172 if (mcsr & 0x00000020) 173 printf("Bus Write address error\n"); 174 if (mcsr & 0x00000010) 175 printf("Bus Instruction data bus error\n"); 176 if (mcsr & 0x00000008) 177 printf("Bus Read data bus error\n"); 178 if (mcsr & 0x00000004) 179 printf("Bus Write bus error\n"); 180 if (mcsr & 0x00000002) 181 printf("Bus Instruction parity error\n"); 182 if (mcsr & 0x00000001) 183 printf("Bus Read parity error\n"); 184 185 show_regs(regs); 186 printf("MCSR=0x%08x \tMCSRR0=0x%08x \nMCSRR1=0x%08x \tMCAR=0x%08x\n", 187 mcsr, mcsrr0, mcsrr1, mcar); 188 print_backtrace((unsigned long *)regs->gpr[1]); 189 if (machinecheck_count > 10) { 190 panic("machine check count too high\n"); 191 } 192 193 if (machinecheck_count > 1) { 194 regs->nip += 4; /* skip offending instruction */ 195 printf("Skipping current instr, Returning to 0x%08lx\n", 196 regs->nip); 197 } else { 198 printf("Returning back to 0x%08lx\n",regs->nip); 199 } 200 } 201 202 void AlignmentException(struct pt_regs *regs) 203 { 204 #if defined(CONFIG_CMD_KGDB) 205 if (debugger_exception_handler && (*debugger_exception_handler)(regs)) 206 return; 207 #endif 208 209 show_regs(regs); 210 print_backtrace((unsigned long *)regs->gpr[1]); 211 panic("Alignment Exception"); 212 } 213 214 void ProgramCheckException(struct pt_regs *regs) 215 { 216 long esr_val; 217 218 #if defined(CONFIG_CMD_KGDB) 219 if (debugger_exception_handler && (*debugger_exception_handler)(regs)) 220 return; 221 #endif 222 223 show_regs(regs); 224 225 esr_val = get_esr(); 226 if( esr_val & ESR_PIL ) 227 printf( "** Illegal Instruction **\n" ); 228 else if( esr_val & ESR_PPR ) 229 printf( "** Privileged Instruction **\n" ); 230 else if( esr_val & ESR_PTR ) 231 printf( "** Trap Instruction **\n" ); 232 233 print_backtrace((unsigned long *)regs->gpr[1]); 234 panic("Program Check Exception"); 235 } 236 237 void PITException(struct pt_regs *regs) 238 { 239 /* 240 * Reset PIT interrupt 241 */ 242 set_tsr(0x0c000000); 243 244 /* 245 * Call timer_interrupt routine in interrupts.c 246 */ 247 timer_interrupt(NULL); 248 } 249 250 void UnknownException(struct pt_regs *regs) 251 { 252 #if defined(CONFIG_CMD_KGDB) 253 if (debugger_exception_handler && (*debugger_exception_handler)(regs)) 254 return; 255 #endif 256 257 printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", 258 regs->nip, regs->msr, regs->trap); 259 _exception(0, regs); 260 } 261 262 void ExtIntException(struct pt_regs *regs) 263 { 264 volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR); 265 266 uint vect; 267 268 #if defined(CONFIG_CMD_KGDB) 269 if (debugger_exception_handler && (*debugger_exception_handler)(regs)) 270 return; 271 #endif 272 273 printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx", 274 regs->nip, regs->msr, regs->trap); 275 vect = pic->iack0; 276 printf(" irq IACK0@%05x=%d\n",(int)&pic->iack0,vect); 277 show_regs(regs); 278 print_backtrace((unsigned long *)regs->gpr[1]); 279 } 280 281 void DebugException(struct pt_regs *regs) 282 { 283 printf("Debugger trap at @ %lx\n", regs->nip ); 284 show_regs(regs); 285 #if defined(CONFIG_CMD_BEDBUG) 286 do_bedbug_breakpoint( regs ); 287 #endif 288 } 289 290 /* Probe an address by reading. If not present, return -1, otherwise 291 * return 0. 292 */ 293 int addr_probe(uint *addr) 294 { 295 return 0; 296 } 297