1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2009 Freescale Semiconductor, Inc.
4  */
5 
6 #include <common.h>
7 #include <asm/processor.h>
8 #include <asm/global_data.h>
9 #include <fsl_ifc.h>
10 #include <asm/io.h>
11 
12 DECLARE_GLOBAL_DATA_PTR;
13 
14 ulong cpu_init_f(void)
15 {
16 #ifdef CONFIG_SYS_INIT_L2_ADDR
17 	ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
18 
19 	out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR);
20 
21 	/* set MBECCDIS=1, SBECCDIS=1 */
22 	out_be32(&l2cache->l2errdis,
23 		(MPC85xx_L2ERRDIS_MBECC | MPC85xx_L2ERRDIS_SBECC));
24 
25 	/* set L2E=1 & L2SRAM=001 */
26 	out_be32(&l2cache->l2ctl,
27 		(MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE));
28 #endif
29 
30 	return 0;
31 }
32 
33 #ifndef CONFIG_SYS_FSL_TBCLK_DIV
34 #define CONFIG_SYS_FSL_TBCLK_DIV 8
35 #endif
36 
37 void udelay(unsigned long usec)
38 {
39 	u32 ticks_per_usec = gd->bus_clk / (CONFIG_SYS_FSL_TBCLK_DIV * 1000000);
40 	u32 ticks = ticks_per_usec * usec;
41 	u32 s = mfspr(SPRN_TBRL);
42 
43 	while ((mfspr(SPRN_TBRL) - s) < ticks);
44 }
45