1 /* 2 * Copyright (C) 2006 Freescale Semiconductor, Inc. 3 * 4 * Dave Liu <daveliu@freescale.com> 5 * based on source code of Shlomi Gridish 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include "common.h" 11 #include "asm/errno.h" 12 #include "asm/io.h" 13 #include "asm/immap_85xx.h" 14 15 #if defined(CONFIG_QE) 16 #define NUM_OF_PINS 32 17 void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign) 18 { 19 u32 pin_2bit_mask; 20 u32 pin_2bit_dir; 21 u32 pin_2bit_assign; 22 u32 pin_1bit_mask; 23 u32 tmp_val; 24 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 25 volatile par_io_t *par_io = (volatile par_io_t *) 26 &(gur->qe_par_io); 27 28 /* Caculate pin location and 2bit mask and dir */ 29 pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); 30 pin_2bit_dir = (u32)(dir << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); 31 32 /* Setup the direction */ 33 tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? \ 34 in_be32(&par_io[port].cpdir2) : 35 in_be32(&par_io[port].cpdir1); 36 37 if (pin > (NUM_OF_PINS/2) -1) { 38 out_be32(&par_io[port].cpdir2, ~pin_2bit_mask & tmp_val); 39 out_be32(&par_io[port].cpdir2, pin_2bit_dir | tmp_val); 40 } else { 41 out_be32(&par_io[port].cpdir1, ~pin_2bit_mask & tmp_val); 42 out_be32(&par_io[port].cpdir1, pin_2bit_dir | tmp_val); 43 } 44 45 /* Calculate pin location for 1bit mask */ 46 pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); 47 48 /* Setup the open drain */ 49 tmp_val = in_be32(&par_io[port].cpodr); 50 if (open_drain) 51 out_be32(&par_io[port].cpodr, pin_1bit_mask | tmp_val); 52 else 53 out_be32(&par_io[port].cpodr, ~pin_1bit_mask & tmp_val); 54 55 /* Setup the assignment */ 56 tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? 57 in_be32(&par_io[port].cppar2): 58 in_be32(&par_io[port].cppar1); 59 pin_2bit_assign = (u32)(assign 60 << (NUM_OF_PINS - (pin%(NUM_OF_PINS/2)+1)*2)); 61 62 /* Clear and set 2 bits mask */ 63 if (pin > (NUM_OF_PINS/2) - 1) { 64 out_be32(&par_io[port].cppar2, ~pin_2bit_mask & tmp_val); 65 out_be32(&par_io[port].cppar2, pin_2bit_assign | tmp_val); 66 } else { 67 out_be32(&par_io[port].cppar1, ~pin_2bit_mask & tmp_val); 68 out_be32(&par_io[port].cppar1, pin_2bit_assign | tmp_val); 69 } 70 } 71 72 #endif /* CONFIG_QE */ 73