1 /* 2 * Copyright 2010-2011 Freescale Semiconductor, Inc. 3 * 4 * See file CREDITS for list of people who contributed to this 5 * project. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23 #include <common.h> 24 #include <asm/fsl_portals.h> 25 #include <asm/fsl_liodn.h> 26 27 #ifdef CONFIG_SYS_DPAA_QBMAN 28 struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { 29 /* dqrr liodn, frame data liodn, liodn off, sdest */ 30 SET_QP_INFO(1, 2, 1, 0), 31 SET_QP_INFO(3, 4, 2, 1), 32 SET_QP_INFO(5, 6, 3, 0), 33 SET_QP_INFO(7, 8, 4, 1), 34 SET_QP_INFO(9, 10, 5, 0), 35 SET_QP_INFO(11, 12, 1, 1), 36 SET_QP_INFO(13, 14, 2, 0), 37 SET_QP_INFO(15, 16, 3, 1), 38 SET_QP_INFO(17, 18, 4, 0), 39 SET_QP_INFO(19, 20, 5, 1), 40 }; 41 #endif 42 43 struct srio_liodn_id_table srio_liodn_tbl[] = { 44 SET_SRIO_LIODN_2(1, 199, 200), 45 SET_SRIO_LIODN_2(2, 201, 202), 46 }; 47 int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); 48 49 struct liodn_id_table liodn_tbl[] = { 50 #ifdef CONFIG_SYS_DPAA_QBMAN 51 SET_QMAN_LIODN(31), 52 SET_BMAN_LIODN(32), 53 #endif 54 55 SET_SDHC_LIODN(1, 64), 56 57 SET_PME_LIODN(117), 58 59 SET_USB_LIODN(1, "fsl-usb2-mph", 125), 60 SET_USB_LIODN(2, "fsl-usb2-dr", 126), 61 62 SET_SATA_LIODN(1, 127), 63 SET_SATA_LIODN(2, 128), 64 65 SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 1, 193), 66 SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 2, 194), 67 SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 3, 195), 68 SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 4, 196), 69 70 SET_DMA_LIODN(1, 197), 71 SET_DMA_LIODN(2, 198), 72 73 SET_GUTS_LIODN("fsl,rapidio-delta", 199, rio1liodnr, 0), 74 SET_GUTS_LIODN(NULL, 200, rio2liodnr, 0), 75 SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0), 76 SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0), 77 }; 78 int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); 79 80 #ifdef CONFIG_SYS_DPAA_FMAN 81 struct liodn_id_table fman1_liodn_tbl[] = { 82 SET_FMAN_RX_1G_LIODN(1, 0, 10), 83 SET_FMAN_RX_1G_LIODN(1, 1, 11), 84 SET_FMAN_RX_1G_LIODN(1, 2, 12), 85 SET_FMAN_RX_1G_LIODN(1, 3, 13), 86 SET_FMAN_RX_1G_LIODN(1, 4, 14), 87 SET_FMAN_RX_10G_LIODN(1, 0, 15), 88 }; 89 int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); 90 #endif 91 92 struct liodn_id_table sec_liodn_tbl[] = { 93 SET_SEC_JR_LIODN_ENTRY(0, 129, 130), 94 SET_SEC_JR_LIODN_ENTRY(1, 131, 132), 95 SET_SEC_JR_LIODN_ENTRY(2, 133, 134), 96 SET_SEC_JR_LIODN_ENTRY(3, 135, 136), 97 SET_SEC_RTIC_LIODN_ENTRY(a, 154), 98 SET_SEC_RTIC_LIODN_ENTRY(b, 155), 99 SET_SEC_RTIC_LIODN_ENTRY(c, 156), 100 SET_SEC_RTIC_LIODN_ENTRY(d, 157), 101 SET_SEC_DECO_LIODN_ENTRY(0, 97, 98), 102 SET_SEC_DECO_LIODN_ENTRY(1, 99, 100), 103 }; 104 int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); 105 106 #ifdef CONFIG_SYS_FSL_RAID_ENGINE 107 struct liodn_id_table raide_liodn_tbl[] = { 108 SET_RAID_ENGINE_JQ_LIODN_ENTRY(0, 0, 60), 109 SET_RAID_ENGINE_JQ_LIODN_ENTRY(0, 1, 61), 110 SET_RAID_ENGINE_JQ_LIODN_ENTRY(1, 0, 62), 111 SET_RAID_ENGINE_JQ_LIODN_ENTRY(1, 1, 63), 112 }; 113 int raide_liodn_tbl_sz = ARRAY_SIZE(raide_liodn_tbl); 114 #endif 115 116 #ifdef CONFIG_SYS_DPAA_RMAN 117 struct liodn_id_table rman_liodn_tbl[] = { 118 /* Set RMan block 0-3 liodn offset */ 119 SET_RMAN_LIODN(0, 6), 120 SET_RMAN_LIODN(1, 7), 121 SET_RMAN_LIODN(2, 8), 122 SET_RMAN_LIODN(3, 9), 123 }; 124 int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl); 125 #endif 126 127 struct liodn_id_table liodn_bases[] = { 128 [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100), 129 #ifdef CONFIG_SYS_DPAA_FMAN 130 [FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(32), 131 #endif 132 #ifdef CONFIG_SYS_DPAA_PME 133 [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172), 134 #endif 135 #ifdef CONFIG_SYS_FSL_RAID_ENGINE 136 [FSL_HW_PORTAL_RAID_ENGINE] = SET_LIODN_BASE_1(47), 137 #endif 138 #ifdef CONFIG_SYS_DPAA_RMAN 139 [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80), 140 #endif 141 }; 142