1 /* 2 * Copyright 2010-2011 Freescale Semiconductor, Inc. 3 * Author: Roy Zang <tie-fei.zang@freescale.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the Free 7 * Software Foundation; either version 2 of the License, or (at your option) 8 * any later version. 9 */ 10 11 #include <config.h> 12 #include <common.h> 13 #include <asm/io.h> 14 #include <asm/immap_85xx.h> 15 #include <asm/fsl_serdes.h> 16 17 #define SRDS1_MAX_LANES 4 18 19 static u32 serdes1_prtcl_map; 20 21 static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { 22 [0x00] = {PCIE1, PCIE2, NONE, NONE}, 23 [0x01] = {PCIE1, PCIE2, PCIE3, NONE}, 24 [0x02] = {PCIE1, PCIE2, PCIE3, SGMII_FM1_DTSEC2}, 25 [0x03] = {PCIE1, PCIE2, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2}, 26 }; 27 28 int is_serdes_configured(enum srds_prtcl device) 29 { 30 int ret = (1 << device) & serdes1_prtcl_map; 31 return ret; 32 } 33 34 void fsl_serdes_init(void) 35 { 36 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; 37 u32 pordevsr = in_be32(&gur->pordevsr); 38 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 39 MPC85xx_PORDEVSR_IO_SEL_SHIFT; 40 int lane; 41 42 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); 43 44 if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { 45 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); 46 return; 47 } 48 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { 49 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; 50 serdes1_prtcl_map |= (1 << lane_prtcl); 51 } 52 53 } 54