1 /* 2 * Copyright 2009-2010 Freescale Semiconductor, Inc. 3 * 4 * Author: Roy Zang <tie-fei.zang@freescale.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __FSL_CORENET_SERDES_H 10 #define __FSL_CORENET_SERDES_H 11 12 enum srds_bank { 13 FSL_SRDS_BANK_1 = 0, 14 FSL_SRDS_BANK_2 = 1, 15 FSL_SRDS_BANK_3 = 2, 16 }; 17 18 int is_serdes_prtcl_valid(u32 prtcl); 19 int serdes_get_lane_idx(int lane); 20 int serdes_get_bank_by_lane(int lane); 21 int serdes_lane_enabled(int lane); 22 enum srds_prtcl serdes_get_prtcl(int cfg, int lane); 23 24 #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES8 25 extern uint16_t srds_lpd_b[SRDS_MAX_BANK]; 26 #endif 27 28 #endif /* __FSL_CORENET_SERDES_H */ 29