1 /* 2 * Copyright 2007-2011 Freescale Semiconductor, Inc. 3 * 4 * (C) Copyright 2000 5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #include <common.h> 27 #include <libfdt.h> 28 #include <fdt_support.h> 29 #include <asm/processor.h> 30 #include <linux/ctype.h> 31 #include <asm/io.h> 32 #include <asm/fsl_portals.h> 33 #ifdef CONFIG_FSL_ESDHC 34 #include <fsl_esdhc.h> 35 #endif 36 #include "../../../../drivers/qe/qe.h" /* For struct qe_firmware */ 37 38 DECLARE_GLOBAL_DATA_PTR; 39 40 extern void ft_qe_setup(void *blob); 41 extern void ft_fixup_num_cores(void *blob); 42 extern void ft_srio_setup(void *blob); 43 44 #ifdef CONFIG_MP 45 #include "mp.h" 46 47 void ft_fixup_cpu(void *blob, u64 memory_limit) 48 { 49 int off; 50 ulong spin_tbl_addr = get_spin_phys_addr(); 51 u32 bootpg = determine_mp_bootpg(); 52 u32 id = get_my_id(); 53 const char *enable_method; 54 55 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); 56 while (off != -FDT_ERR_NOTFOUND) { 57 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); 58 59 if (reg) { 60 u64 val = *reg * SIZE_BOOT_ENTRY + spin_tbl_addr; 61 val = cpu_to_fdt32(val); 62 if (*reg == id) { 63 fdt_setprop_string(blob, off, "status", 64 "okay"); 65 } else { 66 fdt_setprop_string(blob, off, "status", 67 "disabled"); 68 } 69 70 if (hold_cores_in_reset(0)) { 71 #ifdef CONFIG_FSL_CORENET 72 /* Cores held in reset, use BRR to release */ 73 enable_method = "fsl,brr-holdoff"; 74 #else 75 /* Cores held in reset, use EEBPCR to release */ 76 enable_method = "fsl,eebpcr-holdoff"; 77 #endif 78 } else { 79 /* Cores out of reset and in a spin-loop */ 80 enable_method = "spin-table"; 81 82 fdt_setprop(blob, off, "cpu-release-addr", 83 &val, sizeof(val)); 84 } 85 86 fdt_setprop_string(blob, off, "enable-method", 87 enable_method); 88 } else { 89 printf ("cpu NULL\n"); 90 } 91 off = fdt_node_offset_by_prop_value(blob, off, 92 "device_type", "cpu", 4); 93 } 94 95 /* Reserve the boot page so OSes dont use it */ 96 if ((u64)bootpg < memory_limit) { 97 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096); 98 if (off < 0) 99 printf("%s: %s\n", __FUNCTION__, fdt_strerror(off)); 100 } 101 } 102 #endif 103 104 #ifdef CONFIG_SYS_FSL_CPC 105 static inline void ft_fixup_l3cache(void *blob, int off) 106 { 107 u32 line_size, num_ways, size, num_sets; 108 cpc_corenet_t *cpc = (void *)CONFIG_SYS_FSL_CPC_ADDR; 109 u32 cfg0 = in_be32(&cpc->cpccfg0); 110 111 size = CPC_CFG0_SZ_K(cfg0) * 1024 * CONFIG_SYS_NUM_CPC; 112 num_ways = CPC_CFG0_NUM_WAYS(cfg0); 113 line_size = CPC_CFG0_LINE_SZ(cfg0); 114 num_sets = size / (line_size * num_ways); 115 116 fdt_setprop(blob, off, "cache-unified", NULL, 0); 117 fdt_setprop_cell(blob, off, "cache-block-size", line_size); 118 fdt_setprop_cell(blob, off, "cache-size", size); 119 fdt_setprop_cell(blob, off, "cache-sets", num_sets); 120 fdt_setprop_cell(blob, off, "cache-level", 3); 121 #ifdef CONFIG_SYS_CACHE_STASHING 122 fdt_setprop_cell(blob, off, "cache-stash-id", 1); 123 #endif 124 } 125 #else 126 #define ft_fixup_l3cache(x, y) 127 #endif 128 129 #if defined(CONFIG_L2_CACHE) 130 /* return size in kilobytes */ 131 static inline u32 l2cache_size(void) 132 { 133 volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR; 134 volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3; 135 u32 ver = SVR_SOC_VER(get_svr()); 136 137 switch (l2siz_field) { 138 case 0x0: 139 break; 140 case 0x1: 141 if (ver == SVR_8540 || ver == SVR_8560 || 142 ver == SVR_8541 || ver == SVR_8541_E || 143 ver == SVR_8555 || ver == SVR_8555_E) 144 return 128; 145 else 146 return 256; 147 break; 148 case 0x2: 149 if (ver == SVR_8540 || ver == SVR_8560 || 150 ver == SVR_8541 || ver == SVR_8541_E || 151 ver == SVR_8555 || ver == SVR_8555_E) 152 return 256; 153 else 154 return 512; 155 break; 156 case 0x3: 157 return 1024; 158 break; 159 } 160 161 return 0; 162 } 163 164 static inline void ft_fixup_l2cache(void *blob) 165 { 166 int len, off; 167 u32 *ph; 168 struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr())); 169 170 const u32 line_size = 32; 171 const u32 num_ways = 8; 172 const u32 size = l2cache_size() * 1024; 173 const u32 num_sets = size / (line_size * num_ways); 174 175 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); 176 if (off < 0) { 177 debug("no cpu node fount\n"); 178 return; 179 } 180 181 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0); 182 183 if (ph == NULL) { 184 debug("no next-level-cache property\n"); 185 return ; 186 } 187 188 off = fdt_node_offset_by_phandle(blob, *ph); 189 if (off < 0) { 190 printf("%s: %s\n", __func__, fdt_strerror(off)); 191 return ; 192 } 193 194 if (cpu) { 195 char buf[40]; 196 197 if (isdigit(cpu->name[0])) { 198 /* MPCxxxx, where xxxx == 4-digit number */ 199 len = sprintf(buf, "fsl,mpc%s-l2-cache-controller", 200 cpu->name) + 1; 201 } else { 202 /* Pxxxx or Txxxx, where xxxx == 4-digit number */ 203 len = sprintf(buf, "fsl,%c%s-l2-cache-controller", 204 tolower(cpu->name[0]), cpu->name + 1) + 1; 205 } 206 207 /* 208 * append "cache" after the NULL character that the previous 209 * sprintf wrote. This is how a device tree stores multiple 210 * strings in a property. 211 */ 212 len += sprintf(buf + len, "cache") + 1; 213 214 fdt_setprop(blob, off, "compatible", buf, len); 215 } 216 fdt_setprop(blob, off, "cache-unified", NULL, 0); 217 fdt_setprop_cell(blob, off, "cache-block-size", line_size); 218 fdt_setprop_cell(blob, off, "cache-size", size); 219 fdt_setprop_cell(blob, off, "cache-sets", num_sets); 220 fdt_setprop_cell(blob, off, "cache-level", 2); 221 222 /* we dont bother w/L3 since no platform of this type has one */ 223 } 224 #elif defined(CONFIG_BACKSIDE_L2_CACHE) 225 static inline void ft_fixup_l2cache(void *blob) 226 { 227 int off, l2_off, l3_off = -1; 228 u32 *ph; 229 u32 l2cfg0 = mfspr(SPRN_L2CFG0); 230 u32 size, line_size, num_ways, num_sets; 231 int has_l2 = 1; 232 233 /* P2040/P2040E has no L2, so dont set any L2 props */ 234 if ((SVR_SOC_VER(get_svr()) == SVR_P2040) || 235 (SVR_SOC_VER(get_svr()) == SVR_P2040_E)) 236 has_l2 = 0; 237 238 size = (l2cfg0 & 0x3fff) * 64 * 1024; 239 num_ways = ((l2cfg0 >> 14) & 0x1f) + 1; 240 line_size = (((l2cfg0 >> 23) & 0x3) + 1) * 32; 241 num_sets = size / (line_size * num_ways); 242 243 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); 244 245 while (off != -FDT_ERR_NOTFOUND) { 246 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0); 247 248 if (ph == NULL) { 249 debug("no next-level-cache property\n"); 250 goto next; 251 } 252 253 l2_off = fdt_node_offset_by_phandle(blob, *ph); 254 if (l2_off < 0) { 255 printf("%s: %s\n", __func__, fdt_strerror(off)); 256 goto next; 257 } 258 259 if (has_l2) { 260 #ifdef CONFIG_SYS_CACHE_STASHING 261 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); 262 if (reg) 263 fdt_setprop_cell(blob, l2_off, "cache-stash-id", 264 (*reg * 2) + 32 + 1); 265 #endif 266 267 fdt_setprop(blob, l2_off, "cache-unified", NULL, 0); 268 fdt_setprop_cell(blob, l2_off, "cache-block-size", 269 line_size); 270 fdt_setprop_cell(blob, l2_off, "cache-size", size); 271 fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets); 272 fdt_setprop_cell(blob, l2_off, "cache-level", 2); 273 fdt_setprop(blob, l2_off, "compatible", "cache", 6); 274 } 275 276 if (l3_off < 0) { 277 ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0); 278 279 if (ph == NULL) { 280 debug("no next-level-cache property\n"); 281 goto next; 282 } 283 l3_off = *ph; 284 } 285 next: 286 off = fdt_node_offset_by_prop_value(blob, off, 287 "device_type", "cpu", 4); 288 } 289 if (l3_off > 0) { 290 l3_off = fdt_node_offset_by_phandle(blob, l3_off); 291 if (l3_off < 0) { 292 printf("%s: %s\n", __func__, fdt_strerror(off)); 293 return ; 294 } 295 ft_fixup_l3cache(blob, l3_off); 296 } 297 } 298 #else 299 #define ft_fixup_l2cache(x) 300 #endif 301 302 static inline void ft_fixup_cache(void *blob) 303 { 304 int off; 305 306 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); 307 308 while (off != -FDT_ERR_NOTFOUND) { 309 u32 l1cfg0 = mfspr(SPRN_L1CFG0); 310 u32 l1cfg1 = mfspr(SPRN_L1CFG1); 311 u32 isize, iline_size, inum_sets, inum_ways; 312 u32 dsize, dline_size, dnum_sets, dnum_ways; 313 314 /* d-side config */ 315 dsize = (l1cfg0 & 0x7ff) * 1024; 316 dnum_ways = ((l1cfg0 >> 11) & 0xff) + 1; 317 dline_size = (((l1cfg0 >> 23) & 0x3) + 1) * 32; 318 dnum_sets = dsize / (dline_size * dnum_ways); 319 320 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size); 321 fdt_setprop_cell(blob, off, "d-cache-size", dsize); 322 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets); 323 324 #ifdef CONFIG_SYS_CACHE_STASHING 325 { 326 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); 327 if (reg) 328 fdt_setprop_cell(blob, off, "cache-stash-id", 329 (*reg * 2) + 32 + 0); 330 } 331 #endif 332 333 /* i-side config */ 334 isize = (l1cfg1 & 0x7ff) * 1024; 335 inum_ways = ((l1cfg1 >> 11) & 0xff) + 1; 336 iline_size = (((l1cfg1 >> 23) & 0x3) + 1) * 32; 337 inum_sets = isize / (iline_size * inum_ways); 338 339 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size); 340 fdt_setprop_cell(blob, off, "i-cache-size", isize); 341 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets); 342 343 off = fdt_node_offset_by_prop_value(blob, off, 344 "device_type", "cpu", 4); 345 } 346 347 ft_fixup_l2cache(blob); 348 } 349 350 351 void fdt_add_enet_stashing(void *fdt) 352 { 353 do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1); 354 355 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1); 356 357 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1); 358 do_fixup_by_compat(fdt, "fsl,etsec2", "bd-stash", NULL, 0, 1); 359 do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-len", 96, 1); 360 do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-idx", 0, 1); 361 } 362 363 #if defined(CONFIG_SYS_DPAA_FMAN) || defined(CONFIG_SYS_DPAA_PME) 364 #ifdef CONFIG_SYS_DPAA_FMAN 365 static void ft_fixup_clks(void *blob, const char *compat, u32 offset, 366 unsigned long freq) 367 { 368 phys_addr_t phys = offset + CONFIG_SYS_CCSRBAR_PHYS; 369 int off = fdt_node_offset_by_compat_reg(blob, compat, phys); 370 371 if (off >= 0) { 372 off = fdt_setprop_cell(blob, off, "clock-frequency", freq); 373 if (off > 0) 374 printf("WARNING enable to set clock-frequency " 375 "for %s: %s\n", compat, fdt_strerror(off)); 376 } 377 } 378 #endif 379 380 static void ft_fixup_dpaa_clks(void *blob) 381 { 382 sys_info_t sysinfo; 383 384 get_sys_info(&sysinfo); 385 #ifdef CONFIG_SYS_DPAA_FMAN 386 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET, 387 sysinfo.freqFMan[0]); 388 389 #if (CONFIG_SYS_NUM_FMAN == 2) 390 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET, 391 sysinfo.freqFMan[1]); 392 #endif 393 #endif 394 395 #ifdef CONFIG_SYS_DPAA_PME 396 do_fixup_by_compat_u32(blob, "fsl,pme", 397 "clock-frequency", sysinfo.freqPME, 1); 398 #endif 399 } 400 #else 401 #define ft_fixup_dpaa_clks(x) 402 #endif 403 404 #ifdef CONFIG_QE 405 static void ft_fixup_qe_snum(void *blob) 406 { 407 unsigned int svr; 408 409 svr = mfspr(SPRN_SVR); 410 if (SVR_SOC_VER(svr) == SVR_8569_E) { 411 if(IS_SVR_REV(svr, 1, 0)) 412 do_fixup_by_compat_u32(blob, "fsl,qe", 413 "fsl,qe-num-snums", 46, 1); 414 else 415 do_fixup_by_compat_u32(blob, "fsl,qe", 416 "fsl,qe-num-snums", 76, 1); 417 } 418 } 419 #endif 420 421 /** 422 * fdt_fixup_fman_firmware -- insert the Fman firmware into the device tree 423 * 424 * The binding for an Fman firmware node is documented in 425 * Documentation/powerpc/dts-bindings/fsl/dpaa/fman.txt. This node contains 426 * the actual Fman firmware binary data. The operating system is expected to 427 * be able to parse the binary data to determine any attributes it needs. 428 */ 429 #ifdef CONFIG_SYS_DPAA_FMAN 430 void fdt_fixup_fman_firmware(void *blob) 431 { 432 int rc, fmnode, fwnode = -1; 433 uint32_t phandle; 434 struct qe_firmware *fmanfw; 435 const struct qe_header *hdr; 436 unsigned int length; 437 uint32_t crc; 438 const char *p; 439 440 /* The first Fman we find will contain the actual firmware. */ 441 fmnode = fdt_node_offset_by_compatible(blob, -1, "fsl,fman"); 442 if (fmnode < 0) 443 /* Exit silently if there are no Fman devices */ 444 return; 445 446 /* If we already have a firmware node, then also exit silently. */ 447 if (fdt_node_offset_by_compatible(blob, -1, "fsl,fman-firmware") > 0) 448 return; 449 450 /* If the environment variable is not set, then exit silently */ 451 p = getenv("fman_ucode"); 452 if (!p) 453 return; 454 455 fmanfw = (struct qe_firmware *) simple_strtoul(p, NULL, 0); 456 if (!fmanfw) 457 return; 458 459 hdr = &fmanfw->header; 460 length = be32_to_cpu(hdr->length); 461 462 /* Verify the firmware. */ 463 if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') || 464 (hdr->magic[2] != 'F')) { 465 printf("Data at %p is not an Fman firmware\n", fmanfw); 466 return; 467 } 468 469 if (length > CONFIG_SYS_FMAN_FW_LENGTH) { 470 printf("Fman firmware at %p is too large (size=%u)\n", 471 fmanfw, length); 472 return; 473 } 474 475 length -= sizeof(u32); /* Subtract the size of the CRC */ 476 crc = be32_to_cpu(*(u32 *)((void *)fmanfw + length)); 477 if (crc != crc32_no_comp(0, (void *)fmanfw, length)) { 478 printf("Fman firmware at %p has invalid CRC\n", fmanfw); 479 return; 480 } 481 482 /* Increase the size of the fdt to make room for the node. */ 483 rc = fdt_increase_size(blob, fmanfw->header.length); 484 if (rc < 0) { 485 printf("Unable to make room for Fman firmware: %s\n", 486 fdt_strerror(rc)); 487 return; 488 } 489 490 /* Create the firmware node. */ 491 fwnode = fdt_add_subnode(blob, fmnode, "fman-firmware"); 492 if (fwnode < 0) { 493 char s[64]; 494 fdt_get_path(blob, fmnode, s, sizeof(s)); 495 printf("Could not add firmware node to %s: %s\n", s, 496 fdt_strerror(fwnode)); 497 return; 498 } 499 rc = fdt_setprop_string(blob, fwnode, "compatible", "fsl,fman-firmware"); 500 if (rc < 0) { 501 char s[64]; 502 fdt_get_path(blob, fwnode, s, sizeof(s)); 503 printf("Could not add compatible property to node %s: %s\n", s, 504 fdt_strerror(rc)); 505 return; 506 } 507 phandle = fdt_create_phandle(blob, fwnode); 508 if (!phandle) { 509 char s[64]; 510 fdt_get_path(blob, fwnode, s, sizeof(s)); 511 printf("Could not add phandle property to node %s: %s\n", s, 512 fdt_strerror(rc)); 513 return; 514 } 515 rc = fdt_setprop(blob, fwnode, "fsl,firmware", fmanfw, fmanfw->header.length); 516 if (rc < 0) { 517 char s[64]; 518 fdt_get_path(blob, fwnode, s, sizeof(s)); 519 printf("Could not add firmware property to node %s: %s\n", s, 520 fdt_strerror(rc)); 521 return; 522 } 523 524 /* Find all other Fman nodes and point them to the firmware node. */ 525 while ((fmnode = fdt_node_offset_by_compatible(blob, fmnode, "fsl,fman")) > 0) { 526 rc = fdt_setprop_cell(blob, fmnode, "fsl,firmware-phandle", phandle); 527 if (rc < 0) { 528 char s[64]; 529 fdt_get_path(blob, fmnode, s, sizeof(s)); 530 printf("Could not add pointer property to node %s: %s\n", 531 s, fdt_strerror(rc)); 532 return; 533 } 534 } 535 } 536 #else 537 #define fdt_fixup_fman_firmware(x) 538 #endif 539 540 #if defined(CONFIG_PPC_P4080) || defined(CONFIG_PPC_P3060) 541 static void fdt_fixup_usb(void *fdt) 542 { 543 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 544 u32 rcwsr11 = in_be32(&gur->rcwsr[11]); 545 int off; 546 547 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph"); 548 if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) != 549 FSL_CORENET_RCWSR11_EC1_FM1_USB1) 550 fdt_status_disabled(fdt, off); 551 552 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr"); 553 if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) != 554 FSL_CORENET_RCWSR11_EC2_USB2) 555 fdt_status_disabled(fdt, off); 556 } 557 #else 558 #define fdt_fixup_usb(x) 559 #endif 560 561 void ft_cpu_setup(void *blob, bd_t *bd) 562 { 563 int off; 564 int val; 565 sys_info_t sysinfo; 566 567 /* delete crypto node if not on an E-processor */ 568 if (!IS_E_PROCESSOR(get_svr())) 569 fdt_fixup_crypto_node(blob, 0); 570 571 fdt_fixup_ethernet(blob); 572 573 fdt_add_enet_stashing(blob); 574 575 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, 576 "timebase-frequency", get_tbclk(), 1); 577 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, 578 "bus-frequency", bd->bi_busfreq, 1); 579 get_sys_info(&sysinfo); 580 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); 581 while (off != -FDT_ERR_NOTFOUND) { 582 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); 583 val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]); 584 fdt_setprop(blob, off, "clock-frequency", &val, 4); 585 off = fdt_node_offset_by_prop_value(blob, off, "device_type", 586 "cpu", 4); 587 } 588 do_fixup_by_prop_u32(blob, "device_type", "soc", 4, 589 "bus-frequency", bd->bi_busfreq, 1); 590 591 do_fixup_by_compat_u32(blob, "fsl,pq3-localbus", 592 "bus-frequency", gd->lbc_clk, 1); 593 do_fixup_by_compat_u32(blob, "fsl,elbc", 594 "bus-frequency", gd->lbc_clk, 1); 595 #ifdef CONFIG_QE 596 ft_qe_setup(blob); 597 ft_fixup_qe_snum(blob); 598 #endif 599 600 fdt_fixup_fman_firmware(blob); 601 602 #ifdef CONFIG_SYS_NS16550 603 do_fixup_by_compat_u32(blob, "ns16550", 604 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); 605 #endif 606 607 #ifdef CONFIG_CPM2 608 do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart", 609 "current-speed", bd->bi_baudrate, 1); 610 611 do_fixup_by_compat_u32(blob, "fsl,cpm2-brg", 612 "clock-frequency", bd->bi_brgfreq, 1); 613 #endif 614 615 #ifdef CONFIG_FSL_CORENET 616 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0", 617 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); 618 #endif 619 620 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); 621 622 #ifdef CONFIG_MP 623 ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize); 624 ft_fixup_num_cores(blob); 625 #endif 626 627 ft_fixup_cache(blob); 628 629 #if defined(CONFIG_FSL_ESDHC) 630 fdt_fixup_esdhc(blob, bd); 631 #endif 632 633 ft_fixup_dpaa_clks(blob); 634 635 #if defined(CONFIG_SYS_BMAN_MEM_PHYS) 636 fdt_portal(blob, "fsl,bman-portal", "bman-portals", 637 (u64)CONFIG_SYS_BMAN_MEM_PHYS, 638 CONFIG_SYS_BMAN_MEM_SIZE); 639 fdt_fixup_bportals(blob); 640 #endif 641 642 #if defined(CONFIG_SYS_QMAN_MEM_PHYS) 643 fdt_portal(blob, "fsl,qman-portal", "qman-portals", 644 (u64)CONFIG_SYS_QMAN_MEM_PHYS, 645 CONFIG_SYS_QMAN_MEM_SIZE); 646 647 fdt_fixup_qportals(blob); 648 #endif 649 650 #ifdef CONFIG_SYS_SRIO 651 ft_srio_setup(blob); 652 #endif 653 654 /* 655 * system-clock = CCB clock/2 656 * Here gd->bus_clk = CCB clock 657 * We are using the system clock as 1588 Timer reference 658 * clock source select 659 */ 660 do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer", 661 "timer-frequency", gd->bus_clk/2, 1); 662 663 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0", 664 "clock_freq", gd->bus_clk, 1); 665 666 fdt_fixup_usb(blob); 667 } 668 669 /* 670 * For some CCSR devices, we only have the virtual address, not the physical 671 * address. This is because we map CCSR as a whole, so we typically don't need 672 * a macro for the physical address of any device within CCSR. In this case, 673 * we calculate the physical address of that device using it's the difference 674 * between the virtual address of the device and the virtual address of the 675 * beginning of CCSR. 676 */ 677 #define CCSR_VIRT_TO_PHYS(x) \ 678 (CONFIG_SYS_CCSRBAR_PHYS + ((x) - CONFIG_SYS_CCSRBAR)) 679 680 /* 681 * Verify the device tree 682 * 683 * This function compares several CONFIG_xxx macros that contain physical 684 * addresses with the corresponding nodes in the device tree, to see if 685 * the physical addresses are all correct. For example, if 686 * CONFIG_SYS_NS16550_COM1 is defined, then it contains the virtual address 687 * of the first UART. We convert this to a physical address and compare 688 * that with the physical address of the first ns16550-compatible node 689 * in the device tree. If they don't match, then we display a warning. 690 * 691 * Returns 1 on success, 0 on failure 692 */ 693 int ft_verify_fdt(void *fdt) 694 { 695 uint64_t ccsr = 0; 696 int aliases; 697 int off; 698 699 /* First check the CCSR base address */ 700 off = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "soc", 4); 701 if (off > 0) 702 ccsr = fdt_get_base_address(fdt, off); 703 704 if (!ccsr) { 705 printf("Warning: could not determine base CCSR address in " 706 "device tree\n"); 707 /* No point in checking anything else */ 708 return 0; 709 } 710 711 if (ccsr != CONFIG_SYS_CCSRBAR_PHYS) { 712 printf("Warning: U-Boot configured CCSR at address %llx,\n" 713 "but the device tree has it at %llx\n", 714 (uint64_t) CONFIG_SYS_CCSRBAR_PHYS, ccsr); 715 /* No point in checking anything else */ 716 return 0; 717 } 718 719 /* 720 * Get the 'aliases' node. If there isn't one, then there's nothing 721 * left to do. 722 */ 723 aliases = fdt_path_offset(fdt, "/aliases"); 724 if (aliases > 0) { 725 #ifdef CONFIG_SYS_NS16550_COM1 726 if (!fdt_verify_alias_address(fdt, aliases, "serial0", 727 CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM1))) 728 return 0; 729 #endif 730 731 #ifdef CONFIG_SYS_NS16550_COM2 732 if (!fdt_verify_alias_address(fdt, aliases, "serial1", 733 CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM2))) 734 return 0; 735 #endif 736 } 737 738 return 1; 739 } 740