1 /* 2 * Copyright 2010-2011 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <command.h> 9 #include <linux/compiler.h> 10 #include <asm/fsl_errata.h> 11 #include <asm/processor.h> 12 #include "fsl_corenet_serdes.h" 13 14 #ifdef CONFIG_SYS_FSL_ERRATUM_A004849 15 /* 16 * This work-around is implemented in PBI, so just check to see if the 17 * work-around was actually applied. To do this, we check for specific data 18 * at specific addresses in DCSR. 19 * 20 * Array offsets[] contains a list of offsets within DCSR. According to the 21 * erratum document, the value at each offset should be 2. 22 */ 23 static void check_erratum_a4849(uint32_t svr) 24 { 25 void __iomem *dcsr = (void *)CONFIG_SYS_DCSRBAR + 0xb0000; 26 unsigned int i; 27 28 #if defined(CONFIG_PPC_P2041) || defined(CONFIG_PPC_P3041) 29 static const uint8_t offsets[] = { 30 0x50, 0x54, 0x58, 0x90, 0x94, 0x98 31 }; 32 #endif 33 #ifdef CONFIG_PPC_P4080 34 static const uint8_t offsets[] = { 35 0x60, 0x64, 0x68, 0x6c, 0xa0, 0xa4, 0xa8, 0xac 36 }; 37 #endif 38 uint32_t x108; /* The value that should be at offset 0x108 */ 39 40 for (i = 0; i < ARRAY_SIZE(offsets); i++) { 41 if (in_be32(dcsr + offsets[i]) != 2) { 42 printf("Work-around for Erratum A004849 is not enabled\n"); 43 return; 44 } 45 } 46 47 #if defined(CONFIG_PPC_P2041) || defined(CONFIG_PPC_P3041) 48 x108 = 0x12; 49 #endif 50 51 #ifdef CONFIG_PPC_P4080 52 /* 53 * For P4080, the erratum document says that the value at offset 0x108 54 * should be 0x12 on rev2, or 0x1c on rev3. 55 */ 56 if (SVR_MAJ(svr) == 2) 57 x108 = 0x12; 58 if (SVR_MAJ(svr) == 3) 59 x108 = 0x1c; 60 #endif 61 62 if (in_be32(dcsr + 0x108) != x108) { 63 printf("Work-around for Erratum A004849 is not enabled\n"); 64 return; 65 } 66 67 /* Everything matches, so the erratum work-around was applied */ 68 69 printf("Work-around for Erratum A004849 enabled\n"); 70 } 71 #endif 72 73 #ifdef CONFIG_SYS_FSL_ERRATUM_A004580 74 /* 75 * This work-around is implemented in PBI, so just check to see if the 76 * work-around was actually applied. To do this, we check for specific data 77 * at specific addresses in the SerDes register block. 78 * 79 * The work-around says that for each SerDes lane, write BnTTLCRy0 = 80 * 0x1B00_0001, Register 2 = 0x0088_0000, and Register 3 = 0x4000_0000. 81 82 */ 83 static void check_erratum_a4580(uint32_t svr) 84 { 85 const serdes_corenet_t __iomem *srds_regs = 86 (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR; 87 unsigned int lane; 88 89 for (lane = 0; lane < SRDS_MAX_LANES; lane++) { 90 if (serdes_lane_enabled(lane)) { 91 const struct serdes_lane __iomem *srds_lane = 92 &srds_regs->lane[serdes_get_lane_idx(lane)]; 93 94 /* 95 * Verify that the values we were supposed to write in 96 * the PBI are actually there. Also, the lower 15 97 * bits of res4[3] should be the same as the upper 15 98 * bits of res4[1]. 99 */ 100 if ((in_be32(&srds_lane->ttlcr0) != 0x1b000001) || 101 (in_be32(&srds_lane->res4[1]) != 0x880000) || 102 (in_be32(&srds_lane->res4[3]) != 0x40000044)) { 103 printf("Work-around for Erratum A004580 is " 104 "not enabled\n"); 105 return; 106 } 107 } 108 } 109 110 /* Everything matches, so the erratum work-around was applied */ 111 112 printf("Work-around for Erratum A004580 enabled\n"); 113 } 114 #endif 115 116 static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 117 { 118 #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 119 extern int enable_cpu_a011_workaround; 120 #endif 121 __maybe_unused u32 svr = get_svr(); 122 123 #if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001) 124 if (IS_SVR_REV(svr, 1, 0)) { 125 switch (SVR_SOC_VER(svr)) { 126 case SVR_P1013: 127 case SVR_P1022: 128 puts("Work-around for Erratum SATA A001 enabled\n"); 129 } 130 } 131 #endif 132 133 #if defined(CONFIG_SYS_P4080_ERRATUM_SERDES8) 134 puts("Work-around for Erratum SERDES8 enabled\n"); 135 #endif 136 #if defined(CONFIG_SYS_P4080_ERRATUM_SERDES9) 137 puts("Work-around for Erratum SERDES9 enabled\n"); 138 #endif 139 #if defined(CONFIG_SYS_P4080_ERRATUM_SERDES_A005) 140 puts("Work-around for Erratum SERDES-A005 enabled\n"); 141 #endif 142 #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) 143 if (SVR_MAJ(svr) < 3) 144 puts("Work-around for Erratum CPU22 enabled\n"); 145 #endif 146 #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 147 /* 148 * NMG_CPU_A011 applies to P4080 rev 1.0, 2.0, fixed in 3.0 149 * also applies to P3041 rev 1.0, 1.1, P2041 rev 1.0, 1.1 150 * The SVR has been checked by cpu_init_r(). 151 */ 152 if (enable_cpu_a011_workaround) 153 puts("Work-around for Erratum CPU-A011 enabled\n"); 154 #endif 155 #if defined(CONFIG_SYS_FSL_ERRATUM_CPU_A003999) 156 puts("Work-around for Erratum CPU-A003999 enabled\n"); 157 #endif 158 #if defined(CONFIG_SYS_FSL_ERRATUM_DDR_A003474) 159 puts("Work-around for Erratum DDR-A003474 enabled\n"); 160 #endif 161 #if defined(CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN) 162 puts("Work-around for DDR MSYNC_IN Erratum enabled\n"); 163 #endif 164 #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC111) 165 puts("Work-around for Erratum ESDHC111 enabled\n"); 166 #endif 167 #ifdef CONFIG_SYS_FSL_ERRATUM_A004468 168 puts("Work-around for Erratum A004468 enabled\n"); 169 #endif 170 #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC135) 171 puts("Work-around for Erratum ESDHC135 enabled\n"); 172 #endif 173 #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC13) 174 if (SVR_MAJ(svr) < 3) 175 puts("Work-around for Erratum ESDHC13 enabled\n"); 176 #endif 177 #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC_A001) 178 puts("Work-around for Erratum ESDHC-A001 enabled\n"); 179 #endif 180 #ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002 181 puts("Work-around for Erratum CPC-A002 enabled\n"); 182 #endif 183 #ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A003 184 puts("Work-around for Erratum CPC-A003 enabled\n"); 185 #endif 186 #ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001 187 puts("Work-around for Erratum ELBC-A001 enabled\n"); 188 #endif 189 #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003 190 puts("Work-around for Erratum DDR-A003 enabled\n"); 191 #endif 192 #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_115 193 puts("Work-around for Erratum DDR115 enabled\n"); 194 #endif 195 #ifdef CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134 196 puts("Work-around for Erratum DDR111 enabled\n"); 197 puts("Work-around for Erratum DDR134 enabled\n"); 198 #endif 199 #ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A002769 200 puts("Work-around for Erratum IFC-A002769 enabled\n"); 201 #endif 202 #ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549 203 puts("Work-around for Erratum P1010-A003549 enabled\n"); 204 #endif 205 #ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A003399 206 puts("Work-around for Erratum IFC A-003399 enabled\n"); 207 #endif 208 #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_DDR120 209 if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0)) 210 puts("Work-around for Erratum NMG DDR120 enabled\n"); 211 #endif 212 #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_LBC103 213 puts("Work-around for Erratum NMG_LBC103 enabled\n"); 214 #endif 215 #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129 216 if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0)) 217 puts("Work-around for Erratum NMG ETSEC129 enabled\n"); 218 #endif 219 #ifdef CONFIG_SYS_FSL_ERRATUM_A004510 220 puts("Work-around for Erratum A004510 enabled\n"); 221 #endif 222 #ifdef CONFIG_SYS_FSL_ERRATUM_SRIO_A004034 223 puts("Work-around for Erratum SRIO-A004034 enabled\n"); 224 #endif 225 #ifdef CONFIG_SYS_FSL_ERRATUM_A_004934 226 puts("Work-around for Erratum A004934 enabled\n"); 227 #endif 228 #ifdef CONFIG_SYS_FSL_ERRATUM_A005871 229 if (IS_SVR_REV(svr, 1, 0)) 230 puts("Work-around for Erratum A005871 enabled\n"); 231 #endif 232 #ifdef CONFIG_SYS_FSL_ERRATUM_A006475 233 if (SVR_MAJ(get_svr()) == 1) 234 puts("Work-around for Erratum A006475 enabled\n"); 235 #endif 236 #ifdef CONFIG_SYS_FSL_ERRATUM_A006384 237 if (SVR_MAJ(get_svr()) == 1) 238 puts("Work-around for Erratum A006384 enabled\n"); 239 #endif 240 #ifdef CONFIG_SYS_FSL_ERRATUM_A004849 241 /* This work-around is implemented in PBI, so just check for it */ 242 check_erratum_a4849(svr); 243 #endif 244 #ifdef CONFIG_SYS_FSL_ERRATUM_A004580 245 /* This work-around is implemented in PBI, so just check for it */ 246 check_erratum_a4580(svr); 247 #endif 248 #ifdef CONFIG_SYS_P4080_ERRATUM_PCIE_A003 249 puts("Work-around for Erratum PCIe-A003 enabled\n"); 250 #endif 251 #ifdef CONFIG_SYS_FSL_ERRATUM_USB14 252 puts("Work-around for Erratum USB14 enabled\n"); 253 #endif 254 #ifdef CONFIG_SYS_FSL_ERRATUM_A006593 255 puts("Work-around for Erratum A006593 enabled\n"); 256 #endif 257 #ifdef CONFIG_SYS_FSL_ERRATUM_A006379 258 if (has_erratum_a006379()) 259 puts("Work-around for Erratum A006379 enabled\n"); 260 #endif 261 #ifdef CONFIG_SYS_FSL_ERRATUM_SEC_A003571 262 if (IS_SVR_REV(svr, 1, 0)) 263 puts("Work-around for Erratum A003571 enabled\n"); 264 #endif 265 #ifdef CONFIG_SYS_FSL_ERRATUM_A005812 266 puts("Work-around for Erratum A-005812 enabled\n"); 267 #endif 268 #ifdef CONFIG_SYS_FSL_ERRATUM_A005125 269 puts("Work-around for Erratum A005125 enabled\n"); 270 #endif 271 #ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447 272 if ((SVR_SOC_VER(svr) == SVR_8548 && IS_SVR_REV(svr, 3, 1)) || 273 (SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV)) 274 puts("Work-around for Erratum I2C-A004447 enabled\n"); 275 #endif 276 #ifdef CONFIG_SYS_FSL_ERRATUM_A006261 277 if (has_erratum_a006261()) 278 puts("Work-around for Erratum A006261 enabled\n"); 279 #endif 280 return 0; 281 } 282 283 U_BOOT_CMD( 284 errata, 1, 0, do_errata, 285 "Report errata workarounds", 286 "" 287 ); 288