xref: /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/Makefile (revision ee52b188) 
1#
2# (C) Copyright 2006
3# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
5# (C) Copyright 2002,2003 Motorola Inc.
6# Xianghua Xiao,X.Xiao@motorola.com
7#
8# See file CREDITS for list of people who contributed to this
9# project.
10#
11# This program is free software; you can redistribute it and/or
12# modify it under the terms of the GNU General Public License as
13# published by the Free Software Foundation; either version 2 of
14# the License, or (at your option) any later version.
15#
16# This program is distributed in the hope that it will be useful,
17# but WITHOUT ANY WARRANTY; without even the implied warranty of
18# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19# GNU General Public License for more details.
20#
21# You should have received a copy of the GNU General Public License
22# along with this program; if not, write to the Free Software
23# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24# MA 02111-1307 USA
25#
26
27include $(TOPDIR)/config.mk
28
29LIB	= $(obj)lib$(CPU).o
30
31START	= start.o resetvec.o
32SOBJS-$(CONFIG_MP)	+= release.o
33SOBJS	= $(SOBJS-y)
34
35COBJS-$(CONFIG_CMD_ERRATA) += cmd_errata.o
36COBJS-$(CONFIG_CPM2)	+= commproc.o
37
38# supports ddr1
39COBJS-$(CONFIG_MPC8540) += ddr-gen1.o
40COBJS-$(CONFIG_MPC8560) += ddr-gen1.o
41COBJS-$(CONFIG_MPC8541) += ddr-gen1.o
42COBJS-$(CONFIG_MPC8555) += ddr-gen1.o
43
44# supports ddr1/2
45COBJS-$(CONFIG_MPC8548) += ddr-gen2.o
46COBJS-$(CONFIG_MPC8568) += ddr-gen2.o
47COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
48
49# supports ddr1/2/3
50COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
51COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
52COBJS-$(CONFIG_MPC8569)	+= ddr-gen3.o
53COBJS-$(CONFIG_P1010)	+= ddr-gen3.o
54COBJS-$(CONFIG_P1011)	+= ddr-gen3.o
55COBJS-$(CONFIG_P1012)	+= ddr-gen3.o
56COBJS-$(CONFIG_P1013)	+= ddr-gen3.o
57COBJS-$(CONFIG_P1014)	+= ddr-gen3.o
58COBJS-$(CONFIG_P1020)	+= ddr-gen3.o
59COBJS-$(CONFIG_P1021)	+= ddr-gen3.o
60COBJS-$(CONFIG_P1022)	+= ddr-gen3.o
61COBJS-$(CONFIG_P1024)	+= ddr-gen3.o
62COBJS-$(CONFIG_P1025)	+= ddr-gen3.o
63COBJS-$(CONFIG_P2010)	+= ddr-gen3.o
64COBJS-$(CONFIG_P2020)	+= ddr-gen3.o
65COBJS-$(CONFIG_PPC_P2041)	+= ddr-gen3.o
66COBJS-$(CONFIG_PPC_P3041)	+= ddr-gen3.o
67COBJS-$(CONFIG_PPC_P4080)	+= ddr-gen3.o
68COBJS-$(CONFIG_PPC_P5020)	+= ddr-gen3.o
69COBJS-$(CONFIG_PPC_P5040)	+= ddr-gen3.o
70COBJS-$(CONFIG_PPC_T4240)	+= ddr-gen3.o
71COBJS-$(CONFIG_PPC_B4860)	+= ddr-gen3.o
72COBJS-$(CONFIG_BSC9131)		+= ddr-gen3.o
73
74COBJS-$(CONFIG_CPM2)	+= ether_fcc.o
75COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
76COBJS-$(CONFIG_FSL_CORENET) += liodn.o
77COBJS-$(CONFIG_MP)	+= mp.o
78COBJS-$(CONFIG_PCI)	+= pci.o
79COBJS-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
80
81# various SoC specific assignments
82COBJS-$(CONFIG_PPC_P2041) += p2041_ids.o
83COBJS-$(CONFIG_PPC_P3041) += p3041_ids.o
84COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o
85COBJS-$(CONFIG_PPC_P5020) += p5020_ids.o
86COBJS-$(CONFIG_PPC_P5040) += p5040_ids.o
87COBJS-$(CONFIG_PPC_T4240) += t4240_ids.o
88COBJS-$(CONFIG_PPC_B4860) += b4860_ids.o
89
90COBJS-$(CONFIG_QE)	+= qe_io.o
91COBJS-$(CONFIG_CPM2)	+= serial_scc.o
92COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o
93COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
94
95# SoC specific SERDES support
96COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
97COBJS-$(CONFIG_MPC8544) += mpc8544_serdes.o
98COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o
99COBJS-$(CONFIG_MPC8568) += mpc8568_serdes.o
100COBJS-$(CONFIG_MPC8569) += mpc8569_serdes.o
101COBJS-$(CONFIG_MPC8572) += mpc8572_serdes.o
102COBJS-$(CONFIG_P1010)	+= p1010_serdes.o
103COBJS-$(CONFIG_P1011)	+= p1021_serdes.o
104COBJS-$(CONFIG_P1012)	+= p1021_serdes.o
105COBJS-$(CONFIG_P1013)	+= p1022_serdes.o
106COBJS-$(CONFIG_P1014)	+= p1010_serdes.o
107COBJS-$(CONFIG_P1017)	+= p1023_serdes.o
108COBJS-$(CONFIG_P1020)	+= p1021_serdes.o
109COBJS-$(CONFIG_P1021)	+= p1021_serdes.o
110COBJS-$(CONFIG_P1022)	+= p1022_serdes.o
111COBJS-$(CONFIG_P1023)	+= p1023_serdes.o
112COBJS-$(CONFIG_P1024)	+= p1021_serdes.o
113COBJS-$(CONFIG_P1025)	+= p1021_serdes.o
114COBJS-$(CONFIG_P2010)	+= p2020_serdes.o
115COBJS-$(CONFIG_P2020)	+= p2020_serdes.o
116COBJS-$(CONFIG_PPC_P2041) += p2041_serdes.o
117COBJS-$(CONFIG_PPC_P3041) += p3041_serdes.o
118COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o
119COBJS-$(CONFIG_PPC_P5020) += p5020_serdes.o
120COBJS-$(CONFIG_PPC_P5040) += p5040_serdes.o
121COBJS-$(CONFIG_PPC_T4240) += t4240_serdes.o
122COBJS-$(CONFIG_PPC_B4860) += b4860_serdes.o
123
124COBJS	= $(COBJS-y)
125COBJS	+= cpu.o
126COBJS	+= cpu_init.o
127COBJS	+= cpu_init_early.o
128COBJS	+= interrupts.o
129COBJS	+= speed.o
130COBJS	+= tlb.o
131COBJS	+= traps.o
132
133# Stub implementations of cache management functions for USB
134COBJS += cache.o
135
136SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
137OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
138START	:= $(addprefix $(obj),$(START))
139
140all:	$(obj).depend $(START) $(LIB)
141
142$(LIB):	$(OBJS)
143	$(call cmd_link_o_target, $(OBJS))
144
145#########################################################################
146
147# defines $(obj).depend target
148include $(SRCTREE)/rules.mk
149
150sinclude $(obj).depend
151
152#########################################################################
153