xref: /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/Makefile (revision b46694df) 
1#
2# (C) Copyright 2006
3# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
5# (C) Copyright 2002,2003 Motorola Inc.
6# Xianghua Xiao,X.Xiao@motorola.com
7#
8# See file CREDITS for list of people who contributed to this
9# project.
10#
11# This program is free software; you can redistribute it and/or
12# modify it under the terms of the GNU General Public License as
13# published by the Free Software Foundation; either version 2 of
14# the License, or (at your option) any later version.
15#
16# This program is distributed in the hope that it will be useful,
17# but WITHOUT ANY WARRANTY; without even the implied warranty of
18# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19# GNU General Public License for more details.
20#
21# You should have received a copy of the GNU General Public License
22# along with this program; if not, write to the Free Software
23# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24# MA 02111-1307 USA
25#
26
27include $(TOPDIR)/config.mk
28
29LIB	= $(obj)lib$(CPU).o
30
31MINIMAL=
32
33ifdef CONFIG_SPL_BUILD
34ifdef CONFIG_SPL_INIT_MINIMAL
35MINIMAL=y
36endif
37endif
38
39START = start.o resetvec.o
40
41ifdef MINIMAL
42
43COBJS-y	+= cpu_init_early.o tlb.o spl_minimal.o
44
45else
46
47SOBJS-$(CONFIG_MP)	+= release.o
48SOBJS	= $(SOBJS-y)
49
50COBJS-$(CONFIG_CMD_ERRATA) += cmd_errata.o
51COBJS-$(CONFIG_CPM2)	+= commproc.o
52
53# supports ddr1
54COBJS-$(CONFIG_MPC8540) += ddr-gen1.o
55COBJS-$(CONFIG_MPC8560) += ddr-gen1.o
56COBJS-$(CONFIG_MPC8541) += ddr-gen1.o
57COBJS-$(CONFIG_MPC8555) += ddr-gen1.o
58
59# supports ddr1/2
60COBJS-$(CONFIG_MPC8548) += ddr-gen2.o
61COBJS-$(CONFIG_MPC8568) += ddr-gen2.o
62COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
63
64# supports ddr1/2/3
65COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
66COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
67COBJS-$(CONFIG_MPC8569)	+= ddr-gen3.o
68COBJS-$(CONFIG_P1010)	+= ddr-gen3.o
69COBJS-$(CONFIG_P1011)	+= ddr-gen3.o
70COBJS-$(CONFIG_P1012)	+= ddr-gen3.o
71COBJS-$(CONFIG_P1013)	+= ddr-gen3.o
72COBJS-$(CONFIG_P1014)	+= ddr-gen3.o
73COBJS-$(CONFIG_P1020)	+= ddr-gen3.o
74COBJS-$(CONFIG_P1021)	+= ddr-gen3.o
75COBJS-$(CONFIG_P1022)	+= ddr-gen3.o
76COBJS-$(CONFIG_P1024)	+= ddr-gen3.o
77COBJS-$(CONFIG_P1025)	+= ddr-gen3.o
78COBJS-$(CONFIG_P2010)	+= ddr-gen3.o
79COBJS-$(CONFIG_P2020)	+= ddr-gen3.o
80COBJS-$(CONFIG_PPC_P2041)	+= ddr-gen3.o
81COBJS-$(CONFIG_PPC_P3041)	+= ddr-gen3.o
82COBJS-$(CONFIG_PPC_P4080)	+= ddr-gen3.o
83COBJS-$(CONFIG_PPC_P5020)	+= ddr-gen3.o
84COBJS-$(CONFIG_PPC_P5040)	+= ddr-gen3.o
85COBJS-$(CONFIG_PPC_T4240)	+= ddr-gen3.o
86COBJS-$(CONFIG_PPC_T4160)	+= ddr-gen3.o
87COBJS-$(CONFIG_PPC_B4420)	+= ddr-gen3.o
88COBJS-$(CONFIG_PPC_B4860)	+= ddr-gen3.o
89COBJS-$(CONFIG_BSC9131)		+= ddr-gen3.o
90COBJS-$(CONFIG_BSC9132)		+= ddr-gen3.o
91COBJS-$(CONFIG_PPC_T1040)	+= ddr-gen3.o
92
93COBJS-$(CONFIG_CPM2)	+= ether_fcc.o
94COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
95COBJS-$(CONFIG_FSL_CORENET) += liodn.o
96COBJS-$(CONFIG_MP)	+= mp.o
97COBJS-$(CONFIG_PCI)	+= pci.o
98COBJS-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
99
100# various SoC specific assignments
101COBJS-$(CONFIG_PPC_P2041) += p2041_ids.o
102COBJS-$(CONFIG_PPC_P3041) += p3041_ids.o
103COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o
104COBJS-$(CONFIG_PPC_P5020) += p5020_ids.o
105COBJS-$(CONFIG_PPC_P5040) += p5040_ids.o
106COBJS-$(CONFIG_PPC_T4240) += t4240_ids.o
107COBJS-$(CONFIG_PPC_T4160) += t4240_ids.o
108COBJS-$(CONFIG_PPC_B4420) += b4860_ids.o
109COBJS-$(CONFIG_PPC_B4860) += b4860_ids.o
110COBJS-$(CONFIG_PPC_T1040) += t1040_ids.o
111
112COBJS-$(CONFIG_QE)	+= qe_io.o
113COBJS-$(CONFIG_CPM2)	+= serial_scc.o
114COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o
115COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
116
117# SoC specific SERDES support
118COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
119COBJS-$(CONFIG_MPC8544) += mpc8544_serdes.o
120COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o
121COBJS-$(CONFIG_MPC8568) += mpc8568_serdes.o
122COBJS-$(CONFIG_MPC8569) += mpc8569_serdes.o
123COBJS-$(CONFIG_MPC8572) += mpc8572_serdes.o
124COBJS-$(CONFIG_P1010)	+= p1010_serdes.o
125COBJS-$(CONFIG_P1011)	+= p1021_serdes.o
126COBJS-$(CONFIG_P1012)	+= p1021_serdes.o
127COBJS-$(CONFIG_P1013)	+= p1022_serdes.o
128COBJS-$(CONFIG_P1014)	+= p1010_serdes.o
129COBJS-$(CONFIG_P1017)	+= p1023_serdes.o
130COBJS-$(CONFIG_P1020)	+= p1021_serdes.o
131COBJS-$(CONFIG_P1021)	+= p1021_serdes.o
132COBJS-$(CONFIG_P1022)	+= p1022_serdes.o
133COBJS-$(CONFIG_P1023)	+= p1023_serdes.o
134COBJS-$(CONFIG_P1024)	+= p1021_serdes.o
135COBJS-$(CONFIG_P1025)	+= p1021_serdes.o
136COBJS-$(CONFIG_P2010)	+= p2020_serdes.o
137COBJS-$(CONFIG_P2020)	+= p2020_serdes.o
138COBJS-$(CONFIG_PPC_P2041) += p2041_serdes.o
139COBJS-$(CONFIG_PPC_P3041) += p3041_serdes.o
140COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o
141COBJS-$(CONFIG_PPC_P5020) += p5020_serdes.o
142COBJS-$(CONFIG_PPC_P5040) += p5040_serdes.o
143COBJS-$(CONFIG_PPC_T4240) += t4240_serdes.o
144COBJS-$(CONFIG_PPC_T4160) += t4240_serdes.o
145COBJS-$(CONFIG_PPC_B4420) += b4860_serdes.o
146COBJS-$(CONFIG_PPC_B4860) += b4860_serdes.o
147COBJS-$(CONFIG_BSC9132) += bsc9132_serdes.o
148COBJS-$(CONFIG_PPC_T1040) += t1040_serdes.o
149
150COBJS-y	+= cpu.o
151COBJS-y	+= cpu_init.o
152COBJS-y	+= cpu_init_early.o
153COBJS-y	+= interrupts.o
154COBJS-y	+= speed.o
155COBJS-y	+= tlb.o
156COBJS-y	+= traps.o
157
158# Stub implementations of cache management functions for USB
159COBJS-y += cache.o
160
161endif # not minimal
162
163COBJS	= $(COBJS-y)
164
165SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
166OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
167START	:= $(addprefix $(obj),$(START))
168
169all:	$(obj).depend $(START) $(LIB)
170
171$(LIB):	$(OBJS)
172	$(call cmd_link_o_target, $(OBJS))
173
174#########################################################################
175
176# defines $(obj).depend target
177include $(SRCTREE)/rules.mk
178
179sinclude $(obj).depend
180
181#########################################################################
182