xref: /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/Kconfig (revision 8f6d5bbb)
1menu "mpc85xx CPU"
2	depends on MPC85xx
3
4config SYS_CPU
5	default "mpc85xx"
6
7config CMD_ERRATA
8	bool "Enable the 'errata' command"
9	depends on MPC85xx
10	default y
11	help
12	  This enables the 'errata' command which displays a list of errata
13	  work-arounds which are enabled for the current board.
14
15choice
16	prompt "Target select"
17	optional
18
19config TARGET_SBC8548
20	bool "Support sbc8548"
21	select ARCH_MPC8548
22
23config TARGET_SOCRATES
24	bool "Support socrates"
25	select ARCH_MPC8544
26
27config TARGET_B4420QDS
28	bool "Support B4420QDS"
29	select ARCH_B4420
30	select SUPPORT_SPL
31	select PHYS_64BIT
32	imply PANIC_HANG
33
34config TARGET_B4860QDS
35	bool "Support B4860QDS"
36	select ARCH_B4860
37	select BOARD_LATE_INIT if CHAIN_OF_TRUST
38	select SUPPORT_SPL
39	select PHYS_64BIT
40	select FSL_DDR_INTERACTIVE if !SPL_BUILD
41	imply PANIC_HANG
42
43config TARGET_BSC9131RDB
44	bool "Support BSC9131RDB"
45	select ARCH_BSC9131
46	select SUPPORT_SPL
47	select BOARD_EARLY_INIT_F
48
49config TARGET_BSC9132QDS
50	bool "Support BSC9132QDS"
51	select ARCH_BSC9132
52	select BOARD_LATE_INIT if CHAIN_OF_TRUST
53	select SUPPORT_SPL
54	select BOARD_EARLY_INIT_F
55	select FSL_DDR_INTERACTIVE
56
57config TARGET_C29XPCIE
58	bool "Support C29XPCIE"
59	select ARCH_C29X
60	select BOARD_LATE_INIT if CHAIN_OF_TRUST
61	select SUPPORT_SPL
62	select SUPPORT_TPL
63	select PHYS_64BIT
64	imply PANIC_HANG
65
66config TARGET_P3041DS
67	bool "Support P3041DS"
68	select PHYS_64BIT
69	select ARCH_P3041
70	select BOARD_LATE_INIT if CHAIN_OF_TRUST
71	imply CMD_SATA
72	imply PANIC_HANG
73
74config TARGET_P4080DS
75	bool "Support P4080DS"
76	select PHYS_64BIT
77	select ARCH_P4080
78	select BOARD_LATE_INIT if CHAIN_OF_TRUST
79	imply CMD_SATA
80	imply PANIC_HANG
81
82config TARGET_P5020DS
83	bool "Support P5020DS"
84	select PHYS_64BIT
85	select ARCH_P5020
86	select BOARD_LATE_INIT if CHAIN_OF_TRUST
87	imply CMD_SATA
88	imply PANIC_HANG
89
90config TARGET_P5040DS
91	bool "Support P5040DS"
92	select PHYS_64BIT
93	select ARCH_P5040
94	select BOARD_LATE_INIT if CHAIN_OF_TRUST
95	imply CMD_SATA
96	imply PANIC_HANG
97
98config TARGET_MPC8536DS
99	bool "Support MPC8536DS"
100	select ARCH_MPC8536
101# Use DDR3 controller with DDR2 DIMMs on this board
102	select SYS_FSL_DDRC_GEN3
103	imply CMD_SATA
104	imply FSL_SATA
105
106config TARGET_MPC8541CDS
107	bool "Support MPC8541CDS"
108	select ARCH_MPC8541
109
110config TARGET_MPC8544DS
111	bool "Support MPC8544DS"
112	select ARCH_MPC8544
113	imply PANIC_HANG
114
115config TARGET_MPC8548CDS
116	bool "Support MPC8548CDS"
117	select ARCH_MPC8548
118
119config TARGET_MPC8555CDS
120	bool "Support MPC8555CDS"
121	select ARCH_MPC8555
122
123config TARGET_MPC8568MDS
124	bool "Support MPC8568MDS"
125	select ARCH_MPC8568
126
127config TARGET_MPC8569MDS
128	bool "Support MPC8569MDS"
129	select ARCH_MPC8569
130
131config TARGET_MPC8572DS
132	bool "Support MPC8572DS"
133	select ARCH_MPC8572
134# Use DDR3 controller with DDR2 DIMMs on this board
135	select SYS_FSL_DDRC_GEN3
136	imply SCSI
137	imply PANIC_HANG
138
139config TARGET_P1010RDB_PA
140	bool "Support P1010RDB_PA"
141	select ARCH_P1010
142	select BOARD_LATE_INIT if CHAIN_OF_TRUST
143	select SUPPORT_SPL
144	select SUPPORT_TPL
145	imply CMD_EEPROM
146	imply CMD_SATA
147	imply PANIC_HANG
148
149config TARGET_P1010RDB_PB
150	bool "Support P1010RDB_PB"
151	select ARCH_P1010
152	select BOARD_LATE_INIT if CHAIN_OF_TRUST
153	select SUPPORT_SPL
154	select SUPPORT_TPL
155	imply CMD_EEPROM
156	imply CMD_SATA
157	imply PANIC_HANG
158
159config TARGET_P1022DS
160	bool "Support P1022DS"
161	select ARCH_P1022
162	select SUPPORT_SPL
163	select SUPPORT_TPL
164	imply CMD_SATA
165	imply FSL_SATA
166
167config TARGET_P1023RDB
168	bool "Support P1023RDB"
169	select ARCH_P1023
170	select FSL_DDR_INTERACTIVE
171	imply CMD_EEPROM
172	imply PANIC_HANG
173
174config TARGET_P1020MBG
175	bool "Support P1020MBG-PC"
176	select SUPPORT_SPL
177	select SUPPORT_TPL
178	select ARCH_P1020
179	imply CMD_EEPROM
180	imply CMD_SATA
181	imply PANIC_HANG
182
183config TARGET_P1020RDB_PC
184	bool "Support P1020RDB-PC"
185	select SUPPORT_SPL
186	select SUPPORT_TPL
187	select ARCH_P1020
188	imply CMD_EEPROM
189	imply CMD_SATA
190	imply PANIC_HANG
191
192config TARGET_P1020RDB_PD
193	bool "Support P1020RDB-PD"
194	select SUPPORT_SPL
195	select SUPPORT_TPL
196	select ARCH_P1020
197	imply CMD_EEPROM
198	imply CMD_SATA
199	imply PANIC_HANG
200
201config TARGET_P1020UTM
202	bool "Support P1020UTM"
203	select SUPPORT_SPL
204	select SUPPORT_TPL
205	select ARCH_P1020
206	imply CMD_EEPROM
207	imply CMD_SATA
208	imply PANIC_HANG
209
210config TARGET_P1021RDB
211	bool "Support P1021RDB"
212	select SUPPORT_SPL
213	select SUPPORT_TPL
214	select ARCH_P1021
215	imply CMD_EEPROM
216	imply CMD_SATA
217	imply PANIC_HANG
218
219config TARGET_P1024RDB
220	bool "Support P1024RDB"
221	select SUPPORT_SPL
222	select SUPPORT_TPL
223	select ARCH_P1024
224	imply CMD_EEPROM
225	imply CMD_SATA
226	imply PANIC_HANG
227
228config TARGET_P1025RDB
229	bool "Support P1025RDB"
230	select SUPPORT_SPL
231	select SUPPORT_TPL
232	select ARCH_P1025
233	imply CMD_EEPROM
234	imply CMD_SATA
235	imply SATA_SIL
236
237config TARGET_P2020RDB
238	bool "Support P2020RDB-PC"
239	select SUPPORT_SPL
240	select SUPPORT_TPL
241	select ARCH_P2020
242	imply CMD_EEPROM
243	imply CMD_SATA
244	imply SATA_SIL
245
246config TARGET_P1_TWR
247	bool "Support p1_twr"
248	select ARCH_P1025
249
250config TARGET_P2041RDB
251	bool "Support P2041RDB"
252	select ARCH_P2041
253	select BOARD_LATE_INIT if CHAIN_OF_TRUST
254	select PHYS_64BIT
255	imply CMD_SATA
256	imply FSL_SATA
257
258config TARGET_QEMU_PPCE500
259	bool "Support qemu-ppce500"
260	select ARCH_QEMU_E500
261	select PHYS_64BIT
262
263config TARGET_T1024QDS
264	bool "Support T1024QDS"
265	select ARCH_T1024
266	select BOARD_LATE_INIT if CHAIN_OF_TRUST
267	select SUPPORT_SPL
268	select PHYS_64BIT
269	imply CMD_EEPROM
270	imply CMD_SATA
271	imply FSL_SATA
272
273config TARGET_T1023RDB
274	bool "Support T1023RDB"
275	select ARCH_T1023
276	select BOARD_LATE_INIT if CHAIN_OF_TRUST
277	select SUPPORT_SPL
278	select PHYS_64BIT
279	select FSL_DDR_INTERACTIVE
280	imply CMD_EEPROM
281	imply PANIC_HANG
282
283config TARGET_T1024RDB
284	bool "Support T1024RDB"
285	select ARCH_T1024
286	select BOARD_LATE_INIT if CHAIN_OF_TRUST
287	select SUPPORT_SPL
288	select PHYS_64BIT
289	select FSL_DDR_INTERACTIVE
290	imply CMD_EEPROM
291	imply PANIC_HANG
292
293config TARGET_T1040QDS
294	bool "Support T1040QDS"
295	select ARCH_T1040
296	select BOARD_LATE_INIT if CHAIN_OF_TRUST
297	select PHYS_64BIT
298	select FSL_DDR_INTERACTIVE
299	imply CMD_EEPROM
300	imply CMD_SATA
301	imply PANIC_HANG
302
303config TARGET_T1040RDB
304	bool "Support T1040RDB"
305	select ARCH_T1040
306	select BOARD_LATE_INIT if CHAIN_OF_TRUST
307	select SUPPORT_SPL
308	select PHYS_64BIT
309	imply CMD_SATA
310	imply PANIC_HANG
311
312config TARGET_T1040D4RDB
313	bool "Support T1040D4RDB"
314	select ARCH_T1040
315	select BOARD_LATE_INIT if CHAIN_OF_TRUST
316	select SUPPORT_SPL
317	select PHYS_64BIT
318	imply CMD_SATA
319	imply PANIC_HANG
320
321config TARGET_T1042RDB
322	bool "Support T1042RDB"
323	select ARCH_T1042
324	select BOARD_LATE_INIT if CHAIN_OF_TRUST
325	select SUPPORT_SPL
326	select PHYS_64BIT
327	imply CMD_SATA
328
329config TARGET_T1042D4RDB
330	bool "Support T1042D4RDB"
331	select ARCH_T1042
332	select BOARD_LATE_INIT if CHAIN_OF_TRUST
333	select SUPPORT_SPL
334	select PHYS_64BIT
335	imply CMD_SATA
336	imply PANIC_HANG
337
338config TARGET_T1042RDB_PI
339	bool "Support T1042RDB_PI"
340	select ARCH_T1042
341	select BOARD_LATE_INIT if CHAIN_OF_TRUST
342	select SUPPORT_SPL
343	select PHYS_64BIT
344	imply CMD_SATA
345	imply PANIC_HANG
346
347config TARGET_T2080QDS
348	bool "Support T2080QDS"
349	select ARCH_T2080
350	select BOARD_LATE_INIT if CHAIN_OF_TRUST
351	select SUPPORT_SPL
352	select PHYS_64BIT
353	select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
354	select FSL_DDR_INTERACTIVE
355	imply CMD_SATA
356
357config TARGET_T2080RDB
358	bool "Support T2080RDB"
359	select ARCH_T2080
360	select BOARD_LATE_INIT if CHAIN_OF_TRUST
361	select SUPPORT_SPL
362	select PHYS_64BIT
363	imply CMD_SATA
364	imply PANIC_HANG
365
366config TARGET_T2081QDS
367	bool "Support T2081QDS"
368	select ARCH_T2081
369	select SUPPORT_SPL
370	select PHYS_64BIT
371	select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
372	select FSL_DDR_INTERACTIVE
373
374config TARGET_T4160QDS
375	bool "Support T4160QDS"
376	select ARCH_T4160
377	select BOARD_LATE_INIT if CHAIN_OF_TRUST
378	select SUPPORT_SPL
379	select PHYS_64BIT
380	imply CMD_SATA
381	imply PANIC_HANG
382
383config TARGET_T4160RDB
384	bool "Support T4160RDB"
385	select ARCH_T4160
386	select SUPPORT_SPL
387	select PHYS_64BIT
388	imply PANIC_HANG
389
390config TARGET_T4240QDS
391	bool "Support T4240QDS"
392	select ARCH_T4240
393	select BOARD_LATE_INIT if CHAIN_OF_TRUST
394	select SUPPORT_SPL
395	select PHYS_64BIT
396	select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
397	imply CMD_SATA
398	imply PANIC_HANG
399
400config TARGET_T4240RDB
401	bool "Support T4240RDB"
402	select ARCH_T4240
403	select SUPPORT_SPL
404	select PHYS_64BIT
405	select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
406	imply CMD_SATA
407	imply PANIC_HANG
408
409config TARGET_CONTROLCENTERD
410	bool "Support controlcenterd"
411	select ARCH_P1022
412
413config TARGET_KMP204X
414	bool "Support kmp204x"
415	select ARCH_P2041
416	select PHYS_64BIT
417	select FSL_DDR_INTERACTIVE
418	imply CMD_CRAMFS
419	imply FS_CRAMFS
420
421config TARGET_XPEDITE520X
422	bool "Support xpedite520x"
423	select ARCH_MPC8548
424
425config TARGET_XPEDITE537X
426	bool "Support xpedite537x"
427	select ARCH_MPC8572
428# Use DDR3 controller with DDR2 DIMMs on this board
429	select SYS_FSL_DDRC_GEN3
430
431config TARGET_XPEDITE550X
432	bool "Support xpedite550x"
433	select ARCH_P2020
434
435config TARGET_UCP1020
436	bool "Support uCP1020"
437	select ARCH_P1020
438	imply CMD_SATA
439	imply PANIC_HANG
440
441config TARGET_CYRUS_P5020
442	bool "Support Varisys Cyrus P5020"
443	select ARCH_P5020
444	select PHYS_64BIT
445	imply PANIC_HANG
446
447config TARGET_CYRUS_P5040
448	 bool "Support Varisys Cyrus P5040"
449	select ARCH_P5040
450	select PHYS_64BIT
451	imply PANIC_HANG
452
453endchoice
454
455config ARCH_B4420
456	bool
457	select E500MC
458	select E6500
459	select FSL_LAW
460	select SYS_FSL_DDR_VER_47
461	select SYS_FSL_ERRATUM_A004477
462	select SYS_FSL_ERRATUM_A005871
463	select SYS_FSL_ERRATUM_A006379
464	select SYS_FSL_ERRATUM_A006384
465	select SYS_FSL_ERRATUM_A006475
466	select SYS_FSL_ERRATUM_A006593
467	select SYS_FSL_ERRATUM_A007075
468	select SYS_FSL_ERRATUM_A007186
469	select SYS_FSL_ERRATUM_A007212
470	select SYS_FSL_ERRATUM_A009942
471	select SYS_FSL_HAS_DDR3
472	select SYS_FSL_HAS_SEC
473	select SYS_FSL_QORIQ_CHASSIS2
474	select SYS_FSL_SEC_BE
475	select SYS_FSL_SEC_COMPAT_4
476	select SYS_PPC64
477	select FSL_IFC
478	imply CMD_EEPROM
479	imply CMD_NAND
480	imply CMD_REGINFO
481
482config ARCH_B4860
483	bool
484	select E500MC
485	select E6500
486	select FSL_LAW
487	select SYS_FSL_DDR_VER_47
488	select SYS_FSL_ERRATUM_A004477
489	select SYS_FSL_ERRATUM_A005871
490	select SYS_FSL_ERRATUM_A006379
491	select SYS_FSL_ERRATUM_A006384
492	select SYS_FSL_ERRATUM_A006475
493	select SYS_FSL_ERRATUM_A006593
494	select SYS_FSL_ERRATUM_A007075
495	select SYS_FSL_ERRATUM_A007186
496	select SYS_FSL_ERRATUM_A007212
497	select SYS_FSL_ERRATUM_A007907
498	select SYS_FSL_ERRATUM_A009942
499	select SYS_FSL_HAS_DDR3
500	select SYS_FSL_HAS_SEC
501	select SYS_FSL_QORIQ_CHASSIS2
502	select SYS_FSL_SEC_BE
503	select SYS_FSL_SEC_COMPAT_4
504	select SYS_PPC64
505	select FSL_IFC
506	imply CMD_EEPROM
507	imply CMD_NAND
508	imply CMD_REGINFO
509
510config ARCH_BSC9131
511	bool
512	select FSL_LAW
513	select SYS_FSL_DDR_VER_44
514	select SYS_FSL_ERRATUM_A004477
515	select SYS_FSL_ERRATUM_A005125
516	select SYS_FSL_ERRATUM_ESDHC111
517	select SYS_FSL_HAS_DDR3
518	select SYS_FSL_HAS_SEC
519	select SYS_FSL_SEC_BE
520	select SYS_FSL_SEC_COMPAT_4
521	select FSL_IFC
522	imply CMD_EEPROM
523	imply CMD_NAND
524	imply CMD_REGINFO
525
526config ARCH_BSC9132
527	bool
528	select FSL_LAW
529	select SYS_FSL_DDR_VER_46
530	select SYS_FSL_ERRATUM_A004477
531	select SYS_FSL_ERRATUM_A005125
532	select SYS_FSL_ERRATUM_A005434
533	select SYS_FSL_ERRATUM_ESDHC111
534	select SYS_FSL_ERRATUM_I2C_A004447
535	select SYS_FSL_ERRATUM_IFC_A002769
536	select SYS_FSL_HAS_DDR3
537	select SYS_FSL_HAS_SEC
538	select SYS_FSL_SEC_BE
539	select SYS_FSL_SEC_COMPAT_4
540	select SYS_PPC_E500_USE_DEBUG_TLB
541	select FSL_IFC
542	imply CMD_EEPROM
543	imply CMD_MTDPARTS
544	imply CMD_NAND
545	imply CMD_PCI
546	imply CMD_REGINFO
547
548config ARCH_C29X
549	bool
550	select FSL_LAW
551	select SYS_FSL_DDR_VER_46
552	select SYS_FSL_ERRATUM_A005125
553	select SYS_FSL_ERRATUM_ESDHC111
554	select SYS_FSL_HAS_DDR3
555	select SYS_FSL_HAS_SEC
556	select SYS_FSL_SEC_BE
557	select SYS_FSL_SEC_COMPAT_6
558	select SYS_PPC_E500_USE_DEBUG_TLB
559	select FSL_IFC
560	imply CMD_NAND
561	imply CMD_PCI
562	imply CMD_REGINFO
563
564config ARCH_MPC8536
565	bool
566	select FSL_LAW
567	select SYS_FSL_ERRATUM_A004508
568	select SYS_FSL_ERRATUM_A005125
569	select SYS_FSL_HAS_DDR2
570	select SYS_FSL_HAS_DDR3
571	select SYS_FSL_HAS_SEC
572	select SYS_FSL_SEC_BE
573	select SYS_FSL_SEC_COMPAT_2
574	select SYS_PPC_E500_USE_DEBUG_TLB
575	select FSL_ELBC
576	imply CMD_NAND
577	imply CMD_SATA
578	imply CMD_REGINFO
579
580config ARCH_MPC8540
581	bool
582	select FSL_LAW
583	select SYS_FSL_HAS_DDR1
584
585config ARCH_MPC8541
586	bool
587	select FSL_LAW
588	select SYS_FSL_HAS_DDR1
589	select SYS_FSL_HAS_SEC
590	select SYS_FSL_SEC_BE
591	select SYS_FSL_SEC_COMPAT_2
592
593config ARCH_MPC8544
594	bool
595	select FSL_LAW
596	select SYS_FSL_ERRATUM_A005125
597	select SYS_FSL_HAS_DDR2
598	select SYS_FSL_HAS_SEC
599	select SYS_FSL_SEC_BE
600	select SYS_FSL_SEC_COMPAT_2
601	select SYS_PPC_E500_USE_DEBUG_TLB
602	select FSL_ELBC
603
604config ARCH_MPC8548
605	bool
606	select FSL_LAW
607	select SYS_FSL_ERRATUM_A005125
608	select SYS_FSL_ERRATUM_NMG_DDR120
609	select SYS_FSL_ERRATUM_NMG_LBC103
610	select SYS_FSL_ERRATUM_NMG_ETSEC129
611	select SYS_FSL_ERRATUM_I2C_A004447
612	select SYS_FSL_HAS_DDR2
613	select SYS_FSL_HAS_DDR1
614	select SYS_FSL_HAS_SEC
615	select SYS_FSL_SEC_BE
616	select SYS_FSL_SEC_COMPAT_2
617	select SYS_PPC_E500_USE_DEBUG_TLB
618	imply CMD_REGINFO
619
620config ARCH_MPC8555
621	bool
622	select FSL_LAW
623	select SYS_FSL_HAS_DDR1
624	select SYS_FSL_HAS_SEC
625	select SYS_FSL_SEC_BE
626	select SYS_FSL_SEC_COMPAT_2
627
628config ARCH_MPC8560
629	bool
630	select FSL_LAW
631	select SYS_FSL_HAS_DDR1
632
633config ARCH_MPC8568
634	bool
635	select FSL_LAW
636	select SYS_FSL_HAS_DDR2
637	select SYS_FSL_HAS_SEC
638	select SYS_FSL_SEC_BE
639	select SYS_FSL_SEC_COMPAT_2
640
641config ARCH_MPC8569
642	bool
643	select FSL_LAW
644	select SYS_FSL_ERRATUM_A004508
645	select SYS_FSL_ERRATUM_A005125
646	select SYS_FSL_HAS_DDR3
647	select SYS_FSL_HAS_SEC
648	select SYS_FSL_SEC_BE
649	select SYS_FSL_SEC_COMPAT_2
650	select FSL_ELBC
651	imply CMD_NAND
652
653config ARCH_MPC8572
654	bool
655	select FSL_LAW
656	select SYS_FSL_ERRATUM_A004508
657	select SYS_FSL_ERRATUM_A005125
658	select SYS_FSL_ERRATUM_DDR_115
659	select SYS_FSL_ERRATUM_DDR111_DDR134
660	select SYS_FSL_HAS_DDR2
661	select SYS_FSL_HAS_DDR3
662	select SYS_FSL_HAS_SEC
663	select SYS_FSL_SEC_BE
664	select SYS_FSL_SEC_COMPAT_2
665	select SYS_PPC_E500_USE_DEBUG_TLB
666	select FSL_ELBC
667	imply CMD_NAND
668
669config ARCH_P1010
670	bool
671	select FSL_LAW
672	select SYS_FSL_ERRATUM_A004477
673	select SYS_FSL_ERRATUM_A004508
674	select SYS_FSL_ERRATUM_A005125
675	select SYS_FSL_ERRATUM_A005275
676	select SYS_FSL_ERRATUM_A006261
677	select SYS_FSL_ERRATUM_A007075
678	select SYS_FSL_ERRATUM_ESDHC111
679	select SYS_FSL_ERRATUM_I2C_A004447
680	select SYS_FSL_ERRATUM_IFC_A002769
681	select SYS_FSL_ERRATUM_P1010_A003549
682	select SYS_FSL_ERRATUM_SEC_A003571
683	select SYS_FSL_ERRATUM_IFC_A003399
684	select SYS_FSL_HAS_DDR3
685	select SYS_FSL_HAS_SEC
686	select SYS_FSL_SEC_BE
687	select SYS_FSL_SEC_COMPAT_4
688	select SYS_PPC_E500_USE_DEBUG_TLB
689	select FSL_IFC
690	imply CMD_EEPROM
691	imply CMD_MTDPARTS
692	imply CMD_NAND
693	imply CMD_SATA
694	imply CMD_PCI
695	imply CMD_REGINFO
696	imply FSL_SATA
697
698config ARCH_P1011
699	bool
700	select FSL_LAW
701	select SYS_FSL_ERRATUM_A004508
702	select SYS_FSL_ERRATUM_A005125
703	select SYS_FSL_ERRATUM_ELBC_A001
704	select SYS_FSL_ERRATUM_ESDHC111
705	select SYS_FSL_HAS_DDR3
706	select SYS_FSL_HAS_SEC
707	select SYS_FSL_SEC_BE
708	select SYS_FSL_SEC_COMPAT_2
709	select SYS_PPC_E500_USE_DEBUG_TLB
710	select FSL_ELBC
711
712config ARCH_P1020
713	bool
714	select FSL_LAW
715	select SYS_FSL_ERRATUM_A004508
716	select SYS_FSL_ERRATUM_A005125
717	select SYS_FSL_ERRATUM_ELBC_A001
718	select SYS_FSL_ERRATUM_ESDHC111
719	select SYS_FSL_HAS_DDR3
720	select SYS_FSL_HAS_SEC
721	select SYS_FSL_SEC_BE
722	select SYS_FSL_SEC_COMPAT_2
723	select SYS_PPC_E500_USE_DEBUG_TLB
724	select FSL_ELBC
725	imply CMD_NAND
726	imply CMD_SATA
727	imply CMD_PCI
728	imply CMD_REGINFO
729	imply SATA_SIL
730
731config ARCH_P1021
732	bool
733	select FSL_LAW
734	select SYS_FSL_ERRATUM_A004508
735	select SYS_FSL_ERRATUM_A005125
736	select SYS_FSL_ERRATUM_ELBC_A001
737	select SYS_FSL_ERRATUM_ESDHC111
738	select SYS_FSL_HAS_DDR3
739	select SYS_FSL_HAS_SEC
740	select SYS_FSL_SEC_BE
741	select SYS_FSL_SEC_COMPAT_2
742	select SYS_PPC_E500_USE_DEBUG_TLB
743	select FSL_ELBC
744	imply CMD_REGINFO
745	imply CMD_NAND
746	imply CMD_SATA
747	imply CMD_REGINFO
748	imply SATA_SIL
749
750config ARCH_P1022
751	bool
752	select FSL_LAW
753	select SYS_FSL_ERRATUM_A004477
754	select SYS_FSL_ERRATUM_A004508
755	select SYS_FSL_ERRATUM_A005125
756	select SYS_FSL_ERRATUM_ELBC_A001
757	select SYS_FSL_ERRATUM_ESDHC111
758	select SYS_FSL_ERRATUM_SATA_A001
759	select SYS_FSL_HAS_DDR3
760	select SYS_FSL_HAS_SEC
761	select SYS_FSL_SEC_BE
762	select SYS_FSL_SEC_COMPAT_2
763	select SYS_PPC_E500_USE_DEBUG_TLB
764	select FSL_ELBC
765
766config ARCH_P1023
767	bool
768	select FSL_LAW
769	select SYS_FSL_ERRATUM_A004508
770	select SYS_FSL_ERRATUM_A005125
771	select SYS_FSL_ERRATUM_I2C_A004447
772	select SYS_FSL_HAS_DDR3
773	select SYS_FSL_HAS_SEC
774	select SYS_FSL_SEC_BE
775	select SYS_FSL_SEC_COMPAT_4
776	select FSL_ELBC
777
778config ARCH_P1024
779	bool
780	select FSL_LAW
781	select SYS_FSL_ERRATUM_A004508
782	select SYS_FSL_ERRATUM_A005125
783	select SYS_FSL_ERRATUM_ELBC_A001
784	select SYS_FSL_ERRATUM_ESDHC111
785	select SYS_FSL_HAS_DDR3
786	select SYS_FSL_HAS_SEC
787	select SYS_FSL_SEC_BE
788	select SYS_FSL_SEC_COMPAT_2
789	select SYS_PPC_E500_USE_DEBUG_TLB
790	select FSL_ELBC
791	imply CMD_EEPROM
792	imply CMD_NAND
793	imply CMD_SATA
794	imply CMD_PCI
795	imply CMD_REGINFO
796	imply SATA_SIL
797
798config ARCH_P1025
799	bool
800	select FSL_LAW
801	select SYS_FSL_ERRATUM_A004508
802	select SYS_FSL_ERRATUM_A005125
803	select SYS_FSL_ERRATUM_ELBC_A001
804	select SYS_FSL_ERRATUM_ESDHC111
805	select SYS_FSL_HAS_DDR3
806	select SYS_FSL_HAS_SEC
807	select SYS_FSL_SEC_BE
808	select SYS_FSL_SEC_COMPAT_2
809	select SYS_PPC_E500_USE_DEBUG_TLB
810	select FSL_ELBC
811	imply CMD_SATA
812	imply CMD_REGINFO
813
814config ARCH_P2020
815	bool
816	select FSL_LAW
817	select SYS_FSL_ERRATUM_A004477
818	select SYS_FSL_ERRATUM_A004508
819	select SYS_FSL_ERRATUM_A005125
820	select SYS_FSL_ERRATUM_ESDHC111
821	select SYS_FSL_ERRATUM_ESDHC_A001
822	select SYS_FSL_HAS_DDR3
823	select SYS_FSL_HAS_SEC
824	select SYS_FSL_SEC_BE
825	select SYS_FSL_SEC_COMPAT_2
826	select SYS_PPC_E500_USE_DEBUG_TLB
827	select FSL_ELBC
828	imply CMD_EEPROM
829	imply CMD_NAND
830	imply CMD_REGINFO
831
832config ARCH_P2041
833	bool
834	select E500MC
835	select FSL_LAW
836	select SYS_FSL_ERRATUM_A004510
837	select SYS_FSL_ERRATUM_A004849
838	select SYS_FSL_ERRATUM_A005275
839	select SYS_FSL_ERRATUM_A006261
840	select SYS_FSL_ERRATUM_CPU_A003999
841	select SYS_FSL_ERRATUM_DDR_A003
842	select SYS_FSL_ERRATUM_DDR_A003474
843	select SYS_FSL_ERRATUM_ESDHC111
844	select SYS_FSL_ERRATUM_I2C_A004447
845	select SYS_FSL_ERRATUM_NMG_CPU_A011
846	select SYS_FSL_ERRATUM_SRIO_A004034
847	select SYS_FSL_ERRATUM_USB14
848	select SYS_FSL_HAS_DDR3
849	select SYS_FSL_HAS_SEC
850	select SYS_FSL_QORIQ_CHASSIS1
851	select SYS_FSL_SEC_BE
852	select SYS_FSL_SEC_COMPAT_4
853	select FSL_ELBC
854	imply CMD_NAND
855
856config ARCH_P3041
857	bool
858	select E500MC
859	select FSL_LAW
860	select SYS_FSL_DDR_VER_44
861	select SYS_FSL_ERRATUM_A004510
862	select SYS_FSL_ERRATUM_A004849
863	select SYS_FSL_ERRATUM_A005275
864	select SYS_FSL_ERRATUM_A005812
865	select SYS_FSL_ERRATUM_A006261
866	select SYS_FSL_ERRATUM_CPU_A003999
867	select SYS_FSL_ERRATUM_DDR_A003
868	select SYS_FSL_ERRATUM_DDR_A003474
869	select SYS_FSL_ERRATUM_ESDHC111
870	select SYS_FSL_ERRATUM_I2C_A004447
871	select SYS_FSL_ERRATUM_NMG_CPU_A011
872	select SYS_FSL_ERRATUM_SRIO_A004034
873	select SYS_FSL_ERRATUM_USB14
874	select SYS_FSL_HAS_DDR3
875	select SYS_FSL_HAS_SEC
876	select SYS_FSL_QORIQ_CHASSIS1
877	select SYS_FSL_SEC_BE
878	select SYS_FSL_SEC_COMPAT_4
879	select FSL_ELBC
880	imply CMD_NAND
881	imply CMD_SATA
882	imply CMD_REGINFO
883	imply FSL_SATA
884
885config ARCH_P4080
886	bool
887	select E500MC
888	select FSL_LAW
889	select SYS_FSL_DDR_VER_44
890	select SYS_FSL_ERRATUM_A004510
891	select SYS_FSL_ERRATUM_A004580
892	select SYS_FSL_ERRATUM_A004849
893	select SYS_FSL_ERRATUM_A005812
894	select SYS_FSL_ERRATUM_A007075
895	select SYS_FSL_ERRATUM_CPC_A002
896	select SYS_FSL_ERRATUM_CPC_A003
897	select SYS_FSL_ERRATUM_CPU_A003999
898	select SYS_FSL_ERRATUM_DDR_A003
899	select SYS_FSL_ERRATUM_DDR_A003474
900	select SYS_FSL_ERRATUM_ELBC_A001
901	select SYS_FSL_ERRATUM_ESDHC111
902	select SYS_FSL_ERRATUM_ESDHC13
903	select SYS_FSL_ERRATUM_ESDHC135
904	select SYS_FSL_ERRATUM_I2C_A004447
905	select SYS_FSL_ERRATUM_NMG_CPU_A011
906	select SYS_FSL_ERRATUM_SRIO_A004034
907	select SYS_P4080_ERRATUM_CPU22
908	select SYS_P4080_ERRATUM_PCIE_A003
909	select SYS_P4080_ERRATUM_SERDES8
910	select SYS_P4080_ERRATUM_SERDES9
911	select SYS_P4080_ERRATUM_SERDES_A001
912	select SYS_P4080_ERRATUM_SERDES_A005
913	select SYS_FSL_HAS_DDR3
914	select SYS_FSL_HAS_SEC
915	select SYS_FSL_QORIQ_CHASSIS1
916	select SYS_FSL_SEC_BE
917	select SYS_FSL_SEC_COMPAT_4
918	select FSL_ELBC
919	imply CMD_SATA
920	imply CMD_REGINFO
921	imply SATA_SIL
922
923config ARCH_P5020
924	bool
925	select E500MC
926	select FSL_LAW
927	select SYS_FSL_DDR_VER_44
928	select SYS_FSL_ERRATUM_A004510
929	select SYS_FSL_ERRATUM_A005275
930	select SYS_FSL_ERRATUM_A006261
931	select SYS_FSL_ERRATUM_DDR_A003
932	select SYS_FSL_ERRATUM_DDR_A003474
933	select SYS_FSL_ERRATUM_ESDHC111
934	select SYS_FSL_ERRATUM_I2C_A004447
935	select SYS_FSL_ERRATUM_SRIO_A004034
936	select SYS_FSL_ERRATUM_USB14
937	select SYS_FSL_HAS_DDR3
938	select SYS_FSL_HAS_SEC
939	select SYS_FSL_QORIQ_CHASSIS1
940	select SYS_FSL_SEC_BE
941	select SYS_FSL_SEC_COMPAT_4
942	select SYS_PPC64
943	select FSL_ELBC
944	imply CMD_SATA
945	imply CMD_REGINFO
946	imply FSL_SATA
947
948config ARCH_P5040
949	bool
950	select E500MC
951	select FSL_LAW
952	select SYS_FSL_DDR_VER_44
953	select SYS_FSL_ERRATUM_A004510
954	select SYS_FSL_ERRATUM_A004699
955	select SYS_FSL_ERRATUM_A005275
956	select SYS_FSL_ERRATUM_A005812
957	select SYS_FSL_ERRATUM_A006261
958	select SYS_FSL_ERRATUM_DDR_A003
959	select SYS_FSL_ERRATUM_DDR_A003474
960	select SYS_FSL_ERRATUM_ESDHC111
961	select SYS_FSL_ERRATUM_USB14
962	select SYS_FSL_HAS_DDR3
963	select SYS_FSL_HAS_SEC
964	select SYS_FSL_QORIQ_CHASSIS1
965	select SYS_FSL_SEC_BE
966	select SYS_FSL_SEC_COMPAT_4
967	select SYS_PPC64
968	select FSL_ELBC
969	imply CMD_SATA
970	imply CMD_REGINFO
971	imply FSL_SATA
972
973config ARCH_QEMU_E500
974	bool
975
976config ARCH_T1023
977	bool
978	select E500MC
979	select FSL_LAW
980	select SYS_FSL_DDR_VER_50
981	select SYS_FSL_ERRATUM_A008378
982	select SYS_FSL_ERRATUM_A009663
983	select SYS_FSL_ERRATUM_A009942
984	select SYS_FSL_ERRATUM_ESDHC111
985	select SYS_FSL_HAS_DDR3
986	select SYS_FSL_HAS_DDR4
987	select SYS_FSL_HAS_SEC
988	select SYS_FSL_QORIQ_CHASSIS2
989	select SYS_FSL_SEC_BE
990	select SYS_FSL_SEC_COMPAT_5
991	select FSL_IFC
992	imply CMD_EEPROM
993	imply CMD_NAND
994	imply CMD_REGINFO
995
996config ARCH_T1024
997	bool
998	select E500MC
999	select FSL_LAW
1000	select SYS_FSL_DDR_VER_50
1001	select SYS_FSL_ERRATUM_A008378
1002	select SYS_FSL_ERRATUM_A009663
1003	select SYS_FSL_ERRATUM_A009942
1004	select SYS_FSL_ERRATUM_ESDHC111
1005	select SYS_FSL_HAS_DDR3
1006	select SYS_FSL_HAS_DDR4
1007	select SYS_FSL_HAS_SEC
1008	select SYS_FSL_QORIQ_CHASSIS2
1009	select SYS_FSL_SEC_BE
1010	select SYS_FSL_SEC_COMPAT_5
1011	select FSL_IFC
1012	imply CMD_EEPROM
1013	imply CMD_NAND
1014	imply CMD_MTDPARTS
1015	imply CMD_REGINFO
1016
1017config ARCH_T1040
1018	bool
1019	select E500MC
1020	select FSL_LAW
1021	select SYS_FSL_DDR_VER_50
1022	select SYS_FSL_ERRATUM_A008044
1023	select SYS_FSL_ERRATUM_A008378
1024	select SYS_FSL_ERRATUM_A009663
1025	select SYS_FSL_ERRATUM_A009942
1026	select SYS_FSL_ERRATUM_ESDHC111
1027	select SYS_FSL_HAS_DDR3
1028	select SYS_FSL_HAS_DDR4
1029	select SYS_FSL_HAS_SEC
1030	select SYS_FSL_QORIQ_CHASSIS2
1031	select SYS_FSL_SEC_BE
1032	select SYS_FSL_SEC_COMPAT_5
1033	select FSL_IFC
1034	imply CMD_MTDPARTS
1035	imply CMD_NAND
1036	imply CMD_SATA
1037	imply CMD_REGINFO
1038	imply FSL_SATA
1039
1040config ARCH_T1042
1041	bool
1042	select E500MC
1043	select FSL_LAW
1044	select SYS_FSL_DDR_VER_50
1045	select SYS_FSL_ERRATUM_A008044
1046	select SYS_FSL_ERRATUM_A008378
1047	select SYS_FSL_ERRATUM_A009663
1048	select SYS_FSL_ERRATUM_A009942
1049	select SYS_FSL_ERRATUM_ESDHC111
1050	select SYS_FSL_HAS_DDR3
1051	select SYS_FSL_HAS_DDR4
1052	select SYS_FSL_HAS_SEC
1053	select SYS_FSL_QORIQ_CHASSIS2
1054	select SYS_FSL_SEC_BE
1055	select SYS_FSL_SEC_COMPAT_5
1056	select FSL_IFC
1057	imply CMD_MTDPARTS
1058	imply CMD_NAND
1059	imply CMD_SATA
1060	imply CMD_REGINFO
1061	imply FSL_SATA
1062
1063config ARCH_T2080
1064	bool
1065	select E500MC
1066	select E6500
1067	select FSL_LAW
1068	select SYS_FSL_DDR_VER_47
1069	select SYS_FSL_ERRATUM_A006379
1070	select SYS_FSL_ERRATUM_A006593
1071	select SYS_FSL_ERRATUM_A007186
1072	select SYS_FSL_ERRATUM_A007212
1073	select SYS_FSL_ERRATUM_A007815
1074	select SYS_FSL_ERRATUM_A007907
1075	select SYS_FSL_ERRATUM_A009942
1076	select SYS_FSL_ERRATUM_ESDHC111
1077	select SYS_FSL_HAS_DDR3
1078	select SYS_FSL_HAS_SEC
1079	select SYS_FSL_QORIQ_CHASSIS2
1080	select SYS_FSL_SEC_BE
1081	select SYS_FSL_SEC_COMPAT_4
1082	select SYS_PPC64
1083	select FSL_IFC
1084	imply CMD_SATA
1085	imply CMD_NAND
1086	imply CMD_REGINFO
1087	imply FSL_SATA
1088
1089config ARCH_T2081
1090	bool
1091	select E500MC
1092	select E6500
1093	select FSL_LAW
1094	select SYS_FSL_DDR_VER_47
1095	select SYS_FSL_ERRATUM_A006379
1096	select SYS_FSL_ERRATUM_A006593
1097	select SYS_FSL_ERRATUM_A007186
1098	select SYS_FSL_ERRATUM_A007212
1099	select SYS_FSL_ERRATUM_A009942
1100	select SYS_FSL_ERRATUM_ESDHC111
1101	select SYS_FSL_HAS_DDR3
1102	select SYS_FSL_HAS_SEC
1103	select SYS_FSL_QORIQ_CHASSIS2
1104	select SYS_FSL_SEC_BE
1105	select SYS_FSL_SEC_COMPAT_4
1106	select SYS_PPC64
1107	select FSL_IFC
1108	imply CMD_NAND
1109	imply CMD_REGINFO
1110
1111config ARCH_T4160
1112	bool
1113	select E500MC
1114	select E6500
1115	select FSL_LAW
1116	select SYS_FSL_DDR_VER_47
1117	select SYS_FSL_ERRATUM_A004468
1118	select SYS_FSL_ERRATUM_A005871
1119	select SYS_FSL_ERRATUM_A006379
1120	select SYS_FSL_ERRATUM_A006593
1121	select SYS_FSL_ERRATUM_A007186
1122	select SYS_FSL_ERRATUM_A007798
1123	select SYS_FSL_ERRATUM_A009942
1124	select SYS_FSL_HAS_DDR3
1125	select SYS_FSL_HAS_SEC
1126	select SYS_FSL_QORIQ_CHASSIS2
1127	select SYS_FSL_SEC_BE
1128	select SYS_FSL_SEC_COMPAT_4
1129	select SYS_PPC64
1130	select FSL_IFC
1131	imply CMD_SATA
1132	imply CMD_NAND
1133	imply CMD_REGINFO
1134	imply FSL_SATA
1135
1136config ARCH_T4240
1137	bool
1138	select E500MC
1139	select E6500
1140	select FSL_LAW
1141	select SYS_FSL_DDR_VER_47
1142	select SYS_FSL_ERRATUM_A004468
1143	select SYS_FSL_ERRATUM_A005871
1144	select SYS_FSL_ERRATUM_A006261
1145	select SYS_FSL_ERRATUM_A006379
1146	select SYS_FSL_ERRATUM_A006593
1147	select SYS_FSL_ERRATUM_A007186
1148	select SYS_FSL_ERRATUM_A007798
1149	select SYS_FSL_ERRATUM_A007815
1150	select SYS_FSL_ERRATUM_A007907
1151	select SYS_FSL_ERRATUM_A009942
1152	select SYS_FSL_HAS_DDR3
1153	select SYS_FSL_HAS_SEC
1154	select SYS_FSL_QORIQ_CHASSIS2
1155	select SYS_FSL_SEC_BE
1156	select SYS_FSL_SEC_COMPAT_4
1157	select SYS_PPC64
1158	select FSL_IFC
1159	imply CMD_SATA
1160	imply CMD_NAND
1161	imply CMD_REGINFO
1162	imply FSL_SATA
1163
1164config MPC85XX_HAVE_RESET_VECTOR
1165	bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc"
1166	depends on MPC85xx
1167
1168config BOOKE
1169	bool
1170	default y
1171
1172config E500
1173	bool
1174	default y
1175	help
1176		Enable PowerPC E500 cores, including e500v1, e500v2, e500mc
1177
1178config E500MC
1179	bool
1180	imply CMD_PCI
1181	help
1182		Enble PowerPC E500MC core
1183
1184config E6500
1185	bool
1186	help
1187		Enable PowerPC E6500 core
1188
1189config FSL_LAW
1190	bool
1191	help
1192		Use Freescale common code for Local Access Window
1193
1194config SECURE_BOOT
1195	bool	"Secure Boot"
1196	help
1197		Enable Freescale Secure Boot feature. Normally selected
1198		by defconfig. If unsure, do not change.
1199
1200config MAX_CPUS
1201	int "Maximum number of CPUs permitted for MPC85xx"
1202	default 12 if ARCH_T4240
1203	default 8 if ARCH_P4080 || \
1204		     ARCH_T4160
1205	default 4 if ARCH_B4860 || \
1206		     ARCH_P2041 || \
1207		     ARCH_P3041 || \
1208		     ARCH_P5040 || \
1209		     ARCH_T1040 || \
1210		     ARCH_T1042 || \
1211		     ARCH_T2080 || \
1212		     ARCH_T2081
1213	default 2 if ARCH_B4420 || \
1214		     ARCH_BSC9132 || \
1215		     ARCH_MPC8572 || \
1216		     ARCH_P1020 || \
1217		     ARCH_P1021 || \
1218		     ARCH_P1022 || \
1219		     ARCH_P1023 || \
1220		     ARCH_P1024 || \
1221		     ARCH_P1025 || \
1222		     ARCH_P2020 || \
1223		     ARCH_P5020 || \
1224		     ARCH_T1023 || \
1225		     ARCH_T1024
1226	default 1
1227	help
1228	  Set this number to the maximum number of possible CPUs in the SoC.
1229	  SoCs may have multiple clusters with each cluster may have multiple
1230	  ports. If some ports are reserved but higher ports are used for
1231	  cores, count the reserved ports. This will allocate enough memory
1232	  in spin table to properly handle all cores.
1233
1234config SYS_CCSRBAR_DEFAULT
1235	hex "Default CCSRBAR address"
1236	default	0xff700000 if	ARCH_BSC9131	|| \
1237				ARCH_BSC9132	|| \
1238				ARCH_C29X	|| \
1239				ARCH_MPC8536	|| \
1240				ARCH_MPC8540	|| \
1241				ARCH_MPC8541	|| \
1242				ARCH_MPC8544	|| \
1243				ARCH_MPC8548	|| \
1244				ARCH_MPC8555	|| \
1245				ARCH_MPC8560	|| \
1246				ARCH_MPC8568	|| \
1247				ARCH_MPC8569	|| \
1248				ARCH_MPC8572	|| \
1249				ARCH_P1010	|| \
1250				ARCH_P1011	|| \
1251				ARCH_P1020	|| \
1252				ARCH_P1021	|| \
1253				ARCH_P1022	|| \
1254				ARCH_P1024	|| \
1255				ARCH_P1025	|| \
1256				ARCH_P2020
1257	default 0xff600000 if	ARCH_P1023
1258	default 0xfe000000 if	ARCH_B4420	|| \
1259				ARCH_B4860	|| \
1260				ARCH_P2041	|| \
1261				ARCH_P3041	|| \
1262				ARCH_P4080	|| \
1263				ARCH_P5020	|| \
1264				ARCH_P5040	|| \
1265				ARCH_T1023	|| \
1266				ARCH_T1024	|| \
1267				ARCH_T1040	|| \
1268				ARCH_T1042	|| \
1269				ARCH_T2080	|| \
1270				ARCH_T2081	|| \
1271				ARCH_T4160	|| \
1272				ARCH_T4240
1273	default 0xe0000000 if ARCH_QEMU_E500
1274	help
1275		Default value of CCSRBAR comes from power-on-reset. It
1276		is fixed on each SoC. Some SoCs can have different value
1277		if changed by pre-boot regime. The value here must match
1278		the current value in SoC. If not sure, do not change.
1279
1280config SYS_FSL_ERRATUM_A004468
1281	bool
1282
1283config SYS_FSL_ERRATUM_A004477
1284	bool
1285
1286config SYS_FSL_ERRATUM_A004508
1287	bool
1288
1289config SYS_FSL_ERRATUM_A004580
1290	bool
1291
1292config SYS_FSL_ERRATUM_A004699
1293	bool
1294
1295config SYS_FSL_ERRATUM_A004849
1296	bool
1297
1298config SYS_FSL_ERRATUM_A004510
1299	bool
1300
1301config SYS_FSL_ERRATUM_A004510_SVR_REV
1302	hex
1303	depends on SYS_FSL_ERRATUM_A004510
1304	default 0x20 if ARCH_P4080
1305	default 0x10
1306
1307config SYS_FSL_ERRATUM_A004510_SVR_REV2
1308	hex
1309	depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041))
1310	default 0x11
1311
1312config SYS_FSL_ERRATUM_A005125
1313	bool
1314
1315config SYS_FSL_ERRATUM_A005434
1316	bool
1317
1318config SYS_FSL_ERRATUM_A005812
1319	bool
1320
1321config SYS_FSL_ERRATUM_A005871
1322	bool
1323
1324config SYS_FSL_ERRATUM_A005275
1325	bool
1326
1327config SYS_FSL_ERRATUM_A006261
1328	bool
1329
1330config SYS_FSL_ERRATUM_A006379
1331	bool
1332
1333config SYS_FSL_ERRATUM_A006384
1334	bool
1335
1336config SYS_FSL_ERRATUM_A006475
1337	bool
1338
1339config SYS_FSL_ERRATUM_A006593
1340	bool
1341
1342config SYS_FSL_ERRATUM_A007075
1343	bool
1344
1345config SYS_FSL_ERRATUM_A007186
1346	bool
1347
1348config SYS_FSL_ERRATUM_A007212
1349	bool
1350
1351config SYS_FSL_ERRATUM_A007815
1352	bool
1353
1354config SYS_FSL_ERRATUM_A007798
1355	bool
1356
1357config SYS_FSL_ERRATUM_A007907
1358	bool
1359
1360config SYS_FSL_ERRATUM_A008044
1361	bool
1362
1363config SYS_FSL_ERRATUM_CPC_A002
1364	bool
1365
1366config SYS_FSL_ERRATUM_CPC_A003
1367	bool
1368
1369config SYS_FSL_ERRATUM_CPU_A003999
1370	bool
1371
1372config SYS_FSL_ERRATUM_ELBC_A001
1373	bool
1374
1375config SYS_FSL_ERRATUM_I2C_A004447
1376	bool
1377
1378config SYS_FSL_A004447_SVR_REV
1379	hex
1380	depends on SYS_FSL_ERRATUM_I2C_A004447
1381	default 0x00 if ARCH_MPC8548
1382	default 0x10 if ARCH_P1010
1383	default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132
1384	default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020
1385
1386config SYS_FSL_ERRATUM_IFC_A002769
1387	bool
1388
1389config SYS_FSL_ERRATUM_IFC_A003399
1390	bool
1391
1392config SYS_FSL_ERRATUM_NMG_CPU_A011
1393	bool
1394
1395config SYS_FSL_ERRATUM_NMG_ETSEC129
1396	bool
1397
1398config SYS_FSL_ERRATUM_NMG_LBC103
1399	bool
1400
1401config SYS_FSL_ERRATUM_P1010_A003549
1402	bool
1403
1404config SYS_FSL_ERRATUM_SATA_A001
1405	bool
1406
1407config SYS_FSL_ERRATUM_SEC_A003571
1408	bool
1409
1410config SYS_FSL_ERRATUM_SRIO_A004034
1411	bool
1412
1413config SYS_FSL_ERRATUM_USB14
1414	bool
1415
1416config SYS_P4080_ERRATUM_CPU22
1417	bool
1418
1419config SYS_P4080_ERRATUM_PCIE_A003
1420	bool
1421
1422config SYS_P4080_ERRATUM_SERDES8
1423	bool
1424
1425config SYS_P4080_ERRATUM_SERDES9
1426	bool
1427
1428config SYS_P4080_ERRATUM_SERDES_A001
1429	bool
1430
1431config SYS_P4080_ERRATUM_SERDES_A005
1432	bool
1433
1434config SYS_FSL_QORIQ_CHASSIS1
1435	bool
1436
1437config SYS_FSL_QORIQ_CHASSIS2
1438	bool
1439
1440config SYS_FSL_NUM_LAWS
1441	int "Number of local access windows"
1442	depends on FSL_LAW
1443	default 32 if	ARCH_B4420	|| \
1444			ARCH_B4860	|| \
1445			ARCH_P2041	|| \
1446			ARCH_P3041	|| \
1447			ARCH_P4080	|| \
1448			ARCH_P5020	|| \
1449			ARCH_P5040	|| \
1450			ARCH_T2080	|| \
1451			ARCH_T2081	|| \
1452			ARCH_T4160	|| \
1453			ARCH_T4240
1454	default 16 if	ARCH_T1023	|| \
1455			ARCH_T1024	|| \
1456			ARCH_T1040	|| \
1457			ARCH_T1042
1458	default 12 if	ARCH_BSC9131	|| \
1459			ARCH_BSC9132	|| \
1460			ARCH_C29X	|| \
1461			ARCH_MPC8536	|| \
1462			ARCH_MPC8572	|| \
1463			ARCH_P1010	|| \
1464			ARCH_P1011	|| \
1465			ARCH_P1020	|| \
1466			ARCH_P1021	|| \
1467			ARCH_P1022	|| \
1468			ARCH_P1023	|| \
1469			ARCH_P1024	|| \
1470			ARCH_P1025	|| \
1471			ARCH_P2020
1472	default 10 if	ARCH_MPC8544	|| \
1473			ARCH_MPC8548	|| \
1474			ARCH_MPC8568	|| \
1475			ARCH_MPC8569
1476	default 8 if	ARCH_MPC8540	|| \
1477			ARCH_MPC8541	|| \
1478			ARCH_MPC8555	|| \
1479			ARCH_MPC8560
1480	help
1481		Number of local access windows. This is fixed per SoC.
1482		If not sure, do not change.
1483
1484config SYS_FSL_THREADS_PER_CORE
1485	int
1486	default 2 if E6500
1487	default 1
1488
1489config SYS_NUM_TLBCAMS
1490	int "Number of TLB CAM entries"
1491	default 64 if E500MC
1492	default 16
1493	help
1494		Number of TLB CAM entries for Book-E chips. 64 for E500MC,
1495		16 for other E500 SoCs.
1496
1497config SYS_PPC64
1498	bool
1499
1500config SYS_PPC_E500_USE_DEBUG_TLB
1501	bool
1502
1503config FSL_IFC
1504	bool
1505
1506config FSL_ELBC
1507	bool
1508
1509config SYS_PPC_E500_DEBUG_TLB
1510	int "Temporary TLB entry for external debugger"
1511	depends on SYS_PPC_E500_USE_DEBUG_TLB
1512	default 0 if	ARCH_MPC8544 || ARCH_MPC8548
1513	default 1 if	ARCH_MPC8536
1514	default 2 if	ARCH_MPC8572	|| \
1515			ARCH_P1011	|| \
1516			ARCH_P1020	|| \
1517			ARCH_P1021	|| \
1518			ARCH_P1022	|| \
1519			ARCH_P1024	|| \
1520			ARCH_P1025	|| \
1521			ARCH_P2020
1522	default 3 if	ARCH_P1010	|| \
1523			ARCH_BSC9132	|| \
1524			ARCH_C29X
1525	help
1526		Select a temporary TLB entry to be used during boot to work
1527                around limitations in e500v1 and e500v2 external debugger
1528                support. This reduces the portions of the boot code where
1529                breakpoints and single stepping do not work. The value of this
1530                symbol should be set to the TLB1 entry to be used for this
1531                purpose. If unsure, do not change.
1532
1533config SYS_FSL_IFC_CLK_DIV
1534	int "Divider of platform clock"
1535	depends on FSL_IFC
1536	default 2 if	ARCH_B4420	|| \
1537			ARCH_B4860	|| \
1538			ARCH_T1024	|| \
1539			ARCH_T1023	|| \
1540			ARCH_T1040	|| \
1541			ARCH_T1042	|| \
1542			ARCH_T4160	|| \
1543			ARCH_T4240
1544	default 1
1545	help
1546		Defines divider of platform clock(clock input to
1547		IFC controller).
1548
1549config SYS_FSL_LBC_CLK_DIV
1550	int "Divider of platform clock"
1551	depends on FSL_ELBC || ARCH_MPC8540 || \
1552		ARCH_MPC8548 || ARCH_MPC8541 || \
1553		ARCH_MPC8555 || ARCH_MPC8560 || \
1554		ARCH_MPC8568
1555
1556	default 2 if	ARCH_P2041	|| \
1557			ARCH_P3041	|| \
1558			ARCH_P4080	|| \
1559			ARCH_P5020	|| \
1560			ARCH_P5040
1561	default 1
1562
1563	help
1564		Defines divider of platform clock(clock input to
1565		eLBC controller).
1566
1567source "board/freescale/b4860qds/Kconfig"
1568source "board/freescale/bsc9131rdb/Kconfig"
1569source "board/freescale/bsc9132qds/Kconfig"
1570source "board/freescale/c29xpcie/Kconfig"
1571source "board/freescale/corenet_ds/Kconfig"
1572source "board/freescale/mpc8536ds/Kconfig"
1573source "board/freescale/mpc8541cds/Kconfig"
1574source "board/freescale/mpc8544ds/Kconfig"
1575source "board/freescale/mpc8548cds/Kconfig"
1576source "board/freescale/mpc8555cds/Kconfig"
1577source "board/freescale/mpc8568mds/Kconfig"
1578source "board/freescale/mpc8569mds/Kconfig"
1579source "board/freescale/mpc8572ds/Kconfig"
1580source "board/freescale/p1010rdb/Kconfig"
1581source "board/freescale/p1022ds/Kconfig"
1582source "board/freescale/p1023rdb/Kconfig"
1583source "board/freescale/p1_p2_rdb_pc/Kconfig"
1584source "board/freescale/p1_twr/Kconfig"
1585source "board/freescale/p2041rdb/Kconfig"
1586source "board/freescale/qemu-ppce500/Kconfig"
1587source "board/freescale/t102xqds/Kconfig"
1588source "board/freescale/t102xrdb/Kconfig"
1589source "board/freescale/t1040qds/Kconfig"
1590source "board/freescale/t104xrdb/Kconfig"
1591source "board/freescale/t208xqds/Kconfig"
1592source "board/freescale/t208xrdb/Kconfig"
1593source "board/freescale/t4qds/Kconfig"
1594source "board/freescale/t4rdb/Kconfig"
1595source "board/gdsys/p1022/Kconfig"
1596source "board/keymile/kmp204x/Kconfig"
1597source "board/sbc8548/Kconfig"
1598source "board/socrates/Kconfig"
1599source "board/varisys/cyrus/Kconfig"
1600source "board/xes/xpedite520x/Kconfig"
1601source "board/xes/xpedite537x/Kconfig"
1602source "board/xes/xpedite550x/Kconfig"
1603source "board/Arcturus/ucp1020/Kconfig"
1604
1605endmenu
1606