1menu "mpc85xx CPU" 2 depends on MPC85xx 3 4config SYS_CPU 5 default "mpc85xx" 6 7config CMD_ERRATA 8 bool "Enable the 'errata' command" 9 depends on MPC85xx 10 default y 11 help 12 This enables the 'errata' command which displays a list of errata 13 work-arounds which are enabled for the current board. 14 15choice 16 prompt "Target select" 17 optional 18 19config TARGET_SBC8548 20 bool "Support sbc8548" 21 select ARCH_MPC8548 22 imply ENV_IS_IN_FLASH 23 24config TARGET_SOCRATES 25 bool "Support socrates" 26 select ARCH_MPC8544 27 28config TARGET_B4420QDS 29 bool "Support B4420QDS" 30 select ARCH_B4420 31 select SUPPORT_SPL 32 select PHYS_64BIT 33 34config TARGET_B4860QDS 35 bool "Support B4860QDS" 36 select ARCH_B4860 37 select BOARD_LATE_INIT if CHAIN_OF_TRUST 38 select SUPPORT_SPL 39 select PHYS_64BIT 40 41config TARGET_BSC9131RDB 42 bool "Support BSC9131RDB" 43 select ARCH_BSC9131 44 select SUPPORT_SPL 45 select BOARD_EARLY_INIT_F 46 47config TARGET_BSC9132QDS 48 bool "Support BSC9132QDS" 49 select ARCH_BSC9132 50 select BOARD_LATE_INIT if CHAIN_OF_TRUST 51 select SUPPORT_SPL 52 select BOARD_EARLY_INIT_F 53 54config TARGET_C29XPCIE 55 bool "Support C29XPCIE" 56 select ARCH_C29X 57 select BOARD_LATE_INIT if CHAIN_OF_TRUST 58 select SUPPORT_SPL 59 select SUPPORT_TPL 60 select PHYS_64BIT 61 62config TARGET_P3041DS 63 bool "Support P3041DS" 64 select PHYS_64BIT 65 select ARCH_P3041 66 select BOARD_LATE_INIT if CHAIN_OF_TRUST 67 imply CMD_SATA 68 69config TARGET_P4080DS 70 bool "Support P4080DS" 71 select PHYS_64BIT 72 select ARCH_P4080 73 select BOARD_LATE_INIT if CHAIN_OF_TRUST 74 imply CMD_SATA 75 76config TARGET_P5020DS 77 bool "Support P5020DS" 78 select PHYS_64BIT 79 select ARCH_P5020 80 select BOARD_LATE_INIT if CHAIN_OF_TRUST 81 imply CMD_SATA 82 83config TARGET_P5040DS 84 bool "Support P5040DS" 85 select PHYS_64BIT 86 select ARCH_P5040 87 select BOARD_LATE_INIT if CHAIN_OF_TRUST 88 imply CMD_SATA 89 90config TARGET_MPC8536DS 91 bool "Support MPC8536DS" 92 select ARCH_MPC8536 93# Use DDR3 controller with DDR2 DIMMs on this board 94 select SYS_FSL_DDRC_GEN3 95 imply CMD_SATA 96 97config TARGET_MPC8541CDS 98 bool "Support MPC8541CDS" 99 select ARCH_MPC8541 100 101config TARGET_MPC8544DS 102 bool "Support MPC8544DS" 103 select ARCH_MPC8544 104 105config TARGET_MPC8548CDS 106 bool "Support MPC8548CDS" 107 select ARCH_MPC8548 108 imply ENV_IS_IN_FLASH 109 110config TARGET_MPC8555CDS 111 bool "Support MPC8555CDS" 112 select ARCH_MPC8555 113 114config TARGET_MPC8568MDS 115 bool "Support MPC8568MDS" 116 select ARCH_MPC8568 117 118config TARGET_MPC8569MDS 119 bool "Support MPC8569MDS" 120 select ARCH_MPC8569 121 122config TARGET_MPC8572DS 123 bool "Support MPC8572DS" 124 select ARCH_MPC8572 125# Use DDR3 controller with DDR2 DIMMs on this board 126 select SYS_FSL_DDRC_GEN3 127 imply SCSI 128 129config TARGET_P1010RDB_PA 130 bool "Support P1010RDB_PA" 131 select ARCH_P1010 132 select BOARD_LATE_INIT if CHAIN_OF_TRUST 133 select SUPPORT_SPL 134 select SUPPORT_TPL 135 imply CMD_EEPROM 136 imply CMD_SATA 137 138config TARGET_P1010RDB_PB 139 bool "Support P1010RDB_PB" 140 select ARCH_P1010 141 select BOARD_LATE_INIT if CHAIN_OF_TRUST 142 select SUPPORT_SPL 143 select SUPPORT_TPL 144 imply CMD_EEPROM 145 imply CMD_SATA 146 147config TARGET_P1022DS 148 bool "Support P1022DS" 149 select ARCH_P1022 150 select SUPPORT_SPL 151 select SUPPORT_TPL 152 imply CMD_SATA 153 154config TARGET_P1023RDB 155 bool "Support P1023RDB" 156 select ARCH_P1023 157 imply CMD_EEPROM 158 159config TARGET_P1020MBG 160 bool "Support P1020MBG-PC" 161 select SUPPORT_SPL 162 select SUPPORT_TPL 163 select ARCH_P1020 164 imply CMD_EEPROM 165 imply CMD_SATA 166 167config TARGET_P1020RDB_PC 168 bool "Support P1020RDB-PC" 169 select SUPPORT_SPL 170 select SUPPORT_TPL 171 select ARCH_P1020 172 imply CMD_EEPROM 173 imply CMD_SATA 174 175config TARGET_P1020RDB_PD 176 bool "Support P1020RDB-PD" 177 select SUPPORT_SPL 178 select SUPPORT_TPL 179 select ARCH_P1020 180 imply CMD_EEPROM 181 imply CMD_SATA 182 183config TARGET_P1020UTM 184 bool "Support P1020UTM" 185 select SUPPORT_SPL 186 select SUPPORT_TPL 187 select ARCH_P1020 188 imply CMD_EEPROM 189 imply CMD_SATA 190 191config TARGET_P1021RDB 192 bool "Support P1021RDB" 193 select SUPPORT_SPL 194 select SUPPORT_TPL 195 select ARCH_P1021 196 imply CMD_EEPROM 197 imply CMD_SATA 198 199config TARGET_P1024RDB 200 bool "Support P1024RDB" 201 select SUPPORT_SPL 202 select SUPPORT_TPL 203 select ARCH_P1024 204 imply CMD_EEPROM 205 imply CMD_SATA 206 207config TARGET_P1025RDB 208 bool "Support P1025RDB" 209 select SUPPORT_SPL 210 select SUPPORT_TPL 211 select ARCH_P1025 212 imply CMD_EEPROM 213 imply CMD_SATA 214 215config TARGET_P2020RDB 216 bool "Support P2020RDB-PC" 217 select SUPPORT_SPL 218 select SUPPORT_TPL 219 select ARCH_P2020 220 imply CMD_EEPROM 221 imply CMD_SATA 222 223config TARGET_P1_TWR 224 bool "Support p1_twr" 225 select ARCH_P1025 226 227config TARGET_P2041RDB 228 bool "Support P2041RDB" 229 select ARCH_P2041 230 select BOARD_LATE_INIT if CHAIN_OF_TRUST 231 select PHYS_64BIT 232 imply CMD_SATA 233 234config TARGET_QEMU_PPCE500 235 bool "Support qemu-ppce500" 236 select ARCH_QEMU_E500 237 select PHYS_64BIT 238 239config TARGET_T1024QDS 240 bool "Support T1024QDS" 241 select ARCH_T1024 242 select BOARD_LATE_INIT if CHAIN_OF_TRUST 243 select SUPPORT_SPL 244 select PHYS_64BIT 245 imply CMD_EEPROM 246 imply CMD_SATA 247 248config TARGET_T1023RDB 249 bool "Support T1023RDB" 250 select ARCH_T1023 251 select BOARD_LATE_INIT if CHAIN_OF_TRUST 252 select SUPPORT_SPL 253 select PHYS_64BIT 254 imply CMD_EEPROM 255 256config TARGET_T1024RDB 257 bool "Support T1024RDB" 258 select ARCH_T1024 259 select BOARD_LATE_INIT if CHAIN_OF_TRUST 260 select SUPPORT_SPL 261 select PHYS_64BIT 262 imply CMD_EEPROM 263 264config TARGET_T1040QDS 265 bool "Support T1040QDS" 266 select ARCH_T1040 267 select BOARD_LATE_INIT if CHAIN_OF_TRUST 268 select PHYS_64BIT 269 imply CMD_EEPROM 270 imply CMD_SATA 271 272config TARGET_T1040RDB 273 bool "Support T1040RDB" 274 select ARCH_T1040 275 select BOARD_LATE_INIT if CHAIN_OF_TRUST 276 select SUPPORT_SPL 277 select PHYS_64BIT 278 imply CMD_SATA 279 280config TARGET_T1040D4RDB 281 bool "Support T1040D4RDB" 282 select ARCH_T1040 283 select BOARD_LATE_INIT if CHAIN_OF_TRUST 284 select SUPPORT_SPL 285 select PHYS_64BIT 286 imply CMD_SATA 287 288config TARGET_T1042RDB 289 bool "Support T1042RDB" 290 select ARCH_T1042 291 select BOARD_LATE_INIT if CHAIN_OF_TRUST 292 select SUPPORT_SPL 293 select PHYS_64BIT 294 imply CMD_SATA 295 296config TARGET_T1042D4RDB 297 bool "Support T1042D4RDB" 298 select ARCH_T1042 299 select BOARD_LATE_INIT if CHAIN_OF_TRUST 300 select SUPPORT_SPL 301 select PHYS_64BIT 302 imply CMD_SATA 303 304config TARGET_T1042RDB_PI 305 bool "Support T1042RDB_PI" 306 select ARCH_T1042 307 select BOARD_LATE_INIT if CHAIN_OF_TRUST 308 select SUPPORT_SPL 309 select PHYS_64BIT 310 imply CMD_SATA 311 312config TARGET_T2080QDS 313 bool "Support T2080QDS" 314 select ARCH_T2080 315 select BOARD_LATE_INIT if CHAIN_OF_TRUST 316 select SUPPORT_SPL 317 select PHYS_64BIT 318 imply CMD_SATA 319 320config TARGET_T2080RDB 321 bool "Support T2080RDB" 322 select ARCH_T2080 323 select BOARD_LATE_INIT if CHAIN_OF_TRUST 324 select SUPPORT_SPL 325 select PHYS_64BIT 326 imply CMD_SATA 327 328config TARGET_T2081QDS 329 bool "Support T2081QDS" 330 select ARCH_T2081 331 select SUPPORT_SPL 332 select PHYS_64BIT 333 334config TARGET_T4160QDS 335 bool "Support T4160QDS" 336 select ARCH_T4160 337 select BOARD_LATE_INIT if CHAIN_OF_TRUST 338 select SUPPORT_SPL 339 select PHYS_64BIT 340 imply CMD_SATA 341 342config TARGET_T4160RDB 343 bool "Support T4160RDB" 344 select ARCH_T4160 345 select SUPPORT_SPL 346 select PHYS_64BIT 347 348config TARGET_T4240QDS 349 bool "Support T4240QDS" 350 select ARCH_T4240 351 select BOARD_LATE_INIT if CHAIN_OF_TRUST 352 select SUPPORT_SPL 353 select PHYS_64BIT 354 imply CMD_SATA 355 356config TARGET_T4240RDB 357 bool "Support T4240RDB" 358 select ARCH_T4240 359 select SUPPORT_SPL 360 select PHYS_64BIT 361 imply CMD_SATA 362 363config TARGET_CONTROLCENTERD 364 bool "Support controlcenterd" 365 select ARCH_P1022 366 367config TARGET_KMP204X 368 bool "Support kmp204x" 369 select ARCH_P2041 370 select PHYS_64BIT 371 imply CMD_CRAMFS 372 imply FS_CRAMFS 373 374config TARGET_XPEDITE520X 375 bool "Support xpedite520x" 376 select ARCH_MPC8548 377 378config TARGET_XPEDITE537X 379 bool "Support xpedite537x" 380 select ARCH_MPC8572 381# Use DDR3 controller with DDR2 DIMMs on this board 382 select SYS_FSL_DDRC_GEN3 383 384config TARGET_XPEDITE550X 385 bool "Support xpedite550x" 386 select ARCH_P2020 387 388config TARGET_UCP1020 389 bool "Support uCP1020" 390 select ARCH_P1020 391 imply CMD_SATA 392 393config TARGET_CYRUS_P5020 394 bool "Support Varisys Cyrus P5020" 395 select ARCH_P5020 396 select PHYS_64BIT 397 398config TARGET_CYRUS_P5040 399 bool "Support Varisys Cyrus P5040" 400 select ARCH_P5040 401 select PHYS_64BIT 402 403endchoice 404 405config ARCH_B4420 406 bool 407 select E500MC 408 select E6500 409 select FSL_LAW 410 select SYS_FSL_DDR_VER_47 411 select SYS_FSL_ERRATUM_A004477 412 select SYS_FSL_ERRATUM_A005871 413 select SYS_FSL_ERRATUM_A006379 414 select SYS_FSL_ERRATUM_A006384 415 select SYS_FSL_ERRATUM_A006475 416 select SYS_FSL_ERRATUM_A006593 417 select SYS_FSL_ERRATUM_A007075 418 select SYS_FSL_ERRATUM_A007186 419 select SYS_FSL_ERRATUM_A007212 420 select SYS_FSL_ERRATUM_A009942 421 select SYS_FSL_HAS_DDR3 422 select SYS_FSL_HAS_SEC 423 select SYS_FSL_QORIQ_CHASSIS2 424 select SYS_FSL_SEC_BE 425 select SYS_FSL_SEC_COMPAT_4 426 select SYS_PPC64 427 select FSL_IFC 428 imply CMD_EEPROM 429 imply CMD_NAND 430 imply CMD_REGINFO 431 432config ARCH_B4860 433 bool 434 select E500MC 435 select E6500 436 select FSL_LAW 437 select SYS_FSL_DDR_VER_47 438 select SYS_FSL_ERRATUM_A004477 439 select SYS_FSL_ERRATUM_A005871 440 select SYS_FSL_ERRATUM_A006379 441 select SYS_FSL_ERRATUM_A006384 442 select SYS_FSL_ERRATUM_A006475 443 select SYS_FSL_ERRATUM_A006593 444 select SYS_FSL_ERRATUM_A007075 445 select SYS_FSL_ERRATUM_A007186 446 select SYS_FSL_ERRATUM_A007212 447 select SYS_FSL_ERRATUM_A007907 448 select SYS_FSL_ERRATUM_A009942 449 select SYS_FSL_HAS_DDR3 450 select SYS_FSL_HAS_SEC 451 select SYS_FSL_QORIQ_CHASSIS2 452 select SYS_FSL_SEC_BE 453 select SYS_FSL_SEC_COMPAT_4 454 select SYS_PPC64 455 select FSL_IFC 456 imply CMD_EEPROM 457 imply CMD_NAND 458 imply CMD_REGINFO 459 460config ARCH_BSC9131 461 bool 462 select FSL_LAW 463 select SYS_FSL_DDR_VER_44 464 select SYS_FSL_ERRATUM_A004477 465 select SYS_FSL_ERRATUM_A005125 466 select SYS_FSL_ERRATUM_ESDHC111 467 select SYS_FSL_HAS_DDR3 468 select SYS_FSL_HAS_SEC 469 select SYS_FSL_SEC_BE 470 select SYS_FSL_SEC_COMPAT_4 471 select FSL_IFC 472 imply CMD_EEPROM 473 imply CMD_NAND 474 imply CMD_REGINFO 475 476config ARCH_BSC9132 477 bool 478 select FSL_LAW 479 select SYS_FSL_DDR_VER_46 480 select SYS_FSL_ERRATUM_A004477 481 select SYS_FSL_ERRATUM_A005125 482 select SYS_FSL_ERRATUM_A005434 483 select SYS_FSL_ERRATUM_ESDHC111 484 select SYS_FSL_ERRATUM_I2C_A004447 485 select SYS_FSL_ERRATUM_IFC_A002769 486 select SYS_FSL_HAS_DDR3 487 select SYS_FSL_HAS_SEC 488 select SYS_FSL_SEC_BE 489 select SYS_FSL_SEC_COMPAT_4 490 select SYS_PPC_E500_USE_DEBUG_TLB 491 select FSL_IFC 492 imply CMD_EEPROM 493 imply CMD_MTDPARTS 494 imply CMD_NAND 495 imply CMD_PCI 496 imply CMD_REGINFO 497 498config ARCH_C29X 499 bool 500 select FSL_LAW 501 select SYS_FSL_DDR_VER_46 502 select SYS_FSL_ERRATUM_A005125 503 select SYS_FSL_ERRATUM_ESDHC111 504 select SYS_FSL_HAS_DDR3 505 select SYS_FSL_HAS_SEC 506 select SYS_FSL_SEC_BE 507 select SYS_FSL_SEC_COMPAT_6 508 select SYS_PPC_E500_USE_DEBUG_TLB 509 select FSL_IFC 510 imply CMD_NAND 511 imply CMD_PCI 512 imply CMD_REGINFO 513 514config ARCH_MPC8536 515 bool 516 select FSL_LAW 517 select SYS_FSL_ERRATUM_A004508 518 select SYS_FSL_ERRATUM_A005125 519 select SYS_FSL_HAS_DDR2 520 select SYS_FSL_HAS_DDR3 521 select SYS_FSL_HAS_SEC 522 select SYS_FSL_SEC_BE 523 select SYS_FSL_SEC_COMPAT_2 524 select SYS_PPC_E500_USE_DEBUG_TLB 525 select FSL_ELBC 526 imply CMD_NAND 527 imply CMD_SATA 528 imply CMD_REGINFO 529 530config ARCH_MPC8540 531 bool 532 select FSL_LAW 533 select SYS_FSL_HAS_DDR1 534 535config ARCH_MPC8541 536 bool 537 select FSL_LAW 538 select SYS_FSL_HAS_DDR1 539 select SYS_FSL_HAS_SEC 540 select SYS_FSL_SEC_BE 541 select SYS_FSL_SEC_COMPAT_2 542 543config ARCH_MPC8544 544 bool 545 select FSL_LAW 546 select SYS_FSL_ERRATUM_A005125 547 select SYS_FSL_HAS_DDR2 548 select SYS_FSL_HAS_SEC 549 select SYS_FSL_SEC_BE 550 select SYS_FSL_SEC_COMPAT_2 551 select SYS_PPC_E500_USE_DEBUG_TLB 552 select FSL_ELBC 553 554config ARCH_MPC8548 555 bool 556 select FSL_LAW 557 select SYS_FSL_ERRATUM_A005125 558 select SYS_FSL_ERRATUM_NMG_DDR120 559 select SYS_FSL_ERRATUM_NMG_LBC103 560 select SYS_FSL_ERRATUM_NMG_ETSEC129 561 select SYS_FSL_ERRATUM_I2C_A004447 562 select SYS_FSL_HAS_DDR2 563 select SYS_FSL_HAS_DDR1 564 select SYS_FSL_HAS_SEC 565 select SYS_FSL_SEC_BE 566 select SYS_FSL_SEC_COMPAT_2 567 select SYS_PPC_E500_USE_DEBUG_TLB 568 imply ENV_IS_IN_FLASH 569 imply CMD_REGINFO 570 571config ARCH_MPC8555 572 bool 573 select FSL_LAW 574 select SYS_FSL_HAS_DDR1 575 select SYS_FSL_HAS_SEC 576 select SYS_FSL_SEC_BE 577 select SYS_FSL_SEC_COMPAT_2 578 579config ARCH_MPC8560 580 bool 581 select FSL_LAW 582 select SYS_FSL_HAS_DDR1 583 584config ARCH_MPC8568 585 bool 586 select FSL_LAW 587 select SYS_FSL_HAS_DDR2 588 select SYS_FSL_HAS_SEC 589 select SYS_FSL_SEC_BE 590 select SYS_FSL_SEC_COMPAT_2 591 592config ARCH_MPC8569 593 bool 594 select FSL_LAW 595 select SYS_FSL_ERRATUM_A004508 596 select SYS_FSL_ERRATUM_A005125 597 select SYS_FSL_HAS_DDR3 598 select SYS_FSL_HAS_SEC 599 select SYS_FSL_SEC_BE 600 select SYS_FSL_SEC_COMPAT_2 601 select FSL_ELBC 602 imply CMD_NAND 603 604config ARCH_MPC8572 605 bool 606 select FSL_LAW 607 select SYS_FSL_ERRATUM_A004508 608 select SYS_FSL_ERRATUM_A005125 609 select SYS_FSL_ERRATUM_DDR_115 610 select SYS_FSL_ERRATUM_DDR111_DDR134 611 select SYS_FSL_HAS_DDR2 612 select SYS_FSL_HAS_DDR3 613 select SYS_FSL_HAS_SEC 614 select SYS_FSL_SEC_BE 615 select SYS_FSL_SEC_COMPAT_2 616 select SYS_PPC_E500_USE_DEBUG_TLB 617 select FSL_ELBC 618 imply CMD_NAND 619 imply ENV_IS_IN_FLASH 620 621config ARCH_P1010 622 bool 623 select FSL_LAW 624 select SYS_FSL_ERRATUM_A004477 625 select SYS_FSL_ERRATUM_A004508 626 select SYS_FSL_ERRATUM_A005125 627 select SYS_FSL_ERRATUM_A006261 628 select SYS_FSL_ERRATUM_A007075 629 select SYS_FSL_ERRATUM_ESDHC111 630 select SYS_FSL_ERRATUM_I2C_A004447 631 select SYS_FSL_ERRATUM_IFC_A002769 632 select SYS_FSL_ERRATUM_P1010_A003549 633 select SYS_FSL_ERRATUM_SEC_A003571 634 select SYS_FSL_ERRATUM_IFC_A003399 635 select SYS_FSL_HAS_DDR3 636 select SYS_FSL_HAS_SEC 637 select SYS_FSL_SEC_BE 638 select SYS_FSL_SEC_COMPAT_4 639 select SYS_PPC_E500_USE_DEBUG_TLB 640 select FSL_IFC 641 imply CMD_EEPROM 642 imply CMD_MTDPARTS 643 imply CMD_NAND 644 imply CMD_SATA 645 imply CMD_PCI 646 imply CMD_REGINFO 647 648config ARCH_P1011 649 bool 650 select FSL_LAW 651 select SYS_FSL_ERRATUM_A004508 652 select SYS_FSL_ERRATUM_A005125 653 select SYS_FSL_ERRATUM_ELBC_A001 654 select SYS_FSL_ERRATUM_ESDHC111 655 select SYS_FSL_HAS_DDR3 656 select SYS_FSL_HAS_SEC 657 select SYS_FSL_SEC_BE 658 select SYS_FSL_SEC_COMPAT_2 659 select SYS_PPC_E500_USE_DEBUG_TLB 660 select FSL_ELBC 661 662config ARCH_P1020 663 bool 664 select FSL_LAW 665 select SYS_FSL_ERRATUM_A004508 666 select SYS_FSL_ERRATUM_A005125 667 select SYS_FSL_ERRATUM_ELBC_A001 668 select SYS_FSL_ERRATUM_ESDHC111 669 select SYS_FSL_HAS_DDR3 670 select SYS_FSL_HAS_SEC 671 select SYS_FSL_SEC_BE 672 select SYS_FSL_SEC_COMPAT_2 673 select SYS_PPC_E500_USE_DEBUG_TLB 674 select FSL_ELBC 675 imply CMD_NAND 676 imply CMD_SATA 677 imply CMD_PCI 678 imply CMD_REGINFO 679 680config ARCH_P1021 681 bool 682 select FSL_LAW 683 select SYS_FSL_ERRATUM_A004508 684 select SYS_FSL_ERRATUM_A005125 685 select SYS_FSL_ERRATUM_ELBC_A001 686 select SYS_FSL_ERRATUM_ESDHC111 687 select SYS_FSL_HAS_DDR3 688 select SYS_FSL_HAS_SEC 689 select SYS_FSL_SEC_BE 690 select SYS_FSL_SEC_COMPAT_2 691 select SYS_PPC_E500_USE_DEBUG_TLB 692 select FSL_ELBC 693 imply CMD_REGINFO 694 imply CMD_NAND 695 imply CMD_SATA 696 imply CMD_REGINFO 697 698config ARCH_P1022 699 bool 700 select FSL_LAW 701 select SYS_FSL_ERRATUM_A004477 702 select SYS_FSL_ERRATUM_A004508 703 select SYS_FSL_ERRATUM_A005125 704 select SYS_FSL_ERRATUM_ELBC_A001 705 select SYS_FSL_ERRATUM_ESDHC111 706 select SYS_FSL_ERRATUM_SATA_A001 707 select SYS_FSL_HAS_DDR3 708 select SYS_FSL_HAS_SEC 709 select SYS_FSL_SEC_BE 710 select SYS_FSL_SEC_COMPAT_2 711 select SYS_PPC_E500_USE_DEBUG_TLB 712 select FSL_ELBC 713 714config ARCH_P1023 715 bool 716 select FSL_LAW 717 select SYS_FSL_ERRATUM_A004508 718 select SYS_FSL_ERRATUM_A005125 719 select SYS_FSL_ERRATUM_I2C_A004447 720 select SYS_FSL_HAS_DDR3 721 select SYS_FSL_HAS_SEC 722 select SYS_FSL_SEC_BE 723 select SYS_FSL_SEC_COMPAT_4 724 select FSL_ELBC 725 726config ARCH_P1024 727 bool 728 select FSL_LAW 729 select SYS_FSL_ERRATUM_A004508 730 select SYS_FSL_ERRATUM_A005125 731 select SYS_FSL_ERRATUM_ELBC_A001 732 select SYS_FSL_ERRATUM_ESDHC111 733 select SYS_FSL_HAS_DDR3 734 select SYS_FSL_HAS_SEC 735 select SYS_FSL_SEC_BE 736 select SYS_FSL_SEC_COMPAT_2 737 select SYS_PPC_E500_USE_DEBUG_TLB 738 select FSL_ELBC 739 imply CMD_EEPROM 740 imply CMD_NAND 741 imply CMD_SATA 742 imply CMD_PCI 743 imply CMD_REGINFO 744 745config ARCH_P1025 746 bool 747 select FSL_LAW 748 select SYS_FSL_ERRATUM_A004508 749 select SYS_FSL_ERRATUM_A005125 750 select SYS_FSL_ERRATUM_ELBC_A001 751 select SYS_FSL_ERRATUM_ESDHC111 752 select SYS_FSL_HAS_DDR3 753 select SYS_FSL_HAS_SEC 754 select SYS_FSL_SEC_BE 755 select SYS_FSL_SEC_COMPAT_2 756 select SYS_PPC_E500_USE_DEBUG_TLB 757 select FSL_ELBC 758 imply CMD_SATA 759 imply CMD_REGINFO 760 761config ARCH_P2020 762 bool 763 select FSL_LAW 764 select SYS_FSL_ERRATUM_A004477 765 select SYS_FSL_ERRATUM_A004508 766 select SYS_FSL_ERRATUM_A005125 767 select SYS_FSL_ERRATUM_ESDHC111 768 select SYS_FSL_ERRATUM_ESDHC_A001 769 select SYS_FSL_HAS_DDR3 770 select SYS_FSL_HAS_SEC 771 select SYS_FSL_SEC_BE 772 select SYS_FSL_SEC_COMPAT_2 773 select SYS_PPC_E500_USE_DEBUG_TLB 774 select FSL_ELBC 775 imply CMD_EEPROM 776 imply CMD_NAND 777 imply CMD_REGINFO 778 779config ARCH_P2041 780 bool 781 select E500MC 782 select FSL_LAW 783 select SYS_FSL_ERRATUM_A004510 784 select SYS_FSL_ERRATUM_A004849 785 select SYS_FSL_ERRATUM_A006261 786 select SYS_FSL_ERRATUM_CPU_A003999 787 select SYS_FSL_ERRATUM_DDR_A003 788 select SYS_FSL_ERRATUM_DDR_A003474 789 select SYS_FSL_ERRATUM_ESDHC111 790 select SYS_FSL_ERRATUM_I2C_A004447 791 select SYS_FSL_ERRATUM_NMG_CPU_A011 792 select SYS_FSL_ERRATUM_SRIO_A004034 793 select SYS_FSL_ERRATUM_USB14 794 select SYS_FSL_HAS_DDR3 795 select SYS_FSL_HAS_SEC 796 select SYS_FSL_QORIQ_CHASSIS1 797 select SYS_FSL_SEC_BE 798 select SYS_FSL_SEC_COMPAT_4 799 select FSL_ELBC 800 imply CMD_NAND 801 802config ARCH_P3041 803 bool 804 select E500MC 805 select FSL_LAW 806 select SYS_FSL_DDR_VER_44 807 select SYS_FSL_ERRATUM_A004510 808 select SYS_FSL_ERRATUM_A004849 809 select SYS_FSL_ERRATUM_A005812 810 select SYS_FSL_ERRATUM_A006261 811 select SYS_FSL_ERRATUM_CPU_A003999 812 select SYS_FSL_ERRATUM_DDR_A003 813 select SYS_FSL_ERRATUM_DDR_A003474 814 select SYS_FSL_ERRATUM_ESDHC111 815 select SYS_FSL_ERRATUM_I2C_A004447 816 select SYS_FSL_ERRATUM_NMG_CPU_A011 817 select SYS_FSL_ERRATUM_SRIO_A004034 818 select SYS_FSL_ERRATUM_USB14 819 select SYS_FSL_HAS_DDR3 820 select SYS_FSL_HAS_SEC 821 select SYS_FSL_QORIQ_CHASSIS1 822 select SYS_FSL_SEC_BE 823 select SYS_FSL_SEC_COMPAT_4 824 select FSL_ELBC 825 imply CMD_NAND 826 imply CMD_SATA 827 imply CMD_REGINFO 828 829config ARCH_P4080 830 bool 831 select E500MC 832 select FSL_LAW 833 select SYS_FSL_DDR_VER_44 834 select SYS_FSL_ERRATUM_A004510 835 select SYS_FSL_ERRATUM_A004580 836 select SYS_FSL_ERRATUM_A004849 837 select SYS_FSL_ERRATUM_A005812 838 select SYS_FSL_ERRATUM_A007075 839 select SYS_FSL_ERRATUM_CPC_A002 840 select SYS_FSL_ERRATUM_CPC_A003 841 select SYS_FSL_ERRATUM_CPU_A003999 842 select SYS_FSL_ERRATUM_DDR_A003 843 select SYS_FSL_ERRATUM_DDR_A003474 844 select SYS_FSL_ERRATUM_ELBC_A001 845 select SYS_FSL_ERRATUM_ESDHC111 846 select SYS_FSL_ERRATUM_ESDHC13 847 select SYS_FSL_ERRATUM_ESDHC135 848 select SYS_FSL_ERRATUM_I2C_A004447 849 select SYS_FSL_ERRATUM_NMG_CPU_A011 850 select SYS_FSL_ERRATUM_SRIO_A004034 851 select SYS_P4080_ERRATUM_CPU22 852 select SYS_P4080_ERRATUM_PCIE_A003 853 select SYS_P4080_ERRATUM_SERDES8 854 select SYS_P4080_ERRATUM_SERDES9 855 select SYS_P4080_ERRATUM_SERDES_A001 856 select SYS_P4080_ERRATUM_SERDES_A005 857 select SYS_FSL_HAS_DDR3 858 select SYS_FSL_HAS_SEC 859 select SYS_FSL_QORIQ_CHASSIS1 860 select SYS_FSL_SEC_BE 861 select SYS_FSL_SEC_COMPAT_4 862 select FSL_ELBC 863 imply CMD_SATA 864 imply CMD_REGINFO 865 866config ARCH_P5020 867 bool 868 select E500MC 869 select FSL_LAW 870 select SYS_FSL_DDR_VER_44 871 select SYS_FSL_ERRATUM_A004510 872 select SYS_FSL_ERRATUM_A006261 873 select SYS_FSL_ERRATUM_DDR_A003 874 select SYS_FSL_ERRATUM_DDR_A003474 875 select SYS_FSL_ERRATUM_ESDHC111 876 select SYS_FSL_ERRATUM_I2C_A004447 877 select SYS_FSL_ERRATUM_SRIO_A004034 878 select SYS_FSL_ERRATUM_USB14 879 select SYS_FSL_HAS_DDR3 880 select SYS_FSL_HAS_SEC 881 select SYS_FSL_QORIQ_CHASSIS1 882 select SYS_FSL_SEC_BE 883 select SYS_FSL_SEC_COMPAT_4 884 select SYS_PPC64 885 select FSL_ELBC 886 imply CMD_SATA 887 imply CMD_REGINFO 888 889config ARCH_P5040 890 bool 891 select E500MC 892 select FSL_LAW 893 select SYS_FSL_DDR_VER_44 894 select SYS_FSL_ERRATUM_A004510 895 select SYS_FSL_ERRATUM_A004699 896 select SYS_FSL_ERRATUM_A005812 897 select SYS_FSL_ERRATUM_A006261 898 select SYS_FSL_ERRATUM_DDR_A003 899 select SYS_FSL_ERRATUM_DDR_A003474 900 select SYS_FSL_ERRATUM_ESDHC111 901 select SYS_FSL_ERRATUM_USB14 902 select SYS_FSL_HAS_DDR3 903 select SYS_FSL_HAS_SEC 904 select SYS_FSL_QORIQ_CHASSIS1 905 select SYS_FSL_SEC_BE 906 select SYS_FSL_SEC_COMPAT_4 907 select SYS_PPC64 908 select FSL_ELBC 909 imply CMD_SATA 910 imply CMD_REGINFO 911 912config ARCH_QEMU_E500 913 bool 914 915config ARCH_T1023 916 bool 917 select E500MC 918 select FSL_LAW 919 select SYS_FSL_DDR_VER_50 920 select SYS_FSL_ERRATUM_A008378 921 select SYS_FSL_ERRATUM_A009663 922 select SYS_FSL_ERRATUM_A009942 923 select SYS_FSL_ERRATUM_ESDHC111 924 select SYS_FSL_HAS_DDR3 925 select SYS_FSL_HAS_DDR4 926 select SYS_FSL_HAS_SEC 927 select SYS_FSL_QORIQ_CHASSIS2 928 select SYS_FSL_SEC_BE 929 select SYS_FSL_SEC_COMPAT_5 930 select FSL_IFC 931 imply CMD_EEPROM 932 imply CMD_NAND 933 imply CMD_REGINFO 934 935config ARCH_T1024 936 bool 937 select E500MC 938 select FSL_LAW 939 select SYS_FSL_DDR_VER_50 940 select SYS_FSL_ERRATUM_A008378 941 select SYS_FSL_ERRATUM_A009663 942 select SYS_FSL_ERRATUM_A009942 943 select SYS_FSL_ERRATUM_ESDHC111 944 select SYS_FSL_HAS_DDR3 945 select SYS_FSL_HAS_DDR4 946 select SYS_FSL_HAS_SEC 947 select SYS_FSL_QORIQ_CHASSIS2 948 select SYS_FSL_SEC_BE 949 select SYS_FSL_SEC_COMPAT_5 950 select FSL_IFC 951 imply CMD_EEPROM 952 imply CMD_NAND 953 imply CMD_MTDPARTS 954 imply CMD_REGINFO 955 956config ARCH_T1040 957 bool 958 select E500MC 959 select FSL_LAW 960 select SYS_FSL_DDR_VER_50 961 select SYS_FSL_ERRATUM_A008044 962 select SYS_FSL_ERRATUM_A008378 963 select SYS_FSL_ERRATUM_A009663 964 select SYS_FSL_ERRATUM_A009942 965 select SYS_FSL_ERRATUM_ESDHC111 966 select SYS_FSL_HAS_DDR3 967 select SYS_FSL_HAS_DDR4 968 select SYS_FSL_HAS_SEC 969 select SYS_FSL_QORIQ_CHASSIS2 970 select SYS_FSL_SEC_BE 971 select SYS_FSL_SEC_COMPAT_5 972 select FSL_IFC 973 imply CMD_MTDPARTS 974 imply CMD_NAND 975 imply CMD_SATA 976 imply CMD_REGINFO 977 978config ARCH_T1042 979 bool 980 select E500MC 981 select FSL_LAW 982 select SYS_FSL_DDR_VER_50 983 select SYS_FSL_ERRATUM_A008044 984 select SYS_FSL_ERRATUM_A008378 985 select SYS_FSL_ERRATUM_A009663 986 select SYS_FSL_ERRATUM_A009942 987 select SYS_FSL_ERRATUM_ESDHC111 988 select SYS_FSL_HAS_DDR3 989 select SYS_FSL_HAS_DDR4 990 select SYS_FSL_HAS_SEC 991 select SYS_FSL_QORIQ_CHASSIS2 992 select SYS_FSL_SEC_BE 993 select SYS_FSL_SEC_COMPAT_5 994 select FSL_IFC 995 imply CMD_MTDPARTS 996 imply CMD_NAND 997 imply CMD_SATA 998 imply CMD_REGINFO 999 1000config ARCH_T2080 1001 bool 1002 select E500MC 1003 select E6500 1004 select FSL_LAW 1005 select SYS_FSL_DDR_VER_47 1006 select SYS_FSL_ERRATUM_A006379 1007 select SYS_FSL_ERRATUM_A006593 1008 select SYS_FSL_ERRATUM_A007186 1009 select SYS_FSL_ERRATUM_A007212 1010 select SYS_FSL_ERRATUM_A007815 1011 select SYS_FSL_ERRATUM_A007907 1012 select SYS_FSL_ERRATUM_A009942 1013 select SYS_FSL_ERRATUM_ESDHC111 1014 select SYS_FSL_HAS_DDR3 1015 select SYS_FSL_HAS_SEC 1016 select SYS_FSL_QORIQ_CHASSIS2 1017 select SYS_FSL_SEC_BE 1018 select SYS_FSL_SEC_COMPAT_4 1019 select SYS_PPC64 1020 select FSL_IFC 1021 imply CMD_SATA 1022 imply CMD_NAND 1023 imply CMD_REGINFO 1024 1025config ARCH_T2081 1026 bool 1027 select E500MC 1028 select E6500 1029 select FSL_LAW 1030 select SYS_FSL_DDR_VER_47 1031 select SYS_FSL_ERRATUM_A006379 1032 select SYS_FSL_ERRATUM_A006593 1033 select SYS_FSL_ERRATUM_A007186 1034 select SYS_FSL_ERRATUM_A007212 1035 select SYS_FSL_ERRATUM_A009942 1036 select SYS_FSL_ERRATUM_ESDHC111 1037 select SYS_FSL_HAS_DDR3 1038 select SYS_FSL_HAS_SEC 1039 select SYS_FSL_QORIQ_CHASSIS2 1040 select SYS_FSL_SEC_BE 1041 select SYS_FSL_SEC_COMPAT_4 1042 select SYS_PPC64 1043 select FSL_IFC 1044 imply CMD_NAND 1045 imply CMD_REGINFO 1046 1047config ARCH_T4160 1048 bool 1049 select E500MC 1050 select E6500 1051 select FSL_LAW 1052 select SYS_FSL_DDR_VER_47 1053 select SYS_FSL_ERRATUM_A004468 1054 select SYS_FSL_ERRATUM_A005871 1055 select SYS_FSL_ERRATUM_A006379 1056 select SYS_FSL_ERRATUM_A006593 1057 select SYS_FSL_ERRATUM_A007186 1058 select SYS_FSL_ERRATUM_A007798 1059 select SYS_FSL_ERRATUM_A009942 1060 select SYS_FSL_HAS_DDR3 1061 select SYS_FSL_HAS_SEC 1062 select SYS_FSL_QORIQ_CHASSIS2 1063 select SYS_FSL_SEC_BE 1064 select SYS_FSL_SEC_COMPAT_4 1065 select SYS_PPC64 1066 select FSL_IFC 1067 imply CMD_SATA 1068 imply CMD_NAND 1069 imply CMD_REGINFO 1070 1071config ARCH_T4240 1072 bool 1073 select E500MC 1074 select E6500 1075 select FSL_LAW 1076 select SYS_FSL_DDR_VER_47 1077 select SYS_FSL_ERRATUM_A004468 1078 select SYS_FSL_ERRATUM_A005871 1079 select SYS_FSL_ERRATUM_A006261 1080 select SYS_FSL_ERRATUM_A006379 1081 select SYS_FSL_ERRATUM_A006593 1082 select SYS_FSL_ERRATUM_A007186 1083 select SYS_FSL_ERRATUM_A007798 1084 select SYS_FSL_ERRATUM_A007815 1085 select SYS_FSL_ERRATUM_A007907 1086 select SYS_FSL_ERRATUM_A009942 1087 select SYS_FSL_HAS_DDR3 1088 select SYS_FSL_HAS_SEC 1089 select SYS_FSL_QORIQ_CHASSIS2 1090 select SYS_FSL_SEC_BE 1091 select SYS_FSL_SEC_COMPAT_4 1092 select SYS_PPC64 1093 select FSL_IFC 1094 imply CMD_SATA 1095 imply CMD_NAND 1096 imply CMD_REGINFO 1097 1098config BOOKE 1099 bool 1100 default y 1101 1102config E500 1103 bool 1104 default y 1105 help 1106 Enable PowerPC E500 cores, including e500v1, e500v2, e500mc 1107 1108config E500MC 1109 bool 1110 imply CMD_PCI 1111 help 1112 Enble PowerPC E500MC core 1113 1114config E6500 1115 bool 1116 help 1117 Enable PowerPC E6500 core 1118 1119config FSL_LAW 1120 bool 1121 help 1122 Use Freescale common code for Local Access Window 1123 1124config SECURE_BOOT 1125 bool "Secure Boot" 1126 help 1127 Enable Freescale Secure Boot feature. Normally selected 1128 by defconfig. If unsure, do not change. 1129 1130config MAX_CPUS 1131 int "Maximum number of CPUs permitted for MPC85xx" 1132 default 12 if ARCH_T4240 1133 default 8 if ARCH_P4080 || \ 1134 ARCH_T4160 1135 default 4 if ARCH_B4860 || \ 1136 ARCH_P2041 || \ 1137 ARCH_P3041 || \ 1138 ARCH_P5040 || \ 1139 ARCH_T1040 || \ 1140 ARCH_T1042 || \ 1141 ARCH_T2080 || \ 1142 ARCH_T2081 1143 default 2 if ARCH_B4420 || \ 1144 ARCH_BSC9132 || \ 1145 ARCH_MPC8572 || \ 1146 ARCH_P1020 || \ 1147 ARCH_P1021 || \ 1148 ARCH_P1022 || \ 1149 ARCH_P1023 || \ 1150 ARCH_P1024 || \ 1151 ARCH_P1025 || \ 1152 ARCH_P2020 || \ 1153 ARCH_P5020 || \ 1154 ARCH_T1023 || \ 1155 ARCH_T1024 1156 default 1 1157 help 1158 Set this number to the maximum number of possible CPUs in the SoC. 1159 SoCs may have multiple clusters with each cluster may have multiple 1160 ports. If some ports are reserved but higher ports are used for 1161 cores, count the reserved ports. This will allocate enough memory 1162 in spin table to properly handle all cores. 1163 1164config SYS_CCSRBAR_DEFAULT 1165 hex "Default CCSRBAR address" 1166 default 0xff700000 if ARCH_BSC9131 || \ 1167 ARCH_BSC9132 || \ 1168 ARCH_C29X || \ 1169 ARCH_MPC8536 || \ 1170 ARCH_MPC8540 || \ 1171 ARCH_MPC8541 || \ 1172 ARCH_MPC8544 || \ 1173 ARCH_MPC8548 || \ 1174 ARCH_MPC8555 || \ 1175 ARCH_MPC8560 || \ 1176 ARCH_MPC8568 || \ 1177 ARCH_MPC8569 || \ 1178 ARCH_MPC8572 || \ 1179 ARCH_P1010 || \ 1180 ARCH_P1011 || \ 1181 ARCH_P1020 || \ 1182 ARCH_P1021 || \ 1183 ARCH_P1022 || \ 1184 ARCH_P1024 || \ 1185 ARCH_P1025 || \ 1186 ARCH_P2020 1187 default 0xff600000 if ARCH_P1023 1188 default 0xfe000000 if ARCH_B4420 || \ 1189 ARCH_B4860 || \ 1190 ARCH_P2041 || \ 1191 ARCH_P3041 || \ 1192 ARCH_P4080 || \ 1193 ARCH_P5020 || \ 1194 ARCH_P5040 || \ 1195 ARCH_T1023 || \ 1196 ARCH_T1024 || \ 1197 ARCH_T1040 || \ 1198 ARCH_T1042 || \ 1199 ARCH_T2080 || \ 1200 ARCH_T2081 || \ 1201 ARCH_T4160 || \ 1202 ARCH_T4240 1203 default 0xe0000000 if ARCH_QEMU_E500 1204 help 1205 Default value of CCSRBAR comes from power-on-reset. It 1206 is fixed on each SoC. Some SoCs can have different value 1207 if changed by pre-boot regime. The value here must match 1208 the current value in SoC. If not sure, do not change. 1209 1210config SYS_FSL_ERRATUM_A004468 1211 bool 1212 1213config SYS_FSL_ERRATUM_A004477 1214 bool 1215 1216config SYS_FSL_ERRATUM_A004508 1217 bool 1218 1219config SYS_FSL_ERRATUM_A004580 1220 bool 1221 1222config SYS_FSL_ERRATUM_A004699 1223 bool 1224 1225config SYS_FSL_ERRATUM_A004849 1226 bool 1227 1228config SYS_FSL_ERRATUM_A004510 1229 bool 1230 1231config SYS_FSL_ERRATUM_A004510_SVR_REV 1232 hex 1233 depends on SYS_FSL_ERRATUM_A004510 1234 default 0x20 if ARCH_P4080 1235 default 0x10 1236 1237config SYS_FSL_ERRATUM_A004510_SVR_REV2 1238 hex 1239 depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041)) 1240 default 0x11 1241 1242config SYS_FSL_ERRATUM_A005125 1243 bool 1244 1245config SYS_FSL_ERRATUM_A005434 1246 bool 1247 1248config SYS_FSL_ERRATUM_A005812 1249 bool 1250 1251config SYS_FSL_ERRATUM_A005871 1252 bool 1253 1254config SYS_FSL_ERRATUM_A006261 1255 bool 1256 1257config SYS_FSL_ERRATUM_A006379 1258 bool 1259 1260config SYS_FSL_ERRATUM_A006384 1261 bool 1262 1263config SYS_FSL_ERRATUM_A006475 1264 bool 1265 1266config SYS_FSL_ERRATUM_A006593 1267 bool 1268 1269config SYS_FSL_ERRATUM_A007075 1270 bool 1271 1272config SYS_FSL_ERRATUM_A007186 1273 bool 1274 1275config SYS_FSL_ERRATUM_A007212 1276 bool 1277 1278config SYS_FSL_ERRATUM_A007815 1279 bool 1280 1281config SYS_FSL_ERRATUM_A007798 1282 bool 1283 1284config SYS_FSL_ERRATUM_A007907 1285 bool 1286 1287config SYS_FSL_ERRATUM_A008044 1288 bool 1289 1290config SYS_FSL_ERRATUM_CPC_A002 1291 bool 1292 1293config SYS_FSL_ERRATUM_CPC_A003 1294 bool 1295 1296config SYS_FSL_ERRATUM_CPU_A003999 1297 bool 1298 1299config SYS_FSL_ERRATUM_ELBC_A001 1300 bool 1301 1302config SYS_FSL_ERRATUM_I2C_A004447 1303 bool 1304 1305config SYS_FSL_A004447_SVR_REV 1306 hex 1307 depends on SYS_FSL_ERRATUM_I2C_A004447 1308 default 0x00 if ARCH_MPC8548 1309 default 0x10 if ARCH_P1010 1310 default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132 1311 default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020 1312 1313config SYS_FSL_ERRATUM_IFC_A002769 1314 bool 1315 1316config SYS_FSL_ERRATUM_IFC_A003399 1317 bool 1318 1319config SYS_FSL_ERRATUM_NMG_CPU_A011 1320 bool 1321 1322config SYS_FSL_ERRATUM_NMG_ETSEC129 1323 bool 1324 1325config SYS_FSL_ERRATUM_NMG_LBC103 1326 bool 1327 1328config SYS_FSL_ERRATUM_P1010_A003549 1329 bool 1330 1331config SYS_FSL_ERRATUM_SATA_A001 1332 bool 1333 1334config SYS_FSL_ERRATUM_SEC_A003571 1335 bool 1336 1337config SYS_FSL_ERRATUM_SRIO_A004034 1338 bool 1339 1340config SYS_FSL_ERRATUM_USB14 1341 bool 1342 1343config SYS_P4080_ERRATUM_CPU22 1344 bool 1345 1346config SYS_P4080_ERRATUM_PCIE_A003 1347 bool 1348 1349config SYS_P4080_ERRATUM_SERDES8 1350 bool 1351 1352config SYS_P4080_ERRATUM_SERDES9 1353 bool 1354 1355config SYS_P4080_ERRATUM_SERDES_A001 1356 bool 1357 1358config SYS_P4080_ERRATUM_SERDES_A005 1359 bool 1360 1361config SYS_FSL_QORIQ_CHASSIS1 1362 bool 1363 1364config SYS_FSL_QORIQ_CHASSIS2 1365 bool 1366 1367config SYS_FSL_NUM_LAWS 1368 int "Number of local access windows" 1369 depends on FSL_LAW 1370 default 32 if ARCH_B4420 || \ 1371 ARCH_B4860 || \ 1372 ARCH_P2041 || \ 1373 ARCH_P3041 || \ 1374 ARCH_P4080 || \ 1375 ARCH_P5020 || \ 1376 ARCH_P5040 || \ 1377 ARCH_T2080 || \ 1378 ARCH_T2081 || \ 1379 ARCH_T4160 || \ 1380 ARCH_T4240 1381 default 16 if ARCH_T1023 || \ 1382 ARCH_T1024 || \ 1383 ARCH_T1040 || \ 1384 ARCH_T1042 1385 default 12 if ARCH_BSC9131 || \ 1386 ARCH_BSC9132 || \ 1387 ARCH_C29X || \ 1388 ARCH_MPC8536 || \ 1389 ARCH_MPC8572 || \ 1390 ARCH_P1010 || \ 1391 ARCH_P1011 || \ 1392 ARCH_P1020 || \ 1393 ARCH_P1021 || \ 1394 ARCH_P1022 || \ 1395 ARCH_P1023 || \ 1396 ARCH_P1024 || \ 1397 ARCH_P1025 || \ 1398 ARCH_P2020 1399 default 10 if ARCH_MPC8544 || \ 1400 ARCH_MPC8548 || \ 1401 ARCH_MPC8568 || \ 1402 ARCH_MPC8569 1403 default 8 if ARCH_MPC8540 || \ 1404 ARCH_MPC8541 || \ 1405 ARCH_MPC8555 || \ 1406 ARCH_MPC8560 1407 help 1408 Number of local access windows. This is fixed per SoC. 1409 If not sure, do not change. 1410 1411config SYS_FSL_THREADS_PER_CORE 1412 int 1413 default 2 if E6500 1414 default 1 1415 1416config SYS_NUM_TLBCAMS 1417 int "Number of TLB CAM entries" 1418 default 64 if E500MC 1419 default 16 1420 help 1421 Number of TLB CAM entries for Book-E chips. 64 for E500MC, 1422 16 for other E500 SoCs. 1423 1424config SYS_PPC64 1425 bool 1426 1427config SYS_PPC_E500_USE_DEBUG_TLB 1428 bool 1429 1430config FSL_IFC 1431 bool 1432 1433config FSL_ELBC 1434 bool 1435 1436config SYS_PPC_E500_DEBUG_TLB 1437 int "Temporary TLB entry for external debugger" 1438 depends on SYS_PPC_E500_USE_DEBUG_TLB 1439 default 0 if ARCH_MPC8544 || ARCH_MPC8548 1440 default 1 if ARCH_MPC8536 1441 default 2 if ARCH_MPC8572 || \ 1442 ARCH_P1011 || \ 1443 ARCH_P1020 || \ 1444 ARCH_P1021 || \ 1445 ARCH_P1022 || \ 1446 ARCH_P1024 || \ 1447 ARCH_P1025 || \ 1448 ARCH_P2020 1449 default 3 if ARCH_P1010 || \ 1450 ARCH_BSC9132 || \ 1451 ARCH_C29X 1452 help 1453 Select a temporary TLB entry to be used during boot to work 1454 around limitations in e500v1 and e500v2 external debugger 1455 support. This reduces the portions of the boot code where 1456 breakpoints and single stepping do not work. The value of this 1457 symbol should be set to the TLB1 entry to be used for this 1458 purpose. If unsure, do not change. 1459 1460config SYS_FSL_IFC_CLK_DIV 1461 int "Divider of platform clock" 1462 depends on FSL_IFC 1463 default 2 if ARCH_B4420 || \ 1464 ARCH_B4860 || \ 1465 ARCH_T1024 || \ 1466 ARCH_T1023 || \ 1467 ARCH_T1040 || \ 1468 ARCH_T1042 || \ 1469 ARCH_T4160 || \ 1470 ARCH_T4240 1471 default 1 1472 help 1473 Defines divider of platform clock(clock input to 1474 IFC controller). 1475 1476config SYS_FSL_LBC_CLK_DIV 1477 int "Divider of platform clock" 1478 depends on FSL_ELBC || ARCH_MPC8540 || \ 1479 ARCH_MPC8548 || ARCH_MPC8541 || \ 1480 ARCH_MPC8555 || ARCH_MPC8560 || \ 1481 ARCH_MPC8568 1482 1483 default 2 if ARCH_P2041 || \ 1484 ARCH_P3041 || \ 1485 ARCH_P4080 || \ 1486 ARCH_P5020 || \ 1487 ARCH_P5040 1488 default 1 1489 1490 help 1491 Defines divider of platform clock(clock input to 1492 eLBC controller). 1493 1494source "board/freescale/b4860qds/Kconfig" 1495source "board/freescale/bsc9131rdb/Kconfig" 1496source "board/freescale/bsc9132qds/Kconfig" 1497source "board/freescale/c29xpcie/Kconfig" 1498source "board/freescale/corenet_ds/Kconfig" 1499source "board/freescale/mpc8536ds/Kconfig" 1500source "board/freescale/mpc8541cds/Kconfig" 1501source "board/freescale/mpc8544ds/Kconfig" 1502source "board/freescale/mpc8548cds/Kconfig" 1503source "board/freescale/mpc8555cds/Kconfig" 1504source "board/freescale/mpc8568mds/Kconfig" 1505source "board/freescale/mpc8569mds/Kconfig" 1506source "board/freescale/mpc8572ds/Kconfig" 1507source "board/freescale/p1010rdb/Kconfig" 1508source "board/freescale/p1022ds/Kconfig" 1509source "board/freescale/p1023rdb/Kconfig" 1510source "board/freescale/p1_p2_rdb_pc/Kconfig" 1511source "board/freescale/p1_twr/Kconfig" 1512source "board/freescale/p2041rdb/Kconfig" 1513source "board/freescale/qemu-ppce500/Kconfig" 1514source "board/freescale/t102xqds/Kconfig" 1515source "board/freescale/t102xrdb/Kconfig" 1516source "board/freescale/t1040qds/Kconfig" 1517source "board/freescale/t104xrdb/Kconfig" 1518source "board/freescale/t208xqds/Kconfig" 1519source "board/freescale/t208xrdb/Kconfig" 1520source "board/freescale/t4qds/Kconfig" 1521source "board/freescale/t4rdb/Kconfig" 1522source "board/gdsys/p1022/Kconfig" 1523source "board/keymile/kmp204x/Kconfig" 1524source "board/sbc8548/Kconfig" 1525source "board/socrates/Kconfig" 1526source "board/varisys/cyrus/Kconfig" 1527source "board/xes/xpedite520x/Kconfig" 1528source "board/xes/xpedite537x/Kconfig" 1529source "board/xes/xpedite550x/Kconfig" 1530source "board/Arcturus/ucp1020/Kconfig" 1531 1532endmenu 1533