1menu "mpc85xx CPU" 2 depends on MPC85xx 3 4config SYS_CPU 5 default "mpc85xx" 6 7config CMD_ERRATA 8 bool "Enable the 'errata' command" 9 depends on MPC85xx 10 default y 11 help 12 This enables the 'errata' command which displays a list of errata 13 work-arounds which are enabled for the current board. 14 15choice 16 prompt "Target select" 17 optional 18 19config TARGET_SBC8548 20 bool "Support sbc8548" 21 select ARCH_MPC8548 22 23config TARGET_SOCRATES 24 bool "Support socrates" 25 select ARCH_MPC8544 26 27config TARGET_B4420QDS 28 bool "Support B4420QDS" 29 select ARCH_B4420 30 select SUPPORT_SPL 31 select PHYS_64BIT 32 33config TARGET_B4860QDS 34 bool "Support B4860QDS" 35 select ARCH_B4860 36 select BOARD_LATE_INIT if CHAIN_OF_TRUST 37 select SUPPORT_SPL 38 select PHYS_64BIT 39 40config TARGET_BSC9131RDB 41 bool "Support BSC9131RDB" 42 select ARCH_BSC9131 43 select SUPPORT_SPL 44 select BOARD_EARLY_INIT_F 45 46config TARGET_BSC9132QDS 47 bool "Support BSC9132QDS" 48 select ARCH_BSC9132 49 select BOARD_LATE_INIT if CHAIN_OF_TRUST 50 select SUPPORT_SPL 51 select BOARD_EARLY_INIT_F 52 53config TARGET_C29XPCIE 54 bool "Support C29XPCIE" 55 select ARCH_C29X 56 select BOARD_LATE_INIT if CHAIN_OF_TRUST 57 select SUPPORT_SPL 58 select SUPPORT_TPL 59 select PHYS_64BIT 60 61config TARGET_P3041DS 62 bool "Support P3041DS" 63 select PHYS_64BIT 64 select ARCH_P3041 65 select BOARD_LATE_INIT if CHAIN_OF_TRUST 66 imply CMD_SATA 67 68config TARGET_P4080DS 69 bool "Support P4080DS" 70 select PHYS_64BIT 71 select ARCH_P4080 72 select BOARD_LATE_INIT if CHAIN_OF_TRUST 73 imply CMD_SATA 74 75config TARGET_P5020DS 76 bool "Support P5020DS" 77 select PHYS_64BIT 78 select ARCH_P5020 79 select BOARD_LATE_INIT if CHAIN_OF_TRUST 80 imply CMD_SATA 81 82config TARGET_P5040DS 83 bool "Support P5040DS" 84 select PHYS_64BIT 85 select ARCH_P5040 86 select BOARD_LATE_INIT if CHAIN_OF_TRUST 87 imply CMD_SATA 88 89config TARGET_MPC8536DS 90 bool "Support MPC8536DS" 91 select ARCH_MPC8536 92# Use DDR3 controller with DDR2 DIMMs on this board 93 select SYS_FSL_DDRC_GEN3 94 imply CMD_SATA 95 96config TARGET_MPC8541CDS 97 bool "Support MPC8541CDS" 98 select ARCH_MPC8541 99 100config TARGET_MPC8544DS 101 bool "Support MPC8544DS" 102 select ARCH_MPC8544 103 104config TARGET_MPC8548CDS 105 bool "Support MPC8548CDS" 106 select ARCH_MPC8548 107 108config TARGET_MPC8555CDS 109 bool "Support MPC8555CDS" 110 select ARCH_MPC8555 111 112config TARGET_MPC8568MDS 113 bool "Support MPC8568MDS" 114 select ARCH_MPC8568 115 116config TARGET_MPC8569MDS 117 bool "Support MPC8569MDS" 118 select ARCH_MPC8569 119 120config TARGET_MPC8572DS 121 bool "Support MPC8572DS" 122 select ARCH_MPC8572 123# Use DDR3 controller with DDR2 DIMMs on this board 124 select SYS_FSL_DDRC_GEN3 125 imply SCSI 126 127config TARGET_P1010RDB_PA 128 bool "Support P1010RDB_PA" 129 select ARCH_P1010 130 select BOARD_LATE_INIT if CHAIN_OF_TRUST 131 select SUPPORT_SPL 132 select SUPPORT_TPL 133 imply CMD_EEPROM 134 imply CMD_SATA 135 136config TARGET_P1010RDB_PB 137 bool "Support P1010RDB_PB" 138 select ARCH_P1010 139 select BOARD_LATE_INIT if CHAIN_OF_TRUST 140 select SUPPORT_SPL 141 select SUPPORT_TPL 142 imply CMD_EEPROM 143 imply CMD_SATA 144 145config TARGET_P1022DS 146 bool "Support P1022DS" 147 select ARCH_P1022 148 select SUPPORT_SPL 149 select SUPPORT_TPL 150 imply CMD_SATA 151 152config TARGET_P1023RDB 153 bool "Support P1023RDB" 154 select ARCH_P1023 155 imply CMD_EEPROM 156 157config TARGET_P1020MBG 158 bool "Support P1020MBG-PC" 159 select SUPPORT_SPL 160 select SUPPORT_TPL 161 select ARCH_P1020 162 imply CMD_EEPROM 163 imply CMD_SATA 164 165config TARGET_P1020RDB_PC 166 bool "Support P1020RDB-PC" 167 select SUPPORT_SPL 168 select SUPPORT_TPL 169 select ARCH_P1020 170 imply CMD_EEPROM 171 imply CMD_SATA 172 173config TARGET_P1020RDB_PD 174 bool "Support P1020RDB-PD" 175 select SUPPORT_SPL 176 select SUPPORT_TPL 177 select ARCH_P1020 178 imply CMD_EEPROM 179 imply CMD_SATA 180 181config TARGET_P1020UTM 182 bool "Support P1020UTM" 183 select SUPPORT_SPL 184 select SUPPORT_TPL 185 select ARCH_P1020 186 imply CMD_EEPROM 187 imply CMD_SATA 188 189config TARGET_P1021RDB 190 bool "Support P1021RDB" 191 select SUPPORT_SPL 192 select SUPPORT_TPL 193 select ARCH_P1021 194 imply CMD_EEPROM 195 imply CMD_SATA 196 197config TARGET_P1024RDB 198 bool "Support P1024RDB" 199 select SUPPORT_SPL 200 select SUPPORT_TPL 201 select ARCH_P1024 202 imply CMD_EEPROM 203 imply CMD_SATA 204 205config TARGET_P1025RDB 206 bool "Support P1025RDB" 207 select SUPPORT_SPL 208 select SUPPORT_TPL 209 select ARCH_P1025 210 imply CMD_EEPROM 211 imply CMD_SATA 212 213config TARGET_P2020RDB 214 bool "Support P2020RDB-PC" 215 select SUPPORT_SPL 216 select SUPPORT_TPL 217 select ARCH_P2020 218 imply CMD_EEPROM 219 imply CMD_SATA 220 221config TARGET_P1_TWR 222 bool "Support p1_twr" 223 select ARCH_P1025 224 225config TARGET_P2041RDB 226 bool "Support P2041RDB" 227 select ARCH_P2041 228 select BOARD_LATE_INIT if CHAIN_OF_TRUST 229 select PHYS_64BIT 230 imply CMD_SATA 231 232config TARGET_QEMU_PPCE500 233 bool "Support qemu-ppce500" 234 select ARCH_QEMU_E500 235 select PHYS_64BIT 236 237config TARGET_T1024QDS 238 bool "Support T1024QDS" 239 select ARCH_T1024 240 select BOARD_LATE_INIT if CHAIN_OF_TRUST 241 select SUPPORT_SPL 242 select PHYS_64BIT 243 imply CMD_EEPROM 244 imply CMD_SATA 245 246config TARGET_T1023RDB 247 bool "Support T1023RDB" 248 select ARCH_T1023 249 select BOARD_LATE_INIT if CHAIN_OF_TRUST 250 select SUPPORT_SPL 251 select PHYS_64BIT 252 imply CMD_EEPROM 253 254config TARGET_T1024RDB 255 bool "Support T1024RDB" 256 select ARCH_T1024 257 select BOARD_LATE_INIT if CHAIN_OF_TRUST 258 select SUPPORT_SPL 259 select PHYS_64BIT 260 imply CMD_EEPROM 261 262config TARGET_T1040QDS 263 bool "Support T1040QDS" 264 select ARCH_T1040 265 select BOARD_LATE_INIT if CHAIN_OF_TRUST 266 select PHYS_64BIT 267 imply CMD_EEPROM 268 imply CMD_SATA 269 270config TARGET_T1040RDB 271 bool "Support T1040RDB" 272 select ARCH_T1040 273 select BOARD_LATE_INIT if CHAIN_OF_TRUST 274 select SUPPORT_SPL 275 select PHYS_64BIT 276 imply CMD_SATA 277 278config TARGET_T1040D4RDB 279 bool "Support T1040D4RDB" 280 select ARCH_T1040 281 select BOARD_LATE_INIT if CHAIN_OF_TRUST 282 select SUPPORT_SPL 283 select PHYS_64BIT 284 imply CMD_SATA 285 286config TARGET_T1042RDB 287 bool "Support T1042RDB" 288 select ARCH_T1042 289 select BOARD_LATE_INIT if CHAIN_OF_TRUST 290 select SUPPORT_SPL 291 select PHYS_64BIT 292 imply CMD_SATA 293 294config TARGET_T1042D4RDB 295 bool "Support T1042D4RDB" 296 select ARCH_T1042 297 select BOARD_LATE_INIT if CHAIN_OF_TRUST 298 select SUPPORT_SPL 299 select PHYS_64BIT 300 imply CMD_SATA 301 302config TARGET_T1042RDB_PI 303 bool "Support T1042RDB_PI" 304 select ARCH_T1042 305 select BOARD_LATE_INIT if CHAIN_OF_TRUST 306 select SUPPORT_SPL 307 select PHYS_64BIT 308 imply CMD_SATA 309 310config TARGET_T2080QDS 311 bool "Support T2080QDS" 312 select ARCH_T2080 313 select BOARD_LATE_INIT if CHAIN_OF_TRUST 314 select SUPPORT_SPL 315 select PHYS_64BIT 316 imply CMD_SATA 317 318config TARGET_T2080RDB 319 bool "Support T2080RDB" 320 select ARCH_T2080 321 select BOARD_LATE_INIT if CHAIN_OF_TRUST 322 select SUPPORT_SPL 323 select PHYS_64BIT 324 imply CMD_SATA 325 326config TARGET_T2081QDS 327 bool "Support T2081QDS" 328 select ARCH_T2081 329 select SUPPORT_SPL 330 select PHYS_64BIT 331 332config TARGET_T4160QDS 333 bool "Support T4160QDS" 334 select ARCH_T4160 335 select BOARD_LATE_INIT if CHAIN_OF_TRUST 336 select SUPPORT_SPL 337 select PHYS_64BIT 338 imply CMD_SATA 339 340config TARGET_T4160RDB 341 bool "Support T4160RDB" 342 select ARCH_T4160 343 select SUPPORT_SPL 344 select PHYS_64BIT 345 346config TARGET_T4240QDS 347 bool "Support T4240QDS" 348 select ARCH_T4240 349 select BOARD_LATE_INIT if CHAIN_OF_TRUST 350 select SUPPORT_SPL 351 select PHYS_64BIT 352 imply CMD_SATA 353 354config TARGET_T4240RDB 355 bool "Support T4240RDB" 356 select ARCH_T4240 357 select SUPPORT_SPL 358 select PHYS_64BIT 359 imply CMD_SATA 360 361config TARGET_CONTROLCENTERD 362 bool "Support controlcenterd" 363 select ARCH_P1022 364 365config TARGET_KMP204X 366 bool "Support kmp204x" 367 select ARCH_P2041 368 select PHYS_64BIT 369 imply CMD_CRAMFS 370 imply FS_CRAMFS 371 372config TARGET_XPEDITE520X 373 bool "Support xpedite520x" 374 select ARCH_MPC8548 375 376config TARGET_XPEDITE537X 377 bool "Support xpedite537x" 378 select ARCH_MPC8572 379# Use DDR3 controller with DDR2 DIMMs on this board 380 select SYS_FSL_DDRC_GEN3 381 382config TARGET_XPEDITE550X 383 bool "Support xpedite550x" 384 select ARCH_P2020 385 386config TARGET_UCP1020 387 bool "Support uCP1020" 388 select ARCH_P1020 389 imply CMD_SATA 390 391config TARGET_CYRUS_P5020 392 bool "Support Varisys Cyrus P5020" 393 select ARCH_P5020 394 select PHYS_64BIT 395 396config TARGET_CYRUS_P5040 397 bool "Support Varisys Cyrus P5040" 398 select ARCH_P5040 399 select PHYS_64BIT 400 401endchoice 402 403config ARCH_B4420 404 bool 405 select E500MC 406 select E6500 407 select FSL_LAW 408 select SYS_FSL_DDR_VER_47 409 select SYS_FSL_ERRATUM_A004477 410 select SYS_FSL_ERRATUM_A005871 411 select SYS_FSL_ERRATUM_A006379 412 select SYS_FSL_ERRATUM_A006384 413 select SYS_FSL_ERRATUM_A006475 414 select SYS_FSL_ERRATUM_A006593 415 select SYS_FSL_ERRATUM_A007075 416 select SYS_FSL_ERRATUM_A007186 417 select SYS_FSL_ERRATUM_A007212 418 select SYS_FSL_ERRATUM_A009942 419 select SYS_FSL_HAS_DDR3 420 select SYS_FSL_HAS_SEC 421 select SYS_FSL_QORIQ_CHASSIS2 422 select SYS_FSL_SEC_BE 423 select SYS_FSL_SEC_COMPAT_4 424 select SYS_PPC64 425 select FSL_IFC 426 imply CMD_EEPROM 427 imply CMD_NAND 428 imply CMD_REGINFO 429 430config ARCH_B4860 431 bool 432 select E500MC 433 select E6500 434 select FSL_LAW 435 select SYS_FSL_DDR_VER_47 436 select SYS_FSL_ERRATUM_A004477 437 select SYS_FSL_ERRATUM_A005871 438 select SYS_FSL_ERRATUM_A006379 439 select SYS_FSL_ERRATUM_A006384 440 select SYS_FSL_ERRATUM_A006475 441 select SYS_FSL_ERRATUM_A006593 442 select SYS_FSL_ERRATUM_A007075 443 select SYS_FSL_ERRATUM_A007186 444 select SYS_FSL_ERRATUM_A007212 445 select SYS_FSL_ERRATUM_A007907 446 select SYS_FSL_ERRATUM_A009942 447 select SYS_FSL_HAS_DDR3 448 select SYS_FSL_HAS_SEC 449 select SYS_FSL_QORIQ_CHASSIS2 450 select SYS_FSL_SEC_BE 451 select SYS_FSL_SEC_COMPAT_4 452 select SYS_PPC64 453 select FSL_IFC 454 imply CMD_EEPROM 455 imply CMD_NAND 456 imply CMD_REGINFO 457 458config ARCH_BSC9131 459 bool 460 select FSL_LAW 461 select SYS_FSL_DDR_VER_44 462 select SYS_FSL_ERRATUM_A004477 463 select SYS_FSL_ERRATUM_A005125 464 select SYS_FSL_ERRATUM_ESDHC111 465 select SYS_FSL_HAS_DDR3 466 select SYS_FSL_HAS_SEC 467 select SYS_FSL_SEC_BE 468 select SYS_FSL_SEC_COMPAT_4 469 select FSL_IFC 470 imply CMD_EEPROM 471 imply CMD_NAND 472 imply CMD_REGINFO 473 474config ARCH_BSC9132 475 bool 476 select FSL_LAW 477 select SYS_FSL_DDR_VER_46 478 select SYS_FSL_ERRATUM_A004477 479 select SYS_FSL_ERRATUM_A005125 480 select SYS_FSL_ERRATUM_A005434 481 select SYS_FSL_ERRATUM_ESDHC111 482 select SYS_FSL_ERRATUM_I2C_A004447 483 select SYS_FSL_ERRATUM_IFC_A002769 484 select SYS_FSL_HAS_DDR3 485 select SYS_FSL_HAS_SEC 486 select SYS_FSL_SEC_BE 487 select SYS_FSL_SEC_COMPAT_4 488 select SYS_PPC_E500_USE_DEBUG_TLB 489 select FSL_IFC 490 imply CMD_EEPROM 491 imply CMD_MTDPARTS 492 imply CMD_NAND 493 imply CMD_PCI 494 imply CMD_REGINFO 495 496config ARCH_C29X 497 bool 498 select FSL_LAW 499 select SYS_FSL_DDR_VER_46 500 select SYS_FSL_ERRATUM_A005125 501 select SYS_FSL_ERRATUM_ESDHC111 502 select SYS_FSL_HAS_DDR3 503 select SYS_FSL_HAS_SEC 504 select SYS_FSL_SEC_BE 505 select SYS_FSL_SEC_COMPAT_6 506 select SYS_PPC_E500_USE_DEBUG_TLB 507 select FSL_IFC 508 imply CMD_NAND 509 imply CMD_PCI 510 imply CMD_REGINFO 511 512config ARCH_MPC8536 513 bool 514 select FSL_LAW 515 select SYS_FSL_ERRATUM_A004508 516 select SYS_FSL_ERRATUM_A005125 517 select SYS_FSL_HAS_DDR2 518 select SYS_FSL_HAS_DDR3 519 select SYS_FSL_HAS_SEC 520 select SYS_FSL_SEC_BE 521 select SYS_FSL_SEC_COMPAT_2 522 select SYS_PPC_E500_USE_DEBUG_TLB 523 select FSL_ELBC 524 imply CMD_NAND 525 imply CMD_SATA 526 imply CMD_REGINFO 527 528config ARCH_MPC8540 529 bool 530 select FSL_LAW 531 select SYS_FSL_HAS_DDR1 532 533config ARCH_MPC8541 534 bool 535 select FSL_LAW 536 select SYS_FSL_HAS_DDR1 537 select SYS_FSL_HAS_SEC 538 select SYS_FSL_SEC_BE 539 select SYS_FSL_SEC_COMPAT_2 540 541config ARCH_MPC8544 542 bool 543 select FSL_LAW 544 select SYS_FSL_ERRATUM_A005125 545 select SYS_FSL_HAS_DDR2 546 select SYS_FSL_HAS_SEC 547 select SYS_FSL_SEC_BE 548 select SYS_FSL_SEC_COMPAT_2 549 select SYS_PPC_E500_USE_DEBUG_TLB 550 select FSL_ELBC 551 552config ARCH_MPC8548 553 bool 554 select FSL_LAW 555 select SYS_FSL_ERRATUM_A005125 556 select SYS_FSL_ERRATUM_NMG_DDR120 557 select SYS_FSL_ERRATUM_NMG_LBC103 558 select SYS_FSL_ERRATUM_NMG_ETSEC129 559 select SYS_FSL_ERRATUM_I2C_A004447 560 select SYS_FSL_HAS_DDR2 561 select SYS_FSL_HAS_DDR1 562 select SYS_FSL_HAS_SEC 563 select SYS_FSL_SEC_BE 564 select SYS_FSL_SEC_COMPAT_2 565 select SYS_PPC_E500_USE_DEBUG_TLB 566 imply CMD_REGINFO 567 568config ARCH_MPC8555 569 bool 570 select FSL_LAW 571 select SYS_FSL_HAS_DDR1 572 select SYS_FSL_HAS_SEC 573 select SYS_FSL_SEC_BE 574 select SYS_FSL_SEC_COMPAT_2 575 576config ARCH_MPC8560 577 bool 578 select FSL_LAW 579 select SYS_FSL_HAS_DDR1 580 581config ARCH_MPC8568 582 bool 583 select FSL_LAW 584 select SYS_FSL_HAS_DDR2 585 select SYS_FSL_HAS_SEC 586 select SYS_FSL_SEC_BE 587 select SYS_FSL_SEC_COMPAT_2 588 589config ARCH_MPC8569 590 bool 591 select FSL_LAW 592 select SYS_FSL_ERRATUM_A004508 593 select SYS_FSL_ERRATUM_A005125 594 select SYS_FSL_HAS_DDR3 595 select SYS_FSL_HAS_SEC 596 select SYS_FSL_SEC_BE 597 select SYS_FSL_SEC_COMPAT_2 598 select FSL_ELBC 599 imply CMD_NAND 600 601config ARCH_MPC8572 602 bool 603 select FSL_LAW 604 select SYS_FSL_ERRATUM_A004508 605 select SYS_FSL_ERRATUM_A005125 606 select SYS_FSL_ERRATUM_DDR_115 607 select SYS_FSL_ERRATUM_DDR111_DDR134 608 select SYS_FSL_HAS_DDR2 609 select SYS_FSL_HAS_DDR3 610 select SYS_FSL_HAS_SEC 611 select SYS_FSL_SEC_BE 612 select SYS_FSL_SEC_COMPAT_2 613 select SYS_PPC_E500_USE_DEBUG_TLB 614 select FSL_ELBC 615 imply CMD_NAND 616 617config ARCH_P1010 618 bool 619 select FSL_LAW 620 select SYS_FSL_ERRATUM_A004477 621 select SYS_FSL_ERRATUM_A004508 622 select SYS_FSL_ERRATUM_A005125 623 select SYS_FSL_ERRATUM_A006261 624 select SYS_FSL_ERRATUM_A007075 625 select SYS_FSL_ERRATUM_ESDHC111 626 select SYS_FSL_ERRATUM_I2C_A004447 627 select SYS_FSL_ERRATUM_IFC_A002769 628 select SYS_FSL_ERRATUM_P1010_A003549 629 select SYS_FSL_ERRATUM_SEC_A003571 630 select SYS_FSL_ERRATUM_IFC_A003399 631 select SYS_FSL_HAS_DDR3 632 select SYS_FSL_HAS_SEC 633 select SYS_FSL_SEC_BE 634 select SYS_FSL_SEC_COMPAT_4 635 select SYS_PPC_E500_USE_DEBUG_TLB 636 select FSL_IFC 637 imply CMD_EEPROM 638 imply CMD_MTDPARTS 639 imply CMD_NAND 640 imply CMD_SATA 641 imply CMD_PCI 642 imply CMD_REGINFO 643 644config ARCH_P1011 645 bool 646 select FSL_LAW 647 select SYS_FSL_ERRATUM_A004508 648 select SYS_FSL_ERRATUM_A005125 649 select SYS_FSL_ERRATUM_ELBC_A001 650 select SYS_FSL_ERRATUM_ESDHC111 651 select SYS_FSL_HAS_DDR3 652 select SYS_FSL_HAS_SEC 653 select SYS_FSL_SEC_BE 654 select SYS_FSL_SEC_COMPAT_2 655 select SYS_PPC_E500_USE_DEBUG_TLB 656 select FSL_ELBC 657 658config ARCH_P1020 659 bool 660 select FSL_LAW 661 select SYS_FSL_ERRATUM_A004508 662 select SYS_FSL_ERRATUM_A005125 663 select SYS_FSL_ERRATUM_ELBC_A001 664 select SYS_FSL_ERRATUM_ESDHC111 665 select SYS_FSL_HAS_DDR3 666 select SYS_FSL_HAS_SEC 667 select SYS_FSL_SEC_BE 668 select SYS_FSL_SEC_COMPAT_2 669 select SYS_PPC_E500_USE_DEBUG_TLB 670 select FSL_ELBC 671 imply CMD_NAND 672 imply CMD_SATA 673 imply CMD_PCI 674 imply CMD_REGINFO 675 676config ARCH_P1021 677 bool 678 select FSL_LAW 679 select SYS_FSL_ERRATUM_A004508 680 select SYS_FSL_ERRATUM_A005125 681 select SYS_FSL_ERRATUM_ELBC_A001 682 select SYS_FSL_ERRATUM_ESDHC111 683 select SYS_FSL_HAS_DDR3 684 select SYS_FSL_HAS_SEC 685 select SYS_FSL_SEC_BE 686 select SYS_FSL_SEC_COMPAT_2 687 select SYS_PPC_E500_USE_DEBUG_TLB 688 select FSL_ELBC 689 imply CMD_REGINFO 690 imply CMD_NAND 691 imply CMD_SATA 692 imply CMD_REGINFO 693 694config ARCH_P1022 695 bool 696 select FSL_LAW 697 select SYS_FSL_ERRATUM_A004477 698 select SYS_FSL_ERRATUM_A004508 699 select SYS_FSL_ERRATUM_A005125 700 select SYS_FSL_ERRATUM_ELBC_A001 701 select SYS_FSL_ERRATUM_ESDHC111 702 select SYS_FSL_ERRATUM_SATA_A001 703 select SYS_FSL_HAS_DDR3 704 select SYS_FSL_HAS_SEC 705 select SYS_FSL_SEC_BE 706 select SYS_FSL_SEC_COMPAT_2 707 select SYS_PPC_E500_USE_DEBUG_TLB 708 select FSL_ELBC 709 710config ARCH_P1023 711 bool 712 select FSL_LAW 713 select SYS_FSL_ERRATUM_A004508 714 select SYS_FSL_ERRATUM_A005125 715 select SYS_FSL_ERRATUM_I2C_A004447 716 select SYS_FSL_HAS_DDR3 717 select SYS_FSL_HAS_SEC 718 select SYS_FSL_SEC_BE 719 select SYS_FSL_SEC_COMPAT_4 720 select FSL_ELBC 721 722config ARCH_P1024 723 bool 724 select FSL_LAW 725 select SYS_FSL_ERRATUM_A004508 726 select SYS_FSL_ERRATUM_A005125 727 select SYS_FSL_ERRATUM_ELBC_A001 728 select SYS_FSL_ERRATUM_ESDHC111 729 select SYS_FSL_HAS_DDR3 730 select SYS_FSL_HAS_SEC 731 select SYS_FSL_SEC_BE 732 select SYS_FSL_SEC_COMPAT_2 733 select SYS_PPC_E500_USE_DEBUG_TLB 734 select FSL_ELBC 735 imply CMD_EEPROM 736 imply CMD_NAND 737 imply CMD_SATA 738 imply CMD_PCI 739 imply CMD_REGINFO 740 741config ARCH_P1025 742 bool 743 select FSL_LAW 744 select SYS_FSL_ERRATUM_A004508 745 select SYS_FSL_ERRATUM_A005125 746 select SYS_FSL_ERRATUM_ELBC_A001 747 select SYS_FSL_ERRATUM_ESDHC111 748 select SYS_FSL_HAS_DDR3 749 select SYS_FSL_HAS_SEC 750 select SYS_FSL_SEC_BE 751 select SYS_FSL_SEC_COMPAT_2 752 select SYS_PPC_E500_USE_DEBUG_TLB 753 select FSL_ELBC 754 imply CMD_SATA 755 imply CMD_REGINFO 756 757config ARCH_P2020 758 bool 759 select FSL_LAW 760 select SYS_FSL_ERRATUM_A004477 761 select SYS_FSL_ERRATUM_A004508 762 select SYS_FSL_ERRATUM_A005125 763 select SYS_FSL_ERRATUM_ESDHC111 764 select SYS_FSL_ERRATUM_ESDHC_A001 765 select SYS_FSL_HAS_DDR3 766 select SYS_FSL_HAS_SEC 767 select SYS_FSL_SEC_BE 768 select SYS_FSL_SEC_COMPAT_2 769 select SYS_PPC_E500_USE_DEBUG_TLB 770 select FSL_ELBC 771 imply CMD_EEPROM 772 imply CMD_NAND 773 imply CMD_REGINFO 774 775config ARCH_P2041 776 bool 777 select E500MC 778 select FSL_LAW 779 select SYS_FSL_ERRATUM_A004510 780 select SYS_FSL_ERRATUM_A004849 781 select SYS_FSL_ERRATUM_A006261 782 select SYS_FSL_ERRATUM_CPU_A003999 783 select SYS_FSL_ERRATUM_DDR_A003 784 select SYS_FSL_ERRATUM_DDR_A003474 785 select SYS_FSL_ERRATUM_ESDHC111 786 select SYS_FSL_ERRATUM_I2C_A004447 787 select SYS_FSL_ERRATUM_NMG_CPU_A011 788 select SYS_FSL_ERRATUM_SRIO_A004034 789 select SYS_FSL_ERRATUM_USB14 790 select SYS_FSL_HAS_DDR3 791 select SYS_FSL_HAS_SEC 792 select SYS_FSL_QORIQ_CHASSIS1 793 select SYS_FSL_SEC_BE 794 select SYS_FSL_SEC_COMPAT_4 795 select FSL_ELBC 796 imply CMD_NAND 797 798config ARCH_P3041 799 bool 800 select E500MC 801 select FSL_LAW 802 select SYS_FSL_DDR_VER_44 803 select SYS_FSL_ERRATUM_A004510 804 select SYS_FSL_ERRATUM_A004849 805 select SYS_FSL_ERRATUM_A005812 806 select SYS_FSL_ERRATUM_A006261 807 select SYS_FSL_ERRATUM_CPU_A003999 808 select SYS_FSL_ERRATUM_DDR_A003 809 select SYS_FSL_ERRATUM_DDR_A003474 810 select SYS_FSL_ERRATUM_ESDHC111 811 select SYS_FSL_ERRATUM_I2C_A004447 812 select SYS_FSL_ERRATUM_NMG_CPU_A011 813 select SYS_FSL_ERRATUM_SRIO_A004034 814 select SYS_FSL_ERRATUM_USB14 815 select SYS_FSL_HAS_DDR3 816 select SYS_FSL_HAS_SEC 817 select SYS_FSL_QORIQ_CHASSIS1 818 select SYS_FSL_SEC_BE 819 select SYS_FSL_SEC_COMPAT_4 820 select FSL_ELBC 821 imply CMD_NAND 822 imply CMD_SATA 823 imply CMD_REGINFO 824 825config ARCH_P4080 826 bool 827 select E500MC 828 select FSL_LAW 829 select SYS_FSL_DDR_VER_44 830 select SYS_FSL_ERRATUM_A004510 831 select SYS_FSL_ERRATUM_A004580 832 select SYS_FSL_ERRATUM_A004849 833 select SYS_FSL_ERRATUM_A005812 834 select SYS_FSL_ERRATUM_A007075 835 select SYS_FSL_ERRATUM_CPC_A002 836 select SYS_FSL_ERRATUM_CPC_A003 837 select SYS_FSL_ERRATUM_CPU_A003999 838 select SYS_FSL_ERRATUM_DDR_A003 839 select SYS_FSL_ERRATUM_DDR_A003474 840 select SYS_FSL_ERRATUM_ELBC_A001 841 select SYS_FSL_ERRATUM_ESDHC111 842 select SYS_FSL_ERRATUM_ESDHC13 843 select SYS_FSL_ERRATUM_ESDHC135 844 select SYS_FSL_ERRATUM_I2C_A004447 845 select SYS_FSL_ERRATUM_NMG_CPU_A011 846 select SYS_FSL_ERRATUM_SRIO_A004034 847 select SYS_P4080_ERRATUM_CPU22 848 select SYS_P4080_ERRATUM_PCIE_A003 849 select SYS_P4080_ERRATUM_SERDES8 850 select SYS_P4080_ERRATUM_SERDES9 851 select SYS_P4080_ERRATUM_SERDES_A001 852 select SYS_P4080_ERRATUM_SERDES_A005 853 select SYS_FSL_HAS_DDR3 854 select SYS_FSL_HAS_SEC 855 select SYS_FSL_QORIQ_CHASSIS1 856 select SYS_FSL_SEC_BE 857 select SYS_FSL_SEC_COMPAT_4 858 select FSL_ELBC 859 imply CMD_SATA 860 imply CMD_REGINFO 861 862config ARCH_P5020 863 bool 864 select E500MC 865 select FSL_LAW 866 select SYS_FSL_DDR_VER_44 867 select SYS_FSL_ERRATUM_A004510 868 select SYS_FSL_ERRATUM_A006261 869 select SYS_FSL_ERRATUM_DDR_A003 870 select SYS_FSL_ERRATUM_DDR_A003474 871 select SYS_FSL_ERRATUM_ESDHC111 872 select SYS_FSL_ERRATUM_I2C_A004447 873 select SYS_FSL_ERRATUM_SRIO_A004034 874 select SYS_FSL_ERRATUM_USB14 875 select SYS_FSL_HAS_DDR3 876 select SYS_FSL_HAS_SEC 877 select SYS_FSL_QORIQ_CHASSIS1 878 select SYS_FSL_SEC_BE 879 select SYS_FSL_SEC_COMPAT_4 880 select SYS_PPC64 881 select FSL_ELBC 882 imply CMD_SATA 883 imply CMD_REGINFO 884 885config ARCH_P5040 886 bool 887 select E500MC 888 select FSL_LAW 889 select SYS_FSL_DDR_VER_44 890 select SYS_FSL_ERRATUM_A004510 891 select SYS_FSL_ERRATUM_A004699 892 select SYS_FSL_ERRATUM_A005812 893 select SYS_FSL_ERRATUM_A006261 894 select SYS_FSL_ERRATUM_DDR_A003 895 select SYS_FSL_ERRATUM_DDR_A003474 896 select SYS_FSL_ERRATUM_ESDHC111 897 select SYS_FSL_ERRATUM_USB14 898 select SYS_FSL_HAS_DDR3 899 select SYS_FSL_HAS_SEC 900 select SYS_FSL_QORIQ_CHASSIS1 901 select SYS_FSL_SEC_BE 902 select SYS_FSL_SEC_COMPAT_4 903 select SYS_PPC64 904 select FSL_ELBC 905 imply CMD_SATA 906 imply CMD_REGINFO 907 908config ARCH_QEMU_E500 909 bool 910 911config ARCH_T1023 912 bool 913 select E500MC 914 select FSL_LAW 915 select SYS_FSL_DDR_VER_50 916 select SYS_FSL_ERRATUM_A008378 917 select SYS_FSL_ERRATUM_A009663 918 select SYS_FSL_ERRATUM_A009942 919 select SYS_FSL_ERRATUM_ESDHC111 920 select SYS_FSL_HAS_DDR3 921 select SYS_FSL_HAS_DDR4 922 select SYS_FSL_HAS_SEC 923 select SYS_FSL_QORIQ_CHASSIS2 924 select SYS_FSL_SEC_BE 925 select SYS_FSL_SEC_COMPAT_5 926 select FSL_IFC 927 imply CMD_EEPROM 928 imply CMD_NAND 929 imply CMD_REGINFO 930 931config ARCH_T1024 932 bool 933 select E500MC 934 select FSL_LAW 935 select SYS_FSL_DDR_VER_50 936 select SYS_FSL_ERRATUM_A008378 937 select SYS_FSL_ERRATUM_A009663 938 select SYS_FSL_ERRATUM_A009942 939 select SYS_FSL_ERRATUM_ESDHC111 940 select SYS_FSL_HAS_DDR3 941 select SYS_FSL_HAS_DDR4 942 select SYS_FSL_HAS_SEC 943 select SYS_FSL_QORIQ_CHASSIS2 944 select SYS_FSL_SEC_BE 945 select SYS_FSL_SEC_COMPAT_5 946 select FSL_IFC 947 imply CMD_EEPROM 948 imply CMD_NAND 949 imply CMD_MTDPARTS 950 imply CMD_REGINFO 951 952config ARCH_T1040 953 bool 954 select E500MC 955 select FSL_LAW 956 select SYS_FSL_DDR_VER_50 957 select SYS_FSL_ERRATUM_A008044 958 select SYS_FSL_ERRATUM_A008378 959 select SYS_FSL_ERRATUM_A009663 960 select SYS_FSL_ERRATUM_A009942 961 select SYS_FSL_ERRATUM_ESDHC111 962 select SYS_FSL_HAS_DDR3 963 select SYS_FSL_HAS_DDR4 964 select SYS_FSL_HAS_SEC 965 select SYS_FSL_QORIQ_CHASSIS2 966 select SYS_FSL_SEC_BE 967 select SYS_FSL_SEC_COMPAT_5 968 select FSL_IFC 969 imply CMD_MTDPARTS 970 imply CMD_NAND 971 imply CMD_SATA 972 imply CMD_REGINFO 973 974config ARCH_T1042 975 bool 976 select E500MC 977 select FSL_LAW 978 select SYS_FSL_DDR_VER_50 979 select SYS_FSL_ERRATUM_A008044 980 select SYS_FSL_ERRATUM_A008378 981 select SYS_FSL_ERRATUM_A009663 982 select SYS_FSL_ERRATUM_A009942 983 select SYS_FSL_ERRATUM_ESDHC111 984 select SYS_FSL_HAS_DDR3 985 select SYS_FSL_HAS_DDR4 986 select SYS_FSL_HAS_SEC 987 select SYS_FSL_QORIQ_CHASSIS2 988 select SYS_FSL_SEC_BE 989 select SYS_FSL_SEC_COMPAT_5 990 select FSL_IFC 991 imply CMD_MTDPARTS 992 imply CMD_NAND 993 imply CMD_SATA 994 imply CMD_REGINFO 995 996config ARCH_T2080 997 bool 998 select E500MC 999 select E6500 1000 select FSL_LAW 1001 select SYS_FSL_DDR_VER_47 1002 select SYS_FSL_ERRATUM_A006379 1003 select SYS_FSL_ERRATUM_A006593 1004 select SYS_FSL_ERRATUM_A007186 1005 select SYS_FSL_ERRATUM_A007212 1006 select SYS_FSL_ERRATUM_A007815 1007 select SYS_FSL_ERRATUM_A007907 1008 select SYS_FSL_ERRATUM_A009942 1009 select SYS_FSL_ERRATUM_ESDHC111 1010 select SYS_FSL_HAS_DDR3 1011 select SYS_FSL_HAS_SEC 1012 select SYS_FSL_QORIQ_CHASSIS2 1013 select SYS_FSL_SEC_BE 1014 select SYS_FSL_SEC_COMPAT_4 1015 select SYS_PPC64 1016 select FSL_IFC 1017 imply CMD_SATA 1018 imply CMD_NAND 1019 imply CMD_REGINFO 1020 1021config ARCH_T2081 1022 bool 1023 select E500MC 1024 select E6500 1025 select FSL_LAW 1026 select SYS_FSL_DDR_VER_47 1027 select SYS_FSL_ERRATUM_A006379 1028 select SYS_FSL_ERRATUM_A006593 1029 select SYS_FSL_ERRATUM_A007186 1030 select SYS_FSL_ERRATUM_A007212 1031 select SYS_FSL_ERRATUM_A009942 1032 select SYS_FSL_ERRATUM_ESDHC111 1033 select SYS_FSL_HAS_DDR3 1034 select SYS_FSL_HAS_SEC 1035 select SYS_FSL_QORIQ_CHASSIS2 1036 select SYS_FSL_SEC_BE 1037 select SYS_FSL_SEC_COMPAT_4 1038 select SYS_PPC64 1039 select FSL_IFC 1040 imply CMD_NAND 1041 imply CMD_REGINFO 1042 1043config ARCH_T4160 1044 bool 1045 select E500MC 1046 select E6500 1047 select FSL_LAW 1048 select SYS_FSL_DDR_VER_47 1049 select SYS_FSL_ERRATUM_A004468 1050 select SYS_FSL_ERRATUM_A005871 1051 select SYS_FSL_ERRATUM_A006379 1052 select SYS_FSL_ERRATUM_A006593 1053 select SYS_FSL_ERRATUM_A007186 1054 select SYS_FSL_ERRATUM_A007798 1055 select SYS_FSL_ERRATUM_A009942 1056 select SYS_FSL_HAS_DDR3 1057 select SYS_FSL_HAS_SEC 1058 select SYS_FSL_QORIQ_CHASSIS2 1059 select SYS_FSL_SEC_BE 1060 select SYS_FSL_SEC_COMPAT_4 1061 select SYS_PPC64 1062 select FSL_IFC 1063 imply CMD_SATA 1064 imply CMD_NAND 1065 imply CMD_REGINFO 1066 1067config ARCH_T4240 1068 bool 1069 select E500MC 1070 select E6500 1071 select FSL_LAW 1072 select SYS_FSL_DDR_VER_47 1073 select SYS_FSL_ERRATUM_A004468 1074 select SYS_FSL_ERRATUM_A005871 1075 select SYS_FSL_ERRATUM_A006261 1076 select SYS_FSL_ERRATUM_A006379 1077 select SYS_FSL_ERRATUM_A006593 1078 select SYS_FSL_ERRATUM_A007186 1079 select SYS_FSL_ERRATUM_A007798 1080 select SYS_FSL_ERRATUM_A007815 1081 select SYS_FSL_ERRATUM_A007907 1082 select SYS_FSL_ERRATUM_A009942 1083 select SYS_FSL_HAS_DDR3 1084 select SYS_FSL_HAS_SEC 1085 select SYS_FSL_QORIQ_CHASSIS2 1086 select SYS_FSL_SEC_BE 1087 select SYS_FSL_SEC_COMPAT_4 1088 select SYS_PPC64 1089 select FSL_IFC 1090 imply CMD_SATA 1091 imply CMD_NAND 1092 imply CMD_REGINFO 1093 1094config BOOKE 1095 bool 1096 default y 1097 1098config E500 1099 bool 1100 default y 1101 help 1102 Enable PowerPC E500 cores, including e500v1, e500v2, e500mc 1103 1104config E500MC 1105 bool 1106 imply CMD_PCI 1107 help 1108 Enble PowerPC E500MC core 1109 1110config E6500 1111 bool 1112 help 1113 Enable PowerPC E6500 core 1114 1115config FSL_LAW 1116 bool 1117 help 1118 Use Freescale common code for Local Access Window 1119 1120config SECURE_BOOT 1121 bool "Secure Boot" 1122 help 1123 Enable Freescale Secure Boot feature. Normally selected 1124 by defconfig. If unsure, do not change. 1125 1126config MAX_CPUS 1127 int "Maximum number of CPUs permitted for MPC85xx" 1128 default 12 if ARCH_T4240 1129 default 8 if ARCH_P4080 || \ 1130 ARCH_T4160 1131 default 4 if ARCH_B4860 || \ 1132 ARCH_P2041 || \ 1133 ARCH_P3041 || \ 1134 ARCH_P5040 || \ 1135 ARCH_T1040 || \ 1136 ARCH_T1042 || \ 1137 ARCH_T2080 || \ 1138 ARCH_T2081 1139 default 2 if ARCH_B4420 || \ 1140 ARCH_BSC9132 || \ 1141 ARCH_MPC8572 || \ 1142 ARCH_P1020 || \ 1143 ARCH_P1021 || \ 1144 ARCH_P1022 || \ 1145 ARCH_P1023 || \ 1146 ARCH_P1024 || \ 1147 ARCH_P1025 || \ 1148 ARCH_P2020 || \ 1149 ARCH_P5020 || \ 1150 ARCH_T1023 || \ 1151 ARCH_T1024 1152 default 1 1153 help 1154 Set this number to the maximum number of possible CPUs in the SoC. 1155 SoCs may have multiple clusters with each cluster may have multiple 1156 ports. If some ports are reserved but higher ports are used for 1157 cores, count the reserved ports. This will allocate enough memory 1158 in spin table to properly handle all cores. 1159 1160config SYS_CCSRBAR_DEFAULT 1161 hex "Default CCSRBAR address" 1162 default 0xff700000 if ARCH_BSC9131 || \ 1163 ARCH_BSC9132 || \ 1164 ARCH_C29X || \ 1165 ARCH_MPC8536 || \ 1166 ARCH_MPC8540 || \ 1167 ARCH_MPC8541 || \ 1168 ARCH_MPC8544 || \ 1169 ARCH_MPC8548 || \ 1170 ARCH_MPC8555 || \ 1171 ARCH_MPC8560 || \ 1172 ARCH_MPC8568 || \ 1173 ARCH_MPC8569 || \ 1174 ARCH_MPC8572 || \ 1175 ARCH_P1010 || \ 1176 ARCH_P1011 || \ 1177 ARCH_P1020 || \ 1178 ARCH_P1021 || \ 1179 ARCH_P1022 || \ 1180 ARCH_P1024 || \ 1181 ARCH_P1025 || \ 1182 ARCH_P2020 1183 default 0xff600000 if ARCH_P1023 1184 default 0xfe000000 if ARCH_B4420 || \ 1185 ARCH_B4860 || \ 1186 ARCH_P2041 || \ 1187 ARCH_P3041 || \ 1188 ARCH_P4080 || \ 1189 ARCH_P5020 || \ 1190 ARCH_P5040 || \ 1191 ARCH_T1023 || \ 1192 ARCH_T1024 || \ 1193 ARCH_T1040 || \ 1194 ARCH_T1042 || \ 1195 ARCH_T2080 || \ 1196 ARCH_T2081 || \ 1197 ARCH_T4160 || \ 1198 ARCH_T4240 1199 default 0xe0000000 if ARCH_QEMU_E500 1200 help 1201 Default value of CCSRBAR comes from power-on-reset. It 1202 is fixed on each SoC. Some SoCs can have different value 1203 if changed by pre-boot regime. The value here must match 1204 the current value in SoC. If not sure, do not change. 1205 1206config SYS_FSL_ERRATUM_A004468 1207 bool 1208 1209config SYS_FSL_ERRATUM_A004477 1210 bool 1211 1212config SYS_FSL_ERRATUM_A004508 1213 bool 1214 1215config SYS_FSL_ERRATUM_A004580 1216 bool 1217 1218config SYS_FSL_ERRATUM_A004699 1219 bool 1220 1221config SYS_FSL_ERRATUM_A004849 1222 bool 1223 1224config SYS_FSL_ERRATUM_A004510 1225 bool 1226 1227config SYS_FSL_ERRATUM_A004510_SVR_REV 1228 hex 1229 depends on SYS_FSL_ERRATUM_A004510 1230 default 0x20 if ARCH_P4080 1231 default 0x10 1232 1233config SYS_FSL_ERRATUM_A004510_SVR_REV2 1234 hex 1235 depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041)) 1236 default 0x11 1237 1238config SYS_FSL_ERRATUM_A005125 1239 bool 1240 1241config SYS_FSL_ERRATUM_A005434 1242 bool 1243 1244config SYS_FSL_ERRATUM_A005812 1245 bool 1246 1247config SYS_FSL_ERRATUM_A005871 1248 bool 1249 1250config SYS_FSL_ERRATUM_A006261 1251 bool 1252 1253config SYS_FSL_ERRATUM_A006379 1254 bool 1255 1256config SYS_FSL_ERRATUM_A006384 1257 bool 1258 1259config SYS_FSL_ERRATUM_A006475 1260 bool 1261 1262config SYS_FSL_ERRATUM_A006593 1263 bool 1264 1265config SYS_FSL_ERRATUM_A007075 1266 bool 1267 1268config SYS_FSL_ERRATUM_A007186 1269 bool 1270 1271config SYS_FSL_ERRATUM_A007212 1272 bool 1273 1274config SYS_FSL_ERRATUM_A007815 1275 bool 1276 1277config SYS_FSL_ERRATUM_A007798 1278 bool 1279 1280config SYS_FSL_ERRATUM_A007907 1281 bool 1282 1283config SYS_FSL_ERRATUM_A008044 1284 bool 1285 1286config SYS_FSL_ERRATUM_CPC_A002 1287 bool 1288 1289config SYS_FSL_ERRATUM_CPC_A003 1290 bool 1291 1292config SYS_FSL_ERRATUM_CPU_A003999 1293 bool 1294 1295config SYS_FSL_ERRATUM_ELBC_A001 1296 bool 1297 1298config SYS_FSL_ERRATUM_I2C_A004447 1299 bool 1300 1301config SYS_FSL_A004447_SVR_REV 1302 hex 1303 depends on SYS_FSL_ERRATUM_I2C_A004447 1304 default 0x00 if ARCH_MPC8548 1305 default 0x10 if ARCH_P1010 1306 default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132 1307 default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020 1308 1309config SYS_FSL_ERRATUM_IFC_A002769 1310 bool 1311 1312config SYS_FSL_ERRATUM_IFC_A003399 1313 bool 1314 1315config SYS_FSL_ERRATUM_NMG_CPU_A011 1316 bool 1317 1318config SYS_FSL_ERRATUM_NMG_ETSEC129 1319 bool 1320 1321config SYS_FSL_ERRATUM_NMG_LBC103 1322 bool 1323 1324config SYS_FSL_ERRATUM_P1010_A003549 1325 bool 1326 1327config SYS_FSL_ERRATUM_SATA_A001 1328 bool 1329 1330config SYS_FSL_ERRATUM_SEC_A003571 1331 bool 1332 1333config SYS_FSL_ERRATUM_SRIO_A004034 1334 bool 1335 1336config SYS_FSL_ERRATUM_USB14 1337 bool 1338 1339config SYS_P4080_ERRATUM_CPU22 1340 bool 1341 1342config SYS_P4080_ERRATUM_PCIE_A003 1343 bool 1344 1345config SYS_P4080_ERRATUM_SERDES8 1346 bool 1347 1348config SYS_P4080_ERRATUM_SERDES9 1349 bool 1350 1351config SYS_P4080_ERRATUM_SERDES_A001 1352 bool 1353 1354config SYS_P4080_ERRATUM_SERDES_A005 1355 bool 1356 1357config SYS_FSL_QORIQ_CHASSIS1 1358 bool 1359 1360config SYS_FSL_QORIQ_CHASSIS2 1361 bool 1362 1363config SYS_FSL_NUM_LAWS 1364 int "Number of local access windows" 1365 depends on FSL_LAW 1366 default 32 if ARCH_B4420 || \ 1367 ARCH_B4860 || \ 1368 ARCH_P2041 || \ 1369 ARCH_P3041 || \ 1370 ARCH_P4080 || \ 1371 ARCH_P5020 || \ 1372 ARCH_P5040 || \ 1373 ARCH_T2080 || \ 1374 ARCH_T2081 || \ 1375 ARCH_T4160 || \ 1376 ARCH_T4240 1377 default 16 if ARCH_T1023 || \ 1378 ARCH_T1024 || \ 1379 ARCH_T1040 || \ 1380 ARCH_T1042 1381 default 12 if ARCH_BSC9131 || \ 1382 ARCH_BSC9132 || \ 1383 ARCH_C29X || \ 1384 ARCH_MPC8536 || \ 1385 ARCH_MPC8572 || \ 1386 ARCH_P1010 || \ 1387 ARCH_P1011 || \ 1388 ARCH_P1020 || \ 1389 ARCH_P1021 || \ 1390 ARCH_P1022 || \ 1391 ARCH_P1023 || \ 1392 ARCH_P1024 || \ 1393 ARCH_P1025 || \ 1394 ARCH_P2020 1395 default 10 if ARCH_MPC8544 || \ 1396 ARCH_MPC8548 || \ 1397 ARCH_MPC8568 || \ 1398 ARCH_MPC8569 1399 default 8 if ARCH_MPC8540 || \ 1400 ARCH_MPC8541 || \ 1401 ARCH_MPC8555 || \ 1402 ARCH_MPC8560 1403 help 1404 Number of local access windows. This is fixed per SoC. 1405 If not sure, do not change. 1406 1407config SYS_FSL_THREADS_PER_CORE 1408 int 1409 default 2 if E6500 1410 default 1 1411 1412config SYS_NUM_TLBCAMS 1413 int "Number of TLB CAM entries" 1414 default 64 if E500MC 1415 default 16 1416 help 1417 Number of TLB CAM entries for Book-E chips. 64 for E500MC, 1418 16 for other E500 SoCs. 1419 1420config SYS_PPC64 1421 bool 1422 1423config SYS_PPC_E500_USE_DEBUG_TLB 1424 bool 1425 1426config FSL_IFC 1427 bool 1428 1429config FSL_ELBC 1430 bool 1431 1432config SYS_PPC_E500_DEBUG_TLB 1433 int "Temporary TLB entry for external debugger" 1434 depends on SYS_PPC_E500_USE_DEBUG_TLB 1435 default 0 if ARCH_MPC8544 || ARCH_MPC8548 1436 default 1 if ARCH_MPC8536 1437 default 2 if ARCH_MPC8572 || \ 1438 ARCH_P1011 || \ 1439 ARCH_P1020 || \ 1440 ARCH_P1021 || \ 1441 ARCH_P1022 || \ 1442 ARCH_P1024 || \ 1443 ARCH_P1025 || \ 1444 ARCH_P2020 1445 default 3 if ARCH_P1010 || \ 1446 ARCH_BSC9132 || \ 1447 ARCH_C29X 1448 help 1449 Select a temporary TLB entry to be used during boot to work 1450 around limitations in e500v1 and e500v2 external debugger 1451 support. This reduces the portions of the boot code where 1452 breakpoints and single stepping do not work. The value of this 1453 symbol should be set to the TLB1 entry to be used for this 1454 purpose. If unsure, do not change. 1455 1456config SYS_FSL_IFC_CLK_DIV 1457 int "Divider of platform clock" 1458 depends on FSL_IFC 1459 default 2 if ARCH_B4420 || \ 1460 ARCH_B4860 || \ 1461 ARCH_T1024 || \ 1462 ARCH_T1023 || \ 1463 ARCH_T1040 || \ 1464 ARCH_T1042 || \ 1465 ARCH_T4160 || \ 1466 ARCH_T4240 1467 default 1 1468 help 1469 Defines divider of platform clock(clock input to 1470 IFC controller). 1471 1472config SYS_FSL_LBC_CLK_DIV 1473 int "Divider of platform clock" 1474 depends on FSL_ELBC || ARCH_MPC8540 || \ 1475 ARCH_MPC8548 || ARCH_MPC8541 || \ 1476 ARCH_MPC8555 || ARCH_MPC8560 || \ 1477 ARCH_MPC8568 1478 1479 default 2 if ARCH_P2041 || \ 1480 ARCH_P3041 || \ 1481 ARCH_P4080 || \ 1482 ARCH_P5020 || \ 1483 ARCH_P5040 1484 default 1 1485 1486 help 1487 Defines divider of platform clock(clock input to 1488 eLBC controller). 1489 1490source "board/freescale/b4860qds/Kconfig" 1491source "board/freescale/bsc9131rdb/Kconfig" 1492source "board/freescale/bsc9132qds/Kconfig" 1493source "board/freescale/c29xpcie/Kconfig" 1494source "board/freescale/corenet_ds/Kconfig" 1495source "board/freescale/mpc8536ds/Kconfig" 1496source "board/freescale/mpc8541cds/Kconfig" 1497source "board/freescale/mpc8544ds/Kconfig" 1498source "board/freescale/mpc8548cds/Kconfig" 1499source "board/freescale/mpc8555cds/Kconfig" 1500source "board/freescale/mpc8568mds/Kconfig" 1501source "board/freescale/mpc8569mds/Kconfig" 1502source "board/freescale/mpc8572ds/Kconfig" 1503source "board/freescale/p1010rdb/Kconfig" 1504source "board/freescale/p1022ds/Kconfig" 1505source "board/freescale/p1023rdb/Kconfig" 1506source "board/freescale/p1_p2_rdb_pc/Kconfig" 1507source "board/freescale/p1_twr/Kconfig" 1508source "board/freescale/p2041rdb/Kconfig" 1509source "board/freescale/qemu-ppce500/Kconfig" 1510source "board/freescale/t102xqds/Kconfig" 1511source "board/freescale/t102xrdb/Kconfig" 1512source "board/freescale/t1040qds/Kconfig" 1513source "board/freescale/t104xrdb/Kconfig" 1514source "board/freescale/t208xqds/Kconfig" 1515source "board/freescale/t208xrdb/Kconfig" 1516source "board/freescale/t4qds/Kconfig" 1517source "board/freescale/t4rdb/Kconfig" 1518source "board/gdsys/p1022/Kconfig" 1519source "board/keymile/kmp204x/Kconfig" 1520source "board/sbc8548/Kconfig" 1521source "board/socrates/Kconfig" 1522source "board/varisys/cyrus/Kconfig" 1523source "board/xes/xpedite520x/Kconfig" 1524source "board/xes/xpedite537x/Kconfig" 1525source "board/xes/xpedite550x/Kconfig" 1526source "board/Arcturus/ucp1020/Kconfig" 1527 1528endmenu 1529