xref: /openbmc/u-boot/arch/powerpc/cpu/mpc83xx/law.c (revision 274bced8)
1 /*
2  * Copyright 2011 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0
5  */
6 
7 #include <common.h>
8 #include <asm/fsl_law.h>
9 #include <asm/mmu.h>
10 #include <linux/log2.h>
11 
12 int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
13 {
14 	immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
15 	law83xx_t *ecm = &immap->sysconf.ddrlaw[0];
16 	u64 start_align, law_sz;
17 	int law_sz_enc;
18 
19 	if (start == 0)
20 		start_align = 1ull << (LAW_SIZE_2G + 1);
21 	else
22 		start_align = 1ull << (__ffs64(start));
23 	law_sz = min(start_align, sz);
24 	law_sz_enc = __ilog2_u64(law_sz) - 1;
25 
26 	/*
27 	 * Set up LAWBAR for all of DDR.
28 	 */
29 	ecm->bar = start & 0xfffff000;
30 	ecm->ar  = (LAWAR_EN | (id << 20) | (LAWAR_SIZE & law_sz_enc));
31 	debug("DDR:bar=0x%08x\n", ecm->bar);
32 	debug("DDR:ar=0x%08x\n", ecm->ar);
33 
34 	/* recalculate size based on what was actually covered by the law */
35 	law_sz = 1ull << __ilog2_u64(law_sz);
36 
37 	/* do we still have anything to map */
38 	sz = sz - law_sz;
39 	if (sz) {
40 		start += law_sz;
41 
42 		start_align = 1ull << (__ffs64(start));
43 		law_sz = min(start_align, sz);
44 		law_sz_enc = __ilog2_u64(law_sz) - 1;
45 		ecm = &immap->sysconf.ddrlaw[1];
46 		ecm->bar = start & 0xfffff000;
47 		ecm->ar  = (LAWAR_EN | (id << 20) | (LAWAR_SIZE & law_sz_enc));
48 		debug("DDR:bar=0x%08x\n", ecm->bar);
49 		debug("DDR:ar=0x%08x\n", ecm->ar);
50 	} else {
51 		return 0;
52 	}
53 
54 	/* do we still have anything to map */
55 	sz = sz - law_sz;
56 	if (sz)
57 		return 1;
58 
59 	return 0;
60 }
61