1 /* 2 * Copyright (C) 2007 Freescale Semiconductor, Inc. 3 * 4 * Dave Liu <daveliu@freescale.com> 5 * based on the contribution of Marian Balakowicz <m8@semihalf.com> 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 */ 15 16 #include <common.h> 17 #include <mpc83xx.h> 18 #include <command.h> 19 20 #if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) 21 void ecc_print_status(void) 22 { 23 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 24 volatile ddr83xx_t *ddr = &immap->ddr; 25 26 printf("\nECC mode: %s\n\n", 27 (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF"); 28 29 /* Interrupts */ 30 printf("Memory Error Interrupt Enable:\n"); 31 printf(" Multiple-Bit Error Interrupt Enable: %d\n", 32 (ddr->err_int_en & ECC_ERR_INT_EN_MBEE) ? 1 : 0); 33 printf(" Single-Bit Error Interrupt Enable: %d\n", 34 (ddr->err_int_en & ECC_ERR_INT_EN_SBEE) ? 1 : 0); 35 printf(" Memory Select Error Interrupt Enable: %d\n\n", 36 (ddr->err_int_en & ECC_ERR_INT_EN_MSEE) ? 1 : 0); 37 38 /* Error disable */ 39 printf("Memory Error Disable:\n"); 40 printf(" Multiple-Bit Error Disable: %d\n", 41 (ddr->err_disable & ECC_ERROR_DISABLE_MBED) ? 1 : 0); 42 printf(" Sinle-Bit Error Disable: %d\n", 43 (ddr->err_disable & ECC_ERROR_DISABLE_SBED) ? 1 : 0); 44 printf(" Memory Select Error Disable: %d\n\n", 45 (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0); 46 47 /* Error injection */ 48 printf("Memory Data Path Error Injection Mask High/Low: %08x %08x\n", 49 ddr->data_err_inject_hi, ddr->data_err_inject_lo); 50 51 printf("Memory Data Path Error Injection Mask ECC:\n"); 52 printf(" ECC Mirror Byte: %d\n", 53 (ddr->ecc_err_inject & ECC_ERR_INJECT_EMB) ? 1 : 0); 54 printf(" ECC Injection Enable: %d\n", 55 (ddr->ecc_err_inject & ECC_ERR_INJECT_EIEN) ? 1 : 0); 56 printf(" ECC Error Injection Mask: 0x%02x\n\n", 57 ddr->ecc_err_inject & ECC_ERR_INJECT_EEIM); 58 59 /* SBE counter/threshold */ 60 printf("Memory Single-Bit Error Management (0..255):\n"); 61 printf(" Single-Bit Error Threshold: %d\n", 62 (ddr->err_sbe & ECC_ERROR_MAN_SBET) >> ECC_ERROR_MAN_SBET_SHIFT); 63 printf(" Single-Bit Error Counter: %d\n\n", 64 (ddr->err_sbe & ECC_ERROR_MAN_SBEC) >> ECC_ERROR_MAN_SBEC_SHIFT); 65 66 /* Error detect */ 67 printf("Memory Error Detect:\n"); 68 printf(" Multiple Memory Errors: %d\n", 69 (ddr->err_detect & ECC_ERROR_DETECT_MME) ? 1 : 0); 70 printf(" Multiple-Bit Error: %d\n", 71 (ddr->err_detect & ECC_ERROR_DETECT_MBE) ? 1 : 0); 72 printf(" Single-Bit Error: %d\n", 73 (ddr->err_detect & ECC_ERROR_DETECT_SBE) ? 1 : 0); 74 printf(" Memory Select Error: %d\n\n", 75 (ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0); 76 77 /* Capture data */ 78 printf("Memory Error Address Capture: 0x%08x\n", ddr->capture_address); 79 printf("Memory Data Path Read Capture High/Low: %08x %08x\n", 80 ddr->capture_data_hi, ddr->capture_data_lo); 81 printf("Memory Data Path Read Capture ECC: 0x%02x\n\n", 82 ddr->capture_ecc & CAPTURE_ECC_ECE); 83 84 printf("Memory Error Attributes Capture:\n"); 85 printf(" Data Beat Number: %d\n", 86 (ddr->capture_attributes & ECC_CAPT_ATTR_BNUM) >> 87 ECC_CAPT_ATTR_BNUM_SHIFT); 88 printf(" Transaction Size: %d\n", 89 (ddr->capture_attributes & ECC_CAPT_ATTR_TSIZ) >> 90 ECC_CAPT_ATTR_TSIZ_SHIFT); 91 printf(" Transaction Source: %d\n", 92 (ddr->capture_attributes & ECC_CAPT_ATTR_TSRC) >> 93 ECC_CAPT_ATTR_TSRC_SHIFT); 94 printf(" Transaction Type: %d\n", 95 (ddr->capture_attributes & ECC_CAPT_ATTR_TTYP) >> 96 ECC_CAPT_ATTR_TTYP_SHIFT); 97 printf(" Error Information Valid: %d\n\n", 98 ddr->capture_attributes & ECC_CAPT_ATTR_VLD); 99 } 100 101 int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 102 { 103 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 104 volatile ddr83xx_t *ddr = &immap->ddr; 105 volatile u32 val; 106 u64 *addr; 107 u32 count; 108 register u64 *i; 109 u32 ret[2]; 110 u32 pattern[2]; 111 u32 writeback[2]; 112 113 /* The pattern is written into memory to generate error */ 114 pattern[0] = 0xfedcba98UL; 115 pattern[1] = 0x76543210UL; 116 117 /* After injecting error, re-initialize the memory with the value */ 118 writeback[0] = 0x01234567UL; 119 writeback[1] = 0x89abcdefUL; 120 121 if (argc > 4) 122 return cmd_usage(cmdtp); 123 124 if (argc == 2) { 125 if (strcmp(argv[1], "status") == 0) { 126 ecc_print_status(); 127 return 0; 128 } else if (strcmp(argv[1], "captureclear") == 0) { 129 ddr->capture_address = 0; 130 ddr->capture_data_hi = 0; 131 ddr->capture_data_lo = 0; 132 ddr->capture_ecc = 0; 133 ddr->capture_attributes = 0; 134 return 0; 135 } 136 } 137 if (argc == 3) { 138 if (strcmp(argv[1], "sbecnt") == 0) { 139 val = simple_strtoul(argv[2], NULL, 10); 140 if (val > 255) { 141 printf("Incorrect Counter value, " 142 "should be 0..255\n"); 143 return 1; 144 } 145 146 val = (val << ECC_ERROR_MAN_SBEC_SHIFT); 147 val |= (ddr->err_sbe & ECC_ERROR_MAN_SBET); 148 149 ddr->err_sbe = val; 150 return 0; 151 } else if (strcmp(argv[1], "sbethr") == 0) { 152 val = simple_strtoul(argv[2], NULL, 10); 153 if (val > 255) { 154 printf("Incorrect Counter value, " 155 "should be 0..255\n"); 156 return 1; 157 } 158 159 val = (val << ECC_ERROR_MAN_SBET_SHIFT); 160 val |= (ddr->err_sbe & ECC_ERROR_MAN_SBEC); 161 162 ddr->err_sbe = val; 163 return 0; 164 } else if (strcmp(argv[1], "errdisable") == 0) { 165 val = ddr->err_disable; 166 167 if (strcmp(argv[2], "+sbe") == 0) { 168 val |= ECC_ERROR_DISABLE_SBED; 169 } else if (strcmp(argv[2], "+mbe") == 0) { 170 val |= ECC_ERROR_DISABLE_MBED; 171 } else if (strcmp(argv[2], "+mse") == 0) { 172 val |= ECC_ERROR_DISABLE_MSED; 173 } else if (strcmp(argv[2], "+all") == 0) { 174 val |= (ECC_ERROR_DISABLE_SBED | 175 ECC_ERROR_DISABLE_MBED | 176 ECC_ERROR_DISABLE_MSED); 177 } else if (strcmp(argv[2], "-sbe") == 0) { 178 val &= ~ECC_ERROR_DISABLE_SBED; 179 } else if (strcmp(argv[2], "-mbe") == 0) { 180 val &= ~ECC_ERROR_DISABLE_MBED; 181 } else if (strcmp(argv[2], "-mse") == 0) { 182 val &= ~ECC_ERROR_DISABLE_MSED; 183 } else if (strcmp(argv[2], "-all") == 0) { 184 val &= ~(ECC_ERROR_DISABLE_SBED | 185 ECC_ERROR_DISABLE_MBED | 186 ECC_ERROR_DISABLE_MSED); 187 } else { 188 printf("Incorrect err_disable field\n"); 189 return 1; 190 } 191 192 ddr->err_disable = val; 193 __asm__ __volatile__("sync"); 194 __asm__ __volatile__("isync"); 195 return 0; 196 } else if (strcmp(argv[1], "errdetectclr") == 0) { 197 val = ddr->err_detect; 198 199 if (strcmp(argv[2], "mme") == 0) { 200 val |= ECC_ERROR_DETECT_MME; 201 } else if (strcmp(argv[2], "sbe") == 0) { 202 val |= ECC_ERROR_DETECT_SBE; 203 } else if (strcmp(argv[2], "mbe") == 0) { 204 val |= ECC_ERROR_DETECT_MBE; 205 } else if (strcmp(argv[2], "mse") == 0) { 206 val |= ECC_ERROR_DETECT_MSE; 207 } else if (strcmp(argv[2], "all") == 0) { 208 val |= (ECC_ERROR_DETECT_MME | 209 ECC_ERROR_DETECT_MBE | 210 ECC_ERROR_DETECT_SBE | 211 ECC_ERROR_DETECT_MSE); 212 } else { 213 printf("Incorrect err_detect field\n"); 214 return 1; 215 } 216 217 ddr->err_detect = val; 218 return 0; 219 } else if (strcmp(argv[1], "injectdatahi") == 0) { 220 val = simple_strtoul(argv[2], NULL, 16); 221 222 ddr->data_err_inject_hi = val; 223 return 0; 224 } else if (strcmp(argv[1], "injectdatalo") == 0) { 225 val = simple_strtoul(argv[2], NULL, 16); 226 227 ddr->data_err_inject_lo = val; 228 return 0; 229 } else if (strcmp(argv[1], "injectecc") == 0) { 230 val = simple_strtoul(argv[2], NULL, 16); 231 if (val > 0xff) { 232 printf("Incorrect ECC inject mask, " 233 "should be 0x00..0xff\n"); 234 return 1; 235 } 236 val |= (ddr->ecc_err_inject & ~ECC_ERR_INJECT_EEIM); 237 238 ddr->ecc_err_inject = val; 239 return 0; 240 } else if (strcmp(argv[1], "inject") == 0) { 241 val = ddr->ecc_err_inject; 242 243 if (strcmp(argv[2], "en") == 0) 244 val |= ECC_ERR_INJECT_EIEN; 245 else if (strcmp(argv[2], "dis") == 0) 246 val &= ~ECC_ERR_INJECT_EIEN; 247 else 248 printf("Incorrect command\n"); 249 250 ddr->ecc_err_inject = val; 251 __asm__ __volatile__("sync"); 252 __asm__ __volatile__("isync"); 253 return 0; 254 } else if (strcmp(argv[1], "mirror") == 0) { 255 val = ddr->ecc_err_inject; 256 257 if (strcmp(argv[2], "en") == 0) 258 val |= ECC_ERR_INJECT_EMB; 259 else if (strcmp(argv[2], "dis") == 0) 260 val &= ~ECC_ERR_INJECT_EMB; 261 else 262 printf("Incorrect command\n"); 263 264 ddr->ecc_err_inject = val; 265 return 0; 266 } 267 } 268 if (argc == 4) { 269 if (strcmp(argv[1], "testdw") == 0) { 270 addr = (u64 *) simple_strtoul(argv[2], NULL, 16); 271 count = simple_strtoul(argv[3], NULL, 16); 272 273 if ((u32) addr % 8) { 274 printf("Address not alligned on " 275 "double word boundary\n"); 276 return 1; 277 } 278 disable_interrupts(); 279 280 for (i = addr; i < addr + count; i++) { 281 282 /* enable injects */ 283 ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN; 284 __asm__ __volatile__("sync"); 285 __asm__ __volatile__("isync"); 286 287 /* write memory location injecting errors */ 288 ppcDWstore((u32 *) i, pattern); 289 __asm__ __volatile__("sync"); 290 291 /* disable injects */ 292 ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN; 293 __asm__ __volatile__("sync"); 294 __asm__ __volatile__("isync"); 295 296 /* read data, this generates ECC error */ 297 ppcDWload((u32 *) i, ret); 298 __asm__ __volatile__("sync"); 299 300 /* re-initialize memory, double word write the location again, 301 * generates new ECC code this time */ 302 ppcDWstore((u32 *) i, writeback); 303 __asm__ __volatile__("sync"); 304 } 305 enable_interrupts(); 306 return 0; 307 } 308 if (strcmp(argv[1], "testword") == 0) { 309 addr = (u64 *) simple_strtoul(argv[2], NULL, 16); 310 count = simple_strtoul(argv[3], NULL, 16); 311 312 if ((u32) addr % 8) { 313 printf("Address not alligned on " 314 "double word boundary\n"); 315 return 1; 316 } 317 disable_interrupts(); 318 319 for (i = addr; i < addr + count; i++) { 320 321 /* enable injects */ 322 ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN; 323 __asm__ __volatile__("sync"); 324 __asm__ __volatile__("isync"); 325 326 /* write memory location injecting errors */ 327 *(u32 *) i = 0xfedcba98UL; 328 __asm__ __volatile__("sync"); 329 330 /* sub double word write, 331 * bus will read-modify-write, 332 * generates ECC error */ 333 *((u32 *) i + 1) = 0x76543210UL; 334 __asm__ __volatile__("sync"); 335 336 /* disable injects */ 337 ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN; 338 __asm__ __volatile__("sync"); 339 __asm__ __volatile__("isync"); 340 341 /* re-initialize memory, 342 * double word write the location again, 343 * generates new ECC code this time */ 344 ppcDWstore((u32 *) i, writeback); 345 __asm__ __volatile__("sync"); 346 } 347 enable_interrupts(); 348 return 0; 349 } 350 } 351 return cmd_usage(cmdtp); 352 } 353 354 U_BOOT_CMD(ecc, 4, 0, do_ecc, 355 "support for DDR ECC features", 356 "status - print out status info\n" 357 "ecc captureclear - clear capture regs data\n" 358 "ecc sbecnt <val> - set Single-Bit Error counter\n" 359 "ecc sbethr <val> - set Single-Bit Threshold\n" 360 "ecc errdisable <flag> - clear/set disable Memory Error Disable, flag:\n" 361 " [-|+]sbe - Single-Bit Error\n" 362 " [-|+]mbe - Multiple-Bit Error\n" 363 " [-|+]mse - Memory Select Error\n" 364 " [-|+]all - all errors\n" 365 "ecc errdetectclr <flag> - clear Memory Error Detect, flag:\n" 366 " mme - Multiple Memory Errors\n" 367 " sbe - Single-Bit Error\n" 368 " mbe - Multiple-Bit Error\n" 369 " mse - Memory Select Error\n" 370 " all - all errors\n" 371 "ecc injectdatahi <hi> - set Memory Data Path Error Injection Mask High\n" 372 "ecc injectdatalo <lo> - set Memory Data Path Error Injection Mask Low\n" 373 "ecc injectecc <ecc> - set ECC Error Injection Mask\n" 374 "ecc inject <en|dis> - enable/disable error injection\n" 375 "ecc mirror <en|dis> - enable/disable mirror byte\n" 376 "ecc testdw <addr> <cnt> - test mem region with double word access:\n" 377 " - enables injects\n" 378 " - writes pattern injecting errors with double word access\n" 379 " - disables injects\n" 380 " - reads pattern back with double word access, generates error\n" 381 " - re-inits memory\n" 382 "ecc testword <addr> <cnt> - test mem region with word access:\n" 383 " - enables injects\n" 384 " - writes pattern injecting errors with word access\n" 385 " - writes pattern with word access, generates error\n" 386 " - disables injects\n" " - re-inits memory"); 387 #endif 388