1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+ 2a47a12beSStefan Roese /* 3d29d17d7SYork Sun * Copyright (C) 2007-2011 Freescale Semiconductor, Inc. 4a47a12beSStefan Roese * 5a47a12beSStefan Roese * Dave Liu <daveliu@freescale.com> 6a47a12beSStefan Roese * based on the contribution of Marian Balakowicz <m8@semihalf.com> 7a47a12beSStefan Roese */ 8a47a12beSStefan Roese 9a47a12beSStefan Roese #include <common.h> 10a47a12beSStefan Roese #include <mpc83xx.h> 11a47a12beSStefan Roese #include <command.h> 12a47a12beSStefan Roese 13a47a12beSStefan Roese #if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) 14a47a12beSStefan Roese void ecc_print_status(void) 15a47a12beSStefan Roese { 16d29d17d7SYork Sun immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 175614e71bSYork Sun #ifdef CONFIG_SYS_FSL_DDR2 189a17eb5bSYork Sun struct ccsr_ddr __iomem *ddr = &immap->ddr; 19d29d17d7SYork Sun #else 20d29d17d7SYork Sun ddr83xx_t *ddr = &immap->ddr; 21d29d17d7SYork Sun #endif 22a47a12beSStefan Roese 23a47a12beSStefan Roese printf("\nECC mode: %s\n\n", 24a47a12beSStefan Roese (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF"); 25a47a12beSStefan Roese 26a47a12beSStefan Roese /* Interrupts */ 27a47a12beSStefan Roese printf("Memory Error Interrupt Enable:\n"); 28a47a12beSStefan Roese printf(" Multiple-Bit Error Interrupt Enable: %d\n", 29a47a12beSStefan Roese (ddr->err_int_en & ECC_ERR_INT_EN_MBEE) ? 1 : 0); 30a47a12beSStefan Roese printf(" Single-Bit Error Interrupt Enable: %d\n", 31a47a12beSStefan Roese (ddr->err_int_en & ECC_ERR_INT_EN_SBEE) ? 1 : 0); 32a47a12beSStefan Roese printf(" Memory Select Error Interrupt Enable: %d\n\n", 33a47a12beSStefan Roese (ddr->err_int_en & ECC_ERR_INT_EN_MSEE) ? 1 : 0); 34a47a12beSStefan Roese 35a47a12beSStefan Roese /* Error disable */ 36a47a12beSStefan Roese printf("Memory Error Disable:\n"); 37a47a12beSStefan Roese printf(" Multiple-Bit Error Disable: %d\n", 38a47a12beSStefan Roese (ddr->err_disable & ECC_ERROR_DISABLE_MBED) ? 1 : 0); 39d7b4ca2bSRobert P. J. Day printf(" Single-Bit Error Disable: %d\n", 40a47a12beSStefan Roese (ddr->err_disable & ECC_ERROR_DISABLE_SBED) ? 1 : 0); 41a47a12beSStefan Roese printf(" Memory Select Error Disable: %d\n\n", 42a47a12beSStefan Roese (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0); 43a47a12beSStefan Roese 44a47a12beSStefan Roese /* Error injection */ 45a47a12beSStefan Roese printf("Memory Data Path Error Injection Mask High/Low: %08x %08x\n", 46a47a12beSStefan Roese ddr->data_err_inject_hi, ddr->data_err_inject_lo); 47a47a12beSStefan Roese 48a47a12beSStefan Roese printf("Memory Data Path Error Injection Mask ECC:\n"); 49a47a12beSStefan Roese printf(" ECC Mirror Byte: %d\n", 50a47a12beSStefan Roese (ddr->ecc_err_inject & ECC_ERR_INJECT_EMB) ? 1 : 0); 51a47a12beSStefan Roese printf(" ECC Injection Enable: %d\n", 52a47a12beSStefan Roese (ddr->ecc_err_inject & ECC_ERR_INJECT_EIEN) ? 1 : 0); 53a47a12beSStefan Roese printf(" ECC Error Injection Mask: 0x%02x\n\n", 54a47a12beSStefan Roese ddr->ecc_err_inject & ECC_ERR_INJECT_EEIM); 55a47a12beSStefan Roese 56a47a12beSStefan Roese /* SBE counter/threshold */ 57a47a12beSStefan Roese printf("Memory Single-Bit Error Management (0..255):\n"); 58a47a12beSStefan Roese printf(" Single-Bit Error Threshold: %d\n", 59a47a12beSStefan Roese (ddr->err_sbe & ECC_ERROR_MAN_SBET) >> ECC_ERROR_MAN_SBET_SHIFT); 60a47a12beSStefan Roese printf(" Single-Bit Error Counter: %d\n\n", 61a47a12beSStefan Roese (ddr->err_sbe & ECC_ERROR_MAN_SBEC) >> ECC_ERROR_MAN_SBEC_SHIFT); 62a47a12beSStefan Roese 63a47a12beSStefan Roese /* Error detect */ 64a47a12beSStefan Roese printf("Memory Error Detect:\n"); 65a47a12beSStefan Roese printf(" Multiple Memory Errors: %d\n", 66a47a12beSStefan Roese (ddr->err_detect & ECC_ERROR_DETECT_MME) ? 1 : 0); 67a47a12beSStefan Roese printf(" Multiple-Bit Error: %d\n", 68a47a12beSStefan Roese (ddr->err_detect & ECC_ERROR_DETECT_MBE) ? 1 : 0); 69a47a12beSStefan Roese printf(" Single-Bit Error: %d\n", 70a47a12beSStefan Roese (ddr->err_detect & ECC_ERROR_DETECT_SBE) ? 1 : 0); 71a47a12beSStefan Roese printf(" Memory Select Error: %d\n\n", 72a47a12beSStefan Roese (ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0); 73a47a12beSStefan Roese 74a47a12beSStefan Roese /* Capture data */ 75a47a12beSStefan Roese printf("Memory Error Address Capture: 0x%08x\n", ddr->capture_address); 76a47a12beSStefan Roese printf("Memory Data Path Read Capture High/Low: %08x %08x\n", 77a47a12beSStefan Roese ddr->capture_data_hi, ddr->capture_data_lo); 78a47a12beSStefan Roese printf("Memory Data Path Read Capture ECC: 0x%02x\n\n", 79a47a12beSStefan Roese ddr->capture_ecc & CAPTURE_ECC_ECE); 80a47a12beSStefan Roese 81a47a12beSStefan Roese printf("Memory Error Attributes Capture:\n"); 82a47a12beSStefan Roese printf(" Data Beat Number: %d\n", 83a47a12beSStefan Roese (ddr->capture_attributes & ECC_CAPT_ATTR_BNUM) >> 84a47a12beSStefan Roese ECC_CAPT_ATTR_BNUM_SHIFT); 85a47a12beSStefan Roese printf(" Transaction Size: %d\n", 86a47a12beSStefan Roese (ddr->capture_attributes & ECC_CAPT_ATTR_TSIZ) >> 87a47a12beSStefan Roese ECC_CAPT_ATTR_TSIZ_SHIFT); 88a47a12beSStefan Roese printf(" Transaction Source: %d\n", 89a47a12beSStefan Roese (ddr->capture_attributes & ECC_CAPT_ATTR_TSRC) >> 90a47a12beSStefan Roese ECC_CAPT_ATTR_TSRC_SHIFT); 91a47a12beSStefan Roese printf(" Transaction Type: %d\n", 92a47a12beSStefan Roese (ddr->capture_attributes & ECC_CAPT_ATTR_TTYP) >> 93a47a12beSStefan Roese ECC_CAPT_ATTR_TTYP_SHIFT); 94a47a12beSStefan Roese printf(" Error Information Valid: %d\n\n", 95a47a12beSStefan Roese ddr->capture_attributes & ECC_CAPT_ATTR_VLD); 96a47a12beSStefan Roese } 97a47a12beSStefan Roese 9854841ab5SWolfgang Denk int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 99a47a12beSStefan Roese { 100d29d17d7SYork Sun immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 1015614e71bSYork Sun #ifdef CONFIG_SYS_FSL_DDR2 1029a17eb5bSYork Sun struct ccsr_ddr __iomem *ddr = &immap->ddr; 103d29d17d7SYork Sun #else 104d29d17d7SYork Sun ddr83xx_t *ddr = &immap->ddr; 105d29d17d7SYork Sun #endif 106a47a12beSStefan Roese volatile u32 val; 107a47a12beSStefan Roese u64 *addr; 108a47a12beSStefan Roese u32 count; 109a47a12beSStefan Roese register u64 *i; 110a47a12beSStefan Roese u32 ret[2]; 111a47a12beSStefan Roese u32 pattern[2]; 112a47a12beSStefan Roese u32 writeback[2]; 113a47a12beSStefan Roese 114a47a12beSStefan Roese /* The pattern is written into memory to generate error */ 115a47a12beSStefan Roese pattern[0] = 0xfedcba98UL; 116a47a12beSStefan Roese pattern[1] = 0x76543210UL; 117a47a12beSStefan Roese 118a47a12beSStefan Roese /* After injecting error, re-initialize the memory with the value */ 119a47a12beSStefan Roese writeback[0] = 0x01234567UL; 120a47a12beSStefan Roese writeback[1] = 0x89abcdefUL; 121a47a12beSStefan Roese 12247e26b1bSWolfgang Denk if (argc > 4) 12347e26b1bSWolfgang Denk return cmd_usage(cmdtp); 124a47a12beSStefan Roese 125a47a12beSStefan Roese if (argc == 2) { 126a47a12beSStefan Roese if (strcmp(argv[1], "status") == 0) { 127a47a12beSStefan Roese ecc_print_status(); 128a47a12beSStefan Roese return 0; 129a47a12beSStefan Roese } else if (strcmp(argv[1], "captureclear") == 0) { 130a47a12beSStefan Roese ddr->capture_address = 0; 131a47a12beSStefan Roese ddr->capture_data_hi = 0; 132a47a12beSStefan Roese ddr->capture_data_lo = 0; 133a47a12beSStefan Roese ddr->capture_ecc = 0; 134a47a12beSStefan Roese ddr->capture_attributes = 0; 135a47a12beSStefan Roese return 0; 136a47a12beSStefan Roese } 137a47a12beSStefan Roese } 138a47a12beSStefan Roese if (argc == 3) { 139a47a12beSStefan Roese if (strcmp(argv[1], "sbecnt") == 0) { 140a47a12beSStefan Roese val = simple_strtoul(argv[2], NULL, 10); 141a47a12beSStefan Roese if (val > 255) { 142a47a12beSStefan Roese printf("Incorrect Counter value, " 143a47a12beSStefan Roese "should be 0..255\n"); 144a47a12beSStefan Roese return 1; 145a47a12beSStefan Roese } 146a47a12beSStefan Roese 147a47a12beSStefan Roese val = (val << ECC_ERROR_MAN_SBEC_SHIFT); 148a47a12beSStefan Roese val |= (ddr->err_sbe & ECC_ERROR_MAN_SBET); 149a47a12beSStefan Roese 150a47a12beSStefan Roese ddr->err_sbe = val; 151a47a12beSStefan Roese return 0; 152a47a12beSStefan Roese } else if (strcmp(argv[1], "sbethr") == 0) { 153a47a12beSStefan Roese val = simple_strtoul(argv[2], NULL, 10); 154a47a12beSStefan Roese if (val > 255) { 155a47a12beSStefan Roese printf("Incorrect Counter value, " 156a47a12beSStefan Roese "should be 0..255\n"); 157a47a12beSStefan Roese return 1; 158a47a12beSStefan Roese } 159a47a12beSStefan Roese 160a47a12beSStefan Roese val = (val << ECC_ERROR_MAN_SBET_SHIFT); 161a47a12beSStefan Roese val |= (ddr->err_sbe & ECC_ERROR_MAN_SBEC); 162a47a12beSStefan Roese 163a47a12beSStefan Roese ddr->err_sbe = val; 164a47a12beSStefan Roese return 0; 165a47a12beSStefan Roese } else if (strcmp(argv[1], "errdisable") == 0) { 166a47a12beSStefan Roese val = ddr->err_disable; 167a47a12beSStefan Roese 168a47a12beSStefan Roese if (strcmp(argv[2], "+sbe") == 0) { 169a47a12beSStefan Roese val |= ECC_ERROR_DISABLE_SBED; 170a47a12beSStefan Roese } else if (strcmp(argv[2], "+mbe") == 0) { 171a47a12beSStefan Roese val |= ECC_ERROR_DISABLE_MBED; 172a47a12beSStefan Roese } else if (strcmp(argv[2], "+mse") == 0) { 173a47a12beSStefan Roese val |= ECC_ERROR_DISABLE_MSED; 174a47a12beSStefan Roese } else if (strcmp(argv[2], "+all") == 0) { 175a47a12beSStefan Roese val |= (ECC_ERROR_DISABLE_SBED | 176a47a12beSStefan Roese ECC_ERROR_DISABLE_MBED | 177a47a12beSStefan Roese ECC_ERROR_DISABLE_MSED); 178a47a12beSStefan Roese } else if (strcmp(argv[2], "-sbe") == 0) { 179a47a12beSStefan Roese val &= ~ECC_ERROR_DISABLE_SBED; 180a47a12beSStefan Roese } else if (strcmp(argv[2], "-mbe") == 0) { 181a47a12beSStefan Roese val &= ~ECC_ERROR_DISABLE_MBED; 182a47a12beSStefan Roese } else if (strcmp(argv[2], "-mse") == 0) { 183a47a12beSStefan Roese val &= ~ECC_ERROR_DISABLE_MSED; 184a47a12beSStefan Roese } else if (strcmp(argv[2], "-all") == 0) { 185a47a12beSStefan Roese val &= ~(ECC_ERROR_DISABLE_SBED | 186a47a12beSStefan Roese ECC_ERROR_DISABLE_MBED | 187a47a12beSStefan Roese ECC_ERROR_DISABLE_MSED); 188a47a12beSStefan Roese } else { 189a47a12beSStefan Roese printf("Incorrect err_disable field\n"); 190a47a12beSStefan Roese return 1; 191a47a12beSStefan Roese } 192a47a12beSStefan Roese 193a47a12beSStefan Roese ddr->err_disable = val; 194a47a12beSStefan Roese __asm__ __volatile__("sync"); 195a47a12beSStefan Roese __asm__ __volatile__("isync"); 196a47a12beSStefan Roese return 0; 197a47a12beSStefan Roese } else if (strcmp(argv[1], "errdetectclr") == 0) { 198a47a12beSStefan Roese val = ddr->err_detect; 199a47a12beSStefan Roese 200a47a12beSStefan Roese if (strcmp(argv[2], "mme") == 0) { 201a47a12beSStefan Roese val |= ECC_ERROR_DETECT_MME; 202a47a12beSStefan Roese } else if (strcmp(argv[2], "sbe") == 0) { 203a47a12beSStefan Roese val |= ECC_ERROR_DETECT_SBE; 204a47a12beSStefan Roese } else if (strcmp(argv[2], "mbe") == 0) { 205a47a12beSStefan Roese val |= ECC_ERROR_DETECT_MBE; 206a47a12beSStefan Roese } else if (strcmp(argv[2], "mse") == 0) { 207a47a12beSStefan Roese val |= ECC_ERROR_DETECT_MSE; 208a47a12beSStefan Roese } else if (strcmp(argv[2], "all") == 0) { 209a47a12beSStefan Roese val |= (ECC_ERROR_DETECT_MME | 210a47a12beSStefan Roese ECC_ERROR_DETECT_MBE | 211a47a12beSStefan Roese ECC_ERROR_DETECT_SBE | 212a47a12beSStefan Roese ECC_ERROR_DETECT_MSE); 213a47a12beSStefan Roese } else { 214a47a12beSStefan Roese printf("Incorrect err_detect field\n"); 215a47a12beSStefan Roese return 1; 216a47a12beSStefan Roese } 217a47a12beSStefan Roese 218a47a12beSStefan Roese ddr->err_detect = val; 219a47a12beSStefan Roese return 0; 220a47a12beSStefan Roese } else if (strcmp(argv[1], "injectdatahi") == 0) { 221a47a12beSStefan Roese val = simple_strtoul(argv[2], NULL, 16); 222a47a12beSStefan Roese 223a47a12beSStefan Roese ddr->data_err_inject_hi = val; 224a47a12beSStefan Roese return 0; 225a47a12beSStefan Roese } else if (strcmp(argv[1], "injectdatalo") == 0) { 226a47a12beSStefan Roese val = simple_strtoul(argv[2], NULL, 16); 227a47a12beSStefan Roese 228a47a12beSStefan Roese ddr->data_err_inject_lo = val; 229a47a12beSStefan Roese return 0; 230a47a12beSStefan Roese } else if (strcmp(argv[1], "injectecc") == 0) { 231a47a12beSStefan Roese val = simple_strtoul(argv[2], NULL, 16); 232a47a12beSStefan Roese if (val > 0xff) { 233a47a12beSStefan Roese printf("Incorrect ECC inject mask, " 234a47a12beSStefan Roese "should be 0x00..0xff\n"); 235a47a12beSStefan Roese return 1; 236a47a12beSStefan Roese } 237a47a12beSStefan Roese val |= (ddr->ecc_err_inject & ~ECC_ERR_INJECT_EEIM); 238a47a12beSStefan Roese 239a47a12beSStefan Roese ddr->ecc_err_inject = val; 240a47a12beSStefan Roese return 0; 241a47a12beSStefan Roese } else if (strcmp(argv[1], "inject") == 0) { 242a47a12beSStefan Roese val = ddr->ecc_err_inject; 243a47a12beSStefan Roese 244a47a12beSStefan Roese if (strcmp(argv[2], "en") == 0) 245a47a12beSStefan Roese val |= ECC_ERR_INJECT_EIEN; 246a47a12beSStefan Roese else if (strcmp(argv[2], "dis") == 0) 247a47a12beSStefan Roese val &= ~ECC_ERR_INJECT_EIEN; 248a47a12beSStefan Roese else 249a47a12beSStefan Roese printf("Incorrect command\n"); 250a47a12beSStefan Roese 251a47a12beSStefan Roese ddr->ecc_err_inject = val; 252a47a12beSStefan Roese __asm__ __volatile__("sync"); 253a47a12beSStefan Roese __asm__ __volatile__("isync"); 254a47a12beSStefan Roese return 0; 255a47a12beSStefan Roese } else if (strcmp(argv[1], "mirror") == 0) { 256a47a12beSStefan Roese val = ddr->ecc_err_inject; 257a47a12beSStefan Roese 258a47a12beSStefan Roese if (strcmp(argv[2], "en") == 0) 259a47a12beSStefan Roese val |= ECC_ERR_INJECT_EMB; 260a47a12beSStefan Roese else if (strcmp(argv[2], "dis") == 0) 261a47a12beSStefan Roese val &= ~ECC_ERR_INJECT_EMB; 262a47a12beSStefan Roese else 263a47a12beSStefan Roese printf("Incorrect command\n"); 264a47a12beSStefan Roese 265a47a12beSStefan Roese ddr->ecc_err_inject = val; 266a47a12beSStefan Roese return 0; 267a47a12beSStefan Roese } 268a47a12beSStefan Roese } 269a47a12beSStefan Roese if (argc == 4) { 270a47a12beSStefan Roese if (strcmp(argv[1], "testdw") == 0) { 271a47a12beSStefan Roese addr = (u64 *) simple_strtoul(argv[2], NULL, 16); 272a47a12beSStefan Roese count = simple_strtoul(argv[3], NULL, 16); 273a47a12beSStefan Roese 274a47a12beSStefan Roese if ((u32) addr % 8) { 275d7b4ca2bSRobert P. J. Day printf("Address not aligned on " 276a47a12beSStefan Roese "double word boundary\n"); 277a47a12beSStefan Roese return 1; 278a47a12beSStefan Roese } 279a47a12beSStefan Roese disable_interrupts(); 280a47a12beSStefan Roese 281a47a12beSStefan Roese for (i = addr; i < addr + count; i++) { 282a47a12beSStefan Roese 283a47a12beSStefan Roese /* enable injects */ 284a47a12beSStefan Roese ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN; 285a47a12beSStefan Roese __asm__ __volatile__("sync"); 286a47a12beSStefan Roese __asm__ __volatile__("isync"); 287a47a12beSStefan Roese 288a47a12beSStefan Roese /* write memory location injecting errors */ 289a47a12beSStefan Roese ppcDWstore((u32 *) i, pattern); 290a47a12beSStefan Roese __asm__ __volatile__("sync"); 291a47a12beSStefan Roese 292a47a12beSStefan Roese /* disable injects */ 293a47a12beSStefan Roese ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN; 294a47a12beSStefan Roese __asm__ __volatile__("sync"); 295a47a12beSStefan Roese __asm__ __volatile__("isync"); 296a47a12beSStefan Roese 297a47a12beSStefan Roese /* read data, this generates ECC error */ 298a47a12beSStefan Roese ppcDWload((u32 *) i, ret); 299a47a12beSStefan Roese __asm__ __volatile__("sync"); 300a47a12beSStefan Roese 301a47a12beSStefan Roese /* re-initialize memory, double word write the location again, 302a47a12beSStefan Roese * generates new ECC code this time */ 303a47a12beSStefan Roese ppcDWstore((u32 *) i, writeback); 304a47a12beSStefan Roese __asm__ __volatile__("sync"); 305a47a12beSStefan Roese } 306a47a12beSStefan Roese enable_interrupts(); 307a47a12beSStefan Roese return 0; 308a47a12beSStefan Roese } 309a47a12beSStefan Roese if (strcmp(argv[1], "testword") == 0) { 310a47a12beSStefan Roese addr = (u64 *) simple_strtoul(argv[2], NULL, 16); 311a47a12beSStefan Roese count = simple_strtoul(argv[3], NULL, 16); 312a47a12beSStefan Roese 313a47a12beSStefan Roese if ((u32) addr % 8) { 314d7b4ca2bSRobert P. J. Day printf("Address not aligned on " 315a47a12beSStefan Roese "double word boundary\n"); 316a47a12beSStefan Roese return 1; 317a47a12beSStefan Roese } 318a47a12beSStefan Roese disable_interrupts(); 319a47a12beSStefan Roese 320a47a12beSStefan Roese for (i = addr; i < addr + count; i++) { 321a47a12beSStefan Roese 322a47a12beSStefan Roese /* enable injects */ 323a47a12beSStefan Roese ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN; 324a47a12beSStefan Roese __asm__ __volatile__("sync"); 325a47a12beSStefan Roese __asm__ __volatile__("isync"); 326a47a12beSStefan Roese 327a47a12beSStefan Roese /* write memory location injecting errors */ 328a47a12beSStefan Roese *(u32 *) i = 0xfedcba98UL; 329a47a12beSStefan Roese __asm__ __volatile__("sync"); 330a47a12beSStefan Roese 331a47a12beSStefan Roese /* sub double word write, 332a47a12beSStefan Roese * bus will read-modify-write, 333a47a12beSStefan Roese * generates ECC error */ 334a47a12beSStefan Roese *((u32 *) i + 1) = 0x76543210UL; 335a47a12beSStefan Roese __asm__ __volatile__("sync"); 336a47a12beSStefan Roese 337a47a12beSStefan Roese /* disable injects */ 338a47a12beSStefan Roese ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN; 339a47a12beSStefan Roese __asm__ __volatile__("sync"); 340a47a12beSStefan Roese __asm__ __volatile__("isync"); 341a47a12beSStefan Roese 342a47a12beSStefan Roese /* re-initialize memory, 343a47a12beSStefan Roese * double word write the location again, 344a47a12beSStefan Roese * generates new ECC code this time */ 345a47a12beSStefan Roese ppcDWstore((u32 *) i, writeback); 346a47a12beSStefan Roese __asm__ __volatile__("sync"); 347a47a12beSStefan Roese } 348a47a12beSStefan Roese enable_interrupts(); 349a47a12beSStefan Roese return 0; 350a47a12beSStefan Roese } 351a47a12beSStefan Roese } 35247e26b1bSWolfgang Denk return cmd_usage(cmdtp); 353a47a12beSStefan Roese } 354a47a12beSStefan Roese 355a47a12beSStefan Roese U_BOOT_CMD(ecc, 4, 0, do_ecc, 356a47a12beSStefan Roese "support for DDR ECC features", 357a47a12beSStefan Roese "status - print out status info\n" 358a47a12beSStefan Roese "ecc captureclear - clear capture regs data\n" 359a47a12beSStefan Roese "ecc sbecnt <val> - set Single-Bit Error counter\n" 360a47a12beSStefan Roese "ecc sbethr <val> - set Single-Bit Threshold\n" 361a47a12beSStefan Roese "ecc errdisable <flag> - clear/set disable Memory Error Disable, flag:\n" 362a47a12beSStefan Roese " [-|+]sbe - Single-Bit Error\n" 363a47a12beSStefan Roese " [-|+]mbe - Multiple-Bit Error\n" 364a47a12beSStefan Roese " [-|+]mse - Memory Select Error\n" 365a47a12beSStefan Roese " [-|+]all - all errors\n" 366a47a12beSStefan Roese "ecc errdetectclr <flag> - clear Memory Error Detect, flag:\n" 367a47a12beSStefan Roese " mme - Multiple Memory Errors\n" 368a47a12beSStefan Roese " sbe - Single-Bit Error\n" 369a47a12beSStefan Roese " mbe - Multiple-Bit Error\n" 370a47a12beSStefan Roese " mse - Memory Select Error\n" 371a47a12beSStefan Roese " all - all errors\n" 372a47a12beSStefan Roese "ecc injectdatahi <hi> - set Memory Data Path Error Injection Mask High\n" 373a47a12beSStefan Roese "ecc injectdatalo <lo> - set Memory Data Path Error Injection Mask Low\n" 374a47a12beSStefan Roese "ecc injectecc <ecc> - set ECC Error Injection Mask\n" 375a47a12beSStefan Roese "ecc inject <en|dis> - enable/disable error injection\n" 376a47a12beSStefan Roese "ecc mirror <en|dis> - enable/disable mirror byte\n" 377a47a12beSStefan Roese "ecc testdw <addr> <cnt> - test mem region with double word access:\n" 378a47a12beSStefan Roese " - enables injects\n" 379a47a12beSStefan Roese " - writes pattern injecting errors with double word access\n" 380a47a12beSStefan Roese " - disables injects\n" 381a47a12beSStefan Roese " - reads pattern back with double word access, generates error\n" 382a47a12beSStefan Roese " - re-inits memory\n" 383a47a12beSStefan Roese "ecc testword <addr> <cnt> - test mem region with word access:\n" 384a47a12beSStefan Roese " - enables injects\n" 385a47a12beSStefan Roese " - writes pattern injecting errors with word access\n" 386a47a12beSStefan Roese " - writes pattern with word access, generates error\n" 387a47a12beSStefan Roese " - disables injects\n" " - re-inits memory"); 388a47a12beSStefan Roese #endif 389