1a47a12beSStefan Roese /* 2a47a12beSStefan Roese * Copyright (C) 2007 Freescale Semiconductor, Inc. 3a47a12beSStefan Roese * 4a47a12beSStefan Roese * Dave Liu <daveliu@freescale.com> 5a47a12beSStefan Roese * based on the contribution of Marian Balakowicz <m8@semihalf.com> 6a47a12beSStefan Roese * 7a47a12beSStefan Roese * See file CREDITS for list of people who contributed to this 8a47a12beSStefan Roese * project. 9a47a12beSStefan Roese * 10a47a12beSStefan Roese * This program is free software; you can redistribute it and/or 11a47a12beSStefan Roese * modify it under the terms of the GNU General Public License as 12a47a12beSStefan Roese * published by the Free Software Foundation; either version 2 of 13a47a12beSStefan Roese * the License, or (at your option) any later version. 14a47a12beSStefan Roese */ 15a47a12beSStefan Roese 16a47a12beSStefan Roese #include <common.h> 17a47a12beSStefan Roese #include <mpc83xx.h> 18a47a12beSStefan Roese #include <command.h> 19a47a12beSStefan Roese 20a47a12beSStefan Roese #if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) 21a47a12beSStefan Roese void ecc_print_status(void) 22a47a12beSStefan Roese { 23a47a12beSStefan Roese volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 24a47a12beSStefan Roese volatile ddr83xx_t *ddr = &immap->ddr; 25a47a12beSStefan Roese 26a47a12beSStefan Roese printf("\nECC mode: %s\n\n", 27a47a12beSStefan Roese (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF"); 28a47a12beSStefan Roese 29a47a12beSStefan Roese /* Interrupts */ 30a47a12beSStefan Roese printf("Memory Error Interrupt Enable:\n"); 31a47a12beSStefan Roese printf(" Multiple-Bit Error Interrupt Enable: %d\n", 32a47a12beSStefan Roese (ddr->err_int_en & ECC_ERR_INT_EN_MBEE) ? 1 : 0); 33a47a12beSStefan Roese printf(" Single-Bit Error Interrupt Enable: %d\n", 34a47a12beSStefan Roese (ddr->err_int_en & ECC_ERR_INT_EN_SBEE) ? 1 : 0); 35a47a12beSStefan Roese printf(" Memory Select Error Interrupt Enable: %d\n\n", 36a47a12beSStefan Roese (ddr->err_int_en & ECC_ERR_INT_EN_MSEE) ? 1 : 0); 37a47a12beSStefan Roese 38a47a12beSStefan Roese /* Error disable */ 39a47a12beSStefan Roese printf("Memory Error Disable:\n"); 40a47a12beSStefan Roese printf(" Multiple-Bit Error Disable: %d\n", 41a47a12beSStefan Roese (ddr->err_disable & ECC_ERROR_DISABLE_MBED) ? 1 : 0); 42a47a12beSStefan Roese printf(" Sinle-Bit Error Disable: %d\n", 43a47a12beSStefan Roese (ddr->err_disable & ECC_ERROR_DISABLE_SBED) ? 1 : 0); 44a47a12beSStefan Roese printf(" Memory Select Error Disable: %d\n\n", 45a47a12beSStefan Roese (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0); 46a47a12beSStefan Roese 47a47a12beSStefan Roese /* Error injection */ 48a47a12beSStefan Roese printf("Memory Data Path Error Injection Mask High/Low: %08x %08x\n", 49a47a12beSStefan Roese ddr->data_err_inject_hi, ddr->data_err_inject_lo); 50a47a12beSStefan Roese 51a47a12beSStefan Roese printf("Memory Data Path Error Injection Mask ECC:\n"); 52a47a12beSStefan Roese printf(" ECC Mirror Byte: %d\n", 53a47a12beSStefan Roese (ddr->ecc_err_inject & ECC_ERR_INJECT_EMB) ? 1 : 0); 54a47a12beSStefan Roese printf(" ECC Injection Enable: %d\n", 55a47a12beSStefan Roese (ddr->ecc_err_inject & ECC_ERR_INJECT_EIEN) ? 1 : 0); 56a47a12beSStefan Roese printf(" ECC Error Injection Mask: 0x%02x\n\n", 57a47a12beSStefan Roese ddr->ecc_err_inject & ECC_ERR_INJECT_EEIM); 58a47a12beSStefan Roese 59a47a12beSStefan Roese /* SBE counter/threshold */ 60a47a12beSStefan Roese printf("Memory Single-Bit Error Management (0..255):\n"); 61a47a12beSStefan Roese printf(" Single-Bit Error Threshold: %d\n", 62a47a12beSStefan Roese (ddr->err_sbe & ECC_ERROR_MAN_SBET) >> ECC_ERROR_MAN_SBET_SHIFT); 63a47a12beSStefan Roese printf(" Single-Bit Error Counter: %d\n\n", 64a47a12beSStefan Roese (ddr->err_sbe & ECC_ERROR_MAN_SBEC) >> ECC_ERROR_MAN_SBEC_SHIFT); 65a47a12beSStefan Roese 66a47a12beSStefan Roese /* Error detect */ 67a47a12beSStefan Roese printf("Memory Error Detect:\n"); 68a47a12beSStefan Roese printf(" Multiple Memory Errors: %d\n", 69a47a12beSStefan Roese (ddr->err_detect & ECC_ERROR_DETECT_MME) ? 1 : 0); 70a47a12beSStefan Roese printf(" Multiple-Bit Error: %d\n", 71a47a12beSStefan Roese (ddr->err_detect & ECC_ERROR_DETECT_MBE) ? 1 : 0); 72a47a12beSStefan Roese printf(" Single-Bit Error: %d\n", 73a47a12beSStefan Roese (ddr->err_detect & ECC_ERROR_DETECT_SBE) ? 1 : 0); 74a47a12beSStefan Roese printf(" Memory Select Error: %d\n\n", 75a47a12beSStefan Roese (ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0); 76a47a12beSStefan Roese 77a47a12beSStefan Roese /* Capture data */ 78a47a12beSStefan Roese printf("Memory Error Address Capture: 0x%08x\n", ddr->capture_address); 79a47a12beSStefan Roese printf("Memory Data Path Read Capture High/Low: %08x %08x\n", 80a47a12beSStefan Roese ddr->capture_data_hi, ddr->capture_data_lo); 81a47a12beSStefan Roese printf("Memory Data Path Read Capture ECC: 0x%02x\n\n", 82a47a12beSStefan Roese ddr->capture_ecc & CAPTURE_ECC_ECE); 83a47a12beSStefan Roese 84a47a12beSStefan Roese printf("Memory Error Attributes Capture:\n"); 85a47a12beSStefan Roese printf(" Data Beat Number: %d\n", 86a47a12beSStefan Roese (ddr->capture_attributes & ECC_CAPT_ATTR_BNUM) >> 87a47a12beSStefan Roese ECC_CAPT_ATTR_BNUM_SHIFT); 88a47a12beSStefan Roese printf(" Transaction Size: %d\n", 89a47a12beSStefan Roese (ddr->capture_attributes & ECC_CAPT_ATTR_TSIZ) >> 90a47a12beSStefan Roese ECC_CAPT_ATTR_TSIZ_SHIFT); 91a47a12beSStefan Roese printf(" Transaction Source: %d\n", 92a47a12beSStefan Roese (ddr->capture_attributes & ECC_CAPT_ATTR_TSRC) >> 93a47a12beSStefan Roese ECC_CAPT_ATTR_TSRC_SHIFT); 94a47a12beSStefan Roese printf(" Transaction Type: %d\n", 95a47a12beSStefan Roese (ddr->capture_attributes & ECC_CAPT_ATTR_TTYP) >> 96a47a12beSStefan Roese ECC_CAPT_ATTR_TTYP_SHIFT); 97a47a12beSStefan Roese printf(" Error Information Valid: %d\n\n", 98a47a12beSStefan Roese ddr->capture_attributes & ECC_CAPT_ATTR_VLD); 99a47a12beSStefan Roese } 100a47a12beSStefan Roese 101*54841ab5SWolfgang Denk int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 102a47a12beSStefan Roese { 103a47a12beSStefan Roese volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; 104a47a12beSStefan Roese volatile ddr83xx_t *ddr = &immap->ddr; 105a47a12beSStefan Roese volatile u32 val; 106a47a12beSStefan Roese u64 *addr; 107a47a12beSStefan Roese u32 count; 108a47a12beSStefan Roese register u64 *i; 109a47a12beSStefan Roese u32 ret[2]; 110a47a12beSStefan Roese u32 pattern[2]; 111a47a12beSStefan Roese u32 writeback[2]; 112a47a12beSStefan Roese 113a47a12beSStefan Roese /* The pattern is written into memory to generate error */ 114a47a12beSStefan Roese pattern[0] = 0xfedcba98UL; 115a47a12beSStefan Roese pattern[1] = 0x76543210UL; 116a47a12beSStefan Roese 117a47a12beSStefan Roese /* After injecting error, re-initialize the memory with the value */ 118a47a12beSStefan Roese writeback[0] = 0x01234567UL; 119a47a12beSStefan Roese writeback[1] = 0x89abcdefUL; 120a47a12beSStefan Roese 121a47a12beSStefan Roese if (argc > 4) { 122a47a12beSStefan Roese cmd_usage(cmdtp); 123a47a12beSStefan Roese return 1; 124a47a12beSStefan Roese } 125a47a12beSStefan Roese 126a47a12beSStefan Roese if (argc == 2) { 127a47a12beSStefan Roese if (strcmp(argv[1], "status") == 0) { 128a47a12beSStefan Roese ecc_print_status(); 129a47a12beSStefan Roese return 0; 130a47a12beSStefan Roese } else if (strcmp(argv[1], "captureclear") == 0) { 131a47a12beSStefan Roese ddr->capture_address = 0; 132a47a12beSStefan Roese ddr->capture_data_hi = 0; 133a47a12beSStefan Roese ddr->capture_data_lo = 0; 134a47a12beSStefan Roese ddr->capture_ecc = 0; 135a47a12beSStefan Roese ddr->capture_attributes = 0; 136a47a12beSStefan Roese return 0; 137a47a12beSStefan Roese } 138a47a12beSStefan Roese } 139a47a12beSStefan Roese if (argc == 3) { 140a47a12beSStefan Roese if (strcmp(argv[1], "sbecnt") == 0) { 141a47a12beSStefan Roese val = simple_strtoul(argv[2], NULL, 10); 142a47a12beSStefan Roese if (val > 255) { 143a47a12beSStefan Roese printf("Incorrect Counter value, " 144a47a12beSStefan Roese "should be 0..255\n"); 145a47a12beSStefan Roese return 1; 146a47a12beSStefan Roese } 147a47a12beSStefan Roese 148a47a12beSStefan Roese val = (val << ECC_ERROR_MAN_SBEC_SHIFT); 149a47a12beSStefan Roese val |= (ddr->err_sbe & ECC_ERROR_MAN_SBET); 150a47a12beSStefan Roese 151a47a12beSStefan Roese ddr->err_sbe = val; 152a47a12beSStefan Roese return 0; 153a47a12beSStefan Roese } else if (strcmp(argv[1], "sbethr") == 0) { 154a47a12beSStefan Roese val = simple_strtoul(argv[2], NULL, 10); 155a47a12beSStefan Roese if (val > 255) { 156a47a12beSStefan Roese printf("Incorrect Counter value, " 157a47a12beSStefan Roese "should be 0..255\n"); 158a47a12beSStefan Roese return 1; 159a47a12beSStefan Roese } 160a47a12beSStefan Roese 161a47a12beSStefan Roese val = (val << ECC_ERROR_MAN_SBET_SHIFT); 162a47a12beSStefan Roese val |= (ddr->err_sbe & ECC_ERROR_MAN_SBEC); 163a47a12beSStefan Roese 164a47a12beSStefan Roese ddr->err_sbe = val; 165a47a12beSStefan Roese return 0; 166a47a12beSStefan Roese } else if (strcmp(argv[1], "errdisable") == 0) { 167a47a12beSStefan Roese val = ddr->err_disable; 168a47a12beSStefan Roese 169a47a12beSStefan Roese if (strcmp(argv[2], "+sbe") == 0) { 170a47a12beSStefan Roese val |= ECC_ERROR_DISABLE_SBED; 171a47a12beSStefan Roese } else if (strcmp(argv[2], "+mbe") == 0) { 172a47a12beSStefan Roese val |= ECC_ERROR_DISABLE_MBED; 173a47a12beSStefan Roese } else if (strcmp(argv[2], "+mse") == 0) { 174a47a12beSStefan Roese val |= ECC_ERROR_DISABLE_MSED; 175a47a12beSStefan Roese } else if (strcmp(argv[2], "+all") == 0) { 176a47a12beSStefan Roese val |= (ECC_ERROR_DISABLE_SBED | 177a47a12beSStefan Roese ECC_ERROR_DISABLE_MBED | 178a47a12beSStefan Roese ECC_ERROR_DISABLE_MSED); 179a47a12beSStefan Roese } else if (strcmp(argv[2], "-sbe") == 0) { 180a47a12beSStefan Roese val &= ~ECC_ERROR_DISABLE_SBED; 181a47a12beSStefan Roese } else if (strcmp(argv[2], "-mbe") == 0) { 182a47a12beSStefan Roese val &= ~ECC_ERROR_DISABLE_MBED; 183a47a12beSStefan Roese } else if (strcmp(argv[2], "-mse") == 0) { 184a47a12beSStefan Roese val &= ~ECC_ERROR_DISABLE_MSED; 185a47a12beSStefan Roese } else if (strcmp(argv[2], "-all") == 0) { 186a47a12beSStefan Roese val &= ~(ECC_ERROR_DISABLE_SBED | 187a47a12beSStefan Roese ECC_ERROR_DISABLE_MBED | 188a47a12beSStefan Roese ECC_ERROR_DISABLE_MSED); 189a47a12beSStefan Roese } else { 190a47a12beSStefan Roese printf("Incorrect err_disable field\n"); 191a47a12beSStefan Roese return 1; 192a47a12beSStefan Roese } 193a47a12beSStefan Roese 194a47a12beSStefan Roese ddr->err_disable = val; 195a47a12beSStefan Roese __asm__ __volatile__("sync"); 196a47a12beSStefan Roese __asm__ __volatile__("isync"); 197a47a12beSStefan Roese return 0; 198a47a12beSStefan Roese } else if (strcmp(argv[1], "errdetectclr") == 0) { 199a47a12beSStefan Roese val = ddr->err_detect; 200a47a12beSStefan Roese 201a47a12beSStefan Roese if (strcmp(argv[2], "mme") == 0) { 202a47a12beSStefan Roese val |= ECC_ERROR_DETECT_MME; 203a47a12beSStefan Roese } else if (strcmp(argv[2], "sbe") == 0) { 204a47a12beSStefan Roese val |= ECC_ERROR_DETECT_SBE; 205a47a12beSStefan Roese } else if (strcmp(argv[2], "mbe") == 0) { 206a47a12beSStefan Roese val |= ECC_ERROR_DETECT_MBE; 207a47a12beSStefan Roese } else if (strcmp(argv[2], "mse") == 0) { 208a47a12beSStefan Roese val |= ECC_ERROR_DETECT_MSE; 209a47a12beSStefan Roese } else if (strcmp(argv[2], "all") == 0) { 210a47a12beSStefan Roese val |= (ECC_ERROR_DETECT_MME | 211a47a12beSStefan Roese ECC_ERROR_DETECT_MBE | 212a47a12beSStefan Roese ECC_ERROR_DETECT_SBE | 213a47a12beSStefan Roese ECC_ERROR_DETECT_MSE); 214a47a12beSStefan Roese } else { 215a47a12beSStefan Roese printf("Incorrect err_detect field\n"); 216a47a12beSStefan Roese return 1; 217a47a12beSStefan Roese } 218a47a12beSStefan Roese 219a47a12beSStefan Roese ddr->err_detect = val; 220a47a12beSStefan Roese return 0; 221a47a12beSStefan Roese } else if (strcmp(argv[1], "injectdatahi") == 0) { 222a47a12beSStefan Roese val = simple_strtoul(argv[2], NULL, 16); 223a47a12beSStefan Roese 224a47a12beSStefan Roese ddr->data_err_inject_hi = val; 225a47a12beSStefan Roese return 0; 226a47a12beSStefan Roese } else if (strcmp(argv[1], "injectdatalo") == 0) { 227a47a12beSStefan Roese val = simple_strtoul(argv[2], NULL, 16); 228a47a12beSStefan Roese 229a47a12beSStefan Roese ddr->data_err_inject_lo = val; 230a47a12beSStefan Roese return 0; 231a47a12beSStefan Roese } else if (strcmp(argv[1], "injectecc") == 0) { 232a47a12beSStefan Roese val = simple_strtoul(argv[2], NULL, 16); 233a47a12beSStefan Roese if (val > 0xff) { 234a47a12beSStefan Roese printf("Incorrect ECC inject mask, " 235a47a12beSStefan Roese "should be 0x00..0xff\n"); 236a47a12beSStefan Roese return 1; 237a47a12beSStefan Roese } 238a47a12beSStefan Roese val |= (ddr->ecc_err_inject & ~ECC_ERR_INJECT_EEIM); 239a47a12beSStefan Roese 240a47a12beSStefan Roese ddr->ecc_err_inject = val; 241a47a12beSStefan Roese return 0; 242a47a12beSStefan Roese } else if (strcmp(argv[1], "inject") == 0) { 243a47a12beSStefan Roese val = ddr->ecc_err_inject; 244a47a12beSStefan Roese 245a47a12beSStefan Roese if (strcmp(argv[2], "en") == 0) 246a47a12beSStefan Roese val |= ECC_ERR_INJECT_EIEN; 247a47a12beSStefan Roese else if (strcmp(argv[2], "dis") == 0) 248a47a12beSStefan Roese val &= ~ECC_ERR_INJECT_EIEN; 249a47a12beSStefan Roese else 250a47a12beSStefan Roese printf("Incorrect command\n"); 251a47a12beSStefan Roese 252a47a12beSStefan Roese ddr->ecc_err_inject = val; 253a47a12beSStefan Roese __asm__ __volatile__("sync"); 254a47a12beSStefan Roese __asm__ __volatile__("isync"); 255a47a12beSStefan Roese return 0; 256a47a12beSStefan Roese } else if (strcmp(argv[1], "mirror") == 0) { 257a47a12beSStefan Roese val = ddr->ecc_err_inject; 258a47a12beSStefan Roese 259a47a12beSStefan Roese if (strcmp(argv[2], "en") == 0) 260a47a12beSStefan Roese val |= ECC_ERR_INJECT_EMB; 261a47a12beSStefan Roese else if (strcmp(argv[2], "dis") == 0) 262a47a12beSStefan Roese val &= ~ECC_ERR_INJECT_EMB; 263a47a12beSStefan Roese else 264a47a12beSStefan Roese printf("Incorrect command\n"); 265a47a12beSStefan Roese 266a47a12beSStefan Roese ddr->ecc_err_inject = val; 267a47a12beSStefan Roese return 0; 268a47a12beSStefan Roese } 269a47a12beSStefan Roese } 270a47a12beSStefan Roese if (argc == 4) { 271a47a12beSStefan Roese if (strcmp(argv[1], "testdw") == 0) { 272a47a12beSStefan Roese addr = (u64 *) simple_strtoul(argv[2], NULL, 16); 273a47a12beSStefan Roese count = simple_strtoul(argv[3], NULL, 16); 274a47a12beSStefan Roese 275a47a12beSStefan Roese if ((u32) addr % 8) { 276a47a12beSStefan Roese printf("Address not alligned on " 277a47a12beSStefan Roese "double word boundary\n"); 278a47a12beSStefan Roese return 1; 279a47a12beSStefan Roese } 280a47a12beSStefan Roese disable_interrupts(); 281a47a12beSStefan Roese 282a47a12beSStefan Roese for (i = addr; i < addr + count; i++) { 283a47a12beSStefan Roese 284a47a12beSStefan Roese /* enable injects */ 285a47a12beSStefan Roese ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN; 286a47a12beSStefan Roese __asm__ __volatile__("sync"); 287a47a12beSStefan Roese __asm__ __volatile__("isync"); 288a47a12beSStefan Roese 289a47a12beSStefan Roese /* write memory location injecting errors */ 290a47a12beSStefan Roese ppcDWstore((u32 *) i, pattern); 291a47a12beSStefan Roese __asm__ __volatile__("sync"); 292a47a12beSStefan Roese 293a47a12beSStefan Roese /* disable injects */ 294a47a12beSStefan Roese ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN; 295a47a12beSStefan Roese __asm__ __volatile__("sync"); 296a47a12beSStefan Roese __asm__ __volatile__("isync"); 297a47a12beSStefan Roese 298a47a12beSStefan Roese /* read data, this generates ECC error */ 299a47a12beSStefan Roese ppcDWload((u32 *) i, ret); 300a47a12beSStefan Roese __asm__ __volatile__("sync"); 301a47a12beSStefan Roese 302a47a12beSStefan Roese /* re-initialize memory, double word write the location again, 303a47a12beSStefan Roese * generates new ECC code this time */ 304a47a12beSStefan Roese ppcDWstore((u32 *) i, writeback); 305a47a12beSStefan Roese __asm__ __volatile__("sync"); 306a47a12beSStefan Roese } 307a47a12beSStefan Roese enable_interrupts(); 308a47a12beSStefan Roese return 0; 309a47a12beSStefan Roese } 310a47a12beSStefan Roese if (strcmp(argv[1], "testword") == 0) { 311a47a12beSStefan Roese addr = (u64 *) simple_strtoul(argv[2], NULL, 16); 312a47a12beSStefan Roese count = simple_strtoul(argv[3], NULL, 16); 313a47a12beSStefan Roese 314a47a12beSStefan Roese if ((u32) addr % 8) { 315a47a12beSStefan Roese printf("Address not alligned on " 316a47a12beSStefan Roese "double word boundary\n"); 317a47a12beSStefan Roese return 1; 318a47a12beSStefan Roese } 319a47a12beSStefan Roese disable_interrupts(); 320a47a12beSStefan Roese 321a47a12beSStefan Roese for (i = addr; i < addr + count; i++) { 322a47a12beSStefan Roese 323a47a12beSStefan Roese /* enable injects */ 324a47a12beSStefan Roese ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN; 325a47a12beSStefan Roese __asm__ __volatile__("sync"); 326a47a12beSStefan Roese __asm__ __volatile__("isync"); 327a47a12beSStefan Roese 328a47a12beSStefan Roese /* write memory location injecting errors */ 329a47a12beSStefan Roese *(u32 *) i = 0xfedcba98UL; 330a47a12beSStefan Roese __asm__ __volatile__("sync"); 331a47a12beSStefan Roese 332a47a12beSStefan Roese /* sub double word write, 333a47a12beSStefan Roese * bus will read-modify-write, 334a47a12beSStefan Roese * generates ECC error */ 335a47a12beSStefan Roese *((u32 *) i + 1) = 0x76543210UL; 336a47a12beSStefan Roese __asm__ __volatile__("sync"); 337a47a12beSStefan Roese 338a47a12beSStefan Roese /* disable injects */ 339a47a12beSStefan Roese ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN; 340a47a12beSStefan Roese __asm__ __volatile__("sync"); 341a47a12beSStefan Roese __asm__ __volatile__("isync"); 342a47a12beSStefan Roese 343a47a12beSStefan Roese /* re-initialize memory, 344a47a12beSStefan Roese * double word write the location again, 345a47a12beSStefan Roese * generates new ECC code this time */ 346a47a12beSStefan Roese ppcDWstore((u32 *) i, writeback); 347a47a12beSStefan Roese __asm__ __volatile__("sync"); 348a47a12beSStefan Roese } 349a47a12beSStefan Roese enable_interrupts(); 350a47a12beSStefan Roese return 0; 351a47a12beSStefan Roese } 352a47a12beSStefan Roese } 353a47a12beSStefan Roese cmd_usage(cmdtp); 354a47a12beSStefan Roese return 1; 355a47a12beSStefan Roese } 356a47a12beSStefan Roese 357a47a12beSStefan Roese U_BOOT_CMD(ecc, 4, 0, do_ecc, 358a47a12beSStefan Roese "support for DDR ECC features", 359a47a12beSStefan Roese "status - print out status info\n" 360a47a12beSStefan Roese "ecc captureclear - clear capture regs data\n" 361a47a12beSStefan Roese "ecc sbecnt <val> - set Single-Bit Error counter\n" 362a47a12beSStefan Roese "ecc sbethr <val> - set Single-Bit Threshold\n" 363a47a12beSStefan Roese "ecc errdisable <flag> - clear/set disable Memory Error Disable, flag:\n" 364a47a12beSStefan Roese " [-|+]sbe - Single-Bit Error\n" 365a47a12beSStefan Roese " [-|+]mbe - Multiple-Bit Error\n" 366a47a12beSStefan Roese " [-|+]mse - Memory Select Error\n" 367a47a12beSStefan Roese " [-|+]all - all errors\n" 368a47a12beSStefan Roese "ecc errdetectclr <flag> - clear Memory Error Detect, flag:\n" 369a47a12beSStefan Roese " mme - Multiple Memory Errors\n" 370a47a12beSStefan Roese " sbe - Single-Bit Error\n" 371a47a12beSStefan Roese " mbe - Multiple-Bit Error\n" 372a47a12beSStefan Roese " mse - Memory Select Error\n" 373a47a12beSStefan Roese " all - all errors\n" 374a47a12beSStefan Roese "ecc injectdatahi <hi> - set Memory Data Path Error Injection Mask High\n" 375a47a12beSStefan Roese "ecc injectdatalo <lo> - set Memory Data Path Error Injection Mask Low\n" 376a47a12beSStefan Roese "ecc injectecc <ecc> - set ECC Error Injection Mask\n" 377a47a12beSStefan Roese "ecc inject <en|dis> - enable/disable error injection\n" 378a47a12beSStefan Roese "ecc mirror <en|dis> - enable/disable mirror byte\n" 379a47a12beSStefan Roese "ecc testdw <addr> <cnt> - test mem region with double word access:\n" 380a47a12beSStefan Roese " - enables injects\n" 381a47a12beSStefan Roese " - writes pattern injecting errors with double word access\n" 382a47a12beSStefan Roese " - disables injects\n" 383a47a12beSStefan Roese " - reads pattern back with double word access, generates error\n" 384a47a12beSStefan Roese " - re-inits memory\n" 385a47a12beSStefan Roese "ecc testword <addr> <cnt> - test mem region with word access:\n" 386a47a12beSStefan Roese " - enables injects\n" 387a47a12beSStefan Roese " - writes pattern injecting errors with word access\n" 388a47a12beSStefan Roese " - writes pattern with word access, generates error\n" 389a47a12beSStefan Roese " - disables injects\n" " - re-inits memory"); 390a47a12beSStefan Roese #endif 391