xref: /openbmc/u-boot/arch/powerpc/cpu/mpc83xx/Makefile (revision 702e6014) 
1#
2# (C) Copyright 2006
3# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
5# Copyright 2004 Freescale Semiconductor, Inc.
6#
7# See file CREDITS for list of people who contributed to this
8# project.
9#
10# This program is free software; you can redistribute it and/or
11# modify it under the terms of the GNU General Public License as
12# published by the Free Software Foundation; either version 2 of
13# the License, or (at your option) any later version.
14#
15# This program is distributed in the hope that it will be useful,
16# but WITHOUT ANY WARRANTY; without even the implied warranty of
17# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18# GNU General Public License for more details.
19#
20# You should have received a copy of the GNU General Public License
21# along with this program; if not, write to the Free Software
22# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23# MA 02111-1307 USA
24#
25
26include $(TOPDIR)/config.mk
27
28LIB	= $(obj)lib$(CPU).o
29
30START	= start.o
31
32COBJS-y += traps.o
33COBJS-y += cpu.o
34COBJS-y += cpu_init.o
35COBJS-y += speed.o
36COBJS-y += interrupts.o
37COBJS-y += ecc.o
38COBJS-$(CONFIG_QE) += qe_io.o
39COBJS-$(CONFIG_FSL_SERDES) += serdes.o
40COBJS-$(CONFIG_PCI) += pci.o
41COBJS-$(CONFIG_PCIE) += pcie.o
42COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
43
44# Stub implementations of cache management functions for USB
45COBJS-$(CONFIG_USB_EHCI) += cache.o
46
47ifdef CONFIG_FSL_DDR2
48COBJS_LN-$(CONFIG_MPC8349) += ddr-gen2.o
49else
50COBJS-y += spd_sdram.o
51endif
52COBJS-$(CONFIG_FSL_DDR2) += law.o
53
54COBJS	:= $(COBJS-y)
55SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix $(obj),$(COBJS_LN-y:.o=.c))
56OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS_LN-y))
57START	:= $(addprefix $(obj),$(START))
58
59all:	$(obj).depend $(START) $(LIB)
60
61$(LIB):	$(OBJS)
62	$(call cmd_link_o_target, $(OBJS))
63
64$(obj)ddr-gen1.c:
65	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen1.c $(obj)ddr-gen1.c
66
67$(obj)ddr-gen2.c:
68	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen2.c $(obj)ddr-gen2.c
69
70$(obj)ddr-gen3.c:
71	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen3.c $(obj)ddr-gen3.c
72
73#########################################################################
74
75# defines $(obj).depend target
76include $(SRCTREE)/rules.mk
77
78sinclude $(obj).depend
79
80#########################################################################
81