1 /* 2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com> 3 * Scott McNutt <smcnutt@psyent.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __ASM_NIOS2_IO_H_ 9 #define __ASM_NIOS2_IO_H_ 10 11 static inline void sync(void) 12 { 13 __asm__ __volatile__ ("sync" : : : "memory"); 14 } 15 16 /* 17 * Given a physical address and a length, return a virtual address 18 * that can be used to access the memory range with the caching 19 * properties specified by "flags". 20 */ 21 #define MAP_NOCACHE 1 22 #define MAP_WRCOMBINE 0 23 #define MAP_WRBACK 0 24 #define MAP_WRTHROUGH 0 25 26 static inline void * 27 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) 28 { 29 DECLARE_GLOBAL_DATA_PTR; 30 if (flags) 31 return (void *)(paddr | gd->arch.io_region_base); 32 else 33 return (void *)(paddr | gd->arch.mem_region_base); 34 } 35 36 /* 37 * Take down a mapping set up by map_physmem(). 38 */ 39 static inline void unmap_physmem(void *vaddr, unsigned long flags) 40 { 41 42 } 43 44 static inline phys_addr_t virt_to_phys(void * vaddr) 45 { 46 DECLARE_GLOBAL_DATA_PTR; 47 return (phys_addr_t)vaddr & gd->arch.physaddr_mask; 48 } 49 50 #define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) 51 #define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) 52 #define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) 53 54 #define __raw_readb(a) (*(volatile unsigned char *)(a)) 55 #define __raw_readw(a) (*(volatile unsigned short *)(a)) 56 #define __raw_readl(a) (*(volatile unsigned int *)(a)) 57 58 #define readb(addr)\ 59 ({unsigned char val;\ 60 asm volatile( "ldbio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) 61 #define readw(addr)\ 62 ({unsigned short val;\ 63 asm volatile( "ldhio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) 64 #define readl(addr)\ 65 ({unsigned long val;\ 66 asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) 67 68 #define writeb(val,addr)\ 69 asm volatile ("stbio %0, 0(%1)" : : "r" (val), "r" (addr)) 70 #define writew(val,addr)\ 71 asm volatile ("sthio %0, 0(%1)" : : "r" (val), "r" (addr)) 72 #define writel(val,addr)\ 73 asm volatile ("stwio %0, 0(%1)" : : "r" (val), "r" (addr)) 74 75 #define inb(addr) readb(addr) 76 #define inw(addr) readw(addr) 77 #define inl(addr) readl(addr) 78 #define outb(val, addr) writeb(val,addr) 79 #define outw(val, addr) writew(val,addr) 80 #define outl(val, addr) writel(val,addr) 81 82 static inline void insb (unsigned long port, void *dst, unsigned long count) 83 { 84 unsigned char *p = dst; 85 while (count--) *p++ = inb (port); 86 } 87 static inline void insw (unsigned long port, void *dst, unsigned long count) 88 { 89 unsigned short *p = dst; 90 while (count--) *p++ = inw (port); 91 } 92 static inline void insl (unsigned long port, void *dst, unsigned long count) 93 { 94 unsigned long *p = dst; 95 while (count--) *p++ = inl (port); 96 } 97 98 static inline void outsb (unsigned long port, const void *src, unsigned long count) 99 { 100 const unsigned char *p = src; 101 while (count--) outb (*p++, port); 102 } 103 104 static inline void outsw (unsigned long port, const void *src, unsigned long count) 105 { 106 const unsigned short *p = src; 107 while (count--) outw (*p++, port); 108 } 109 static inline void outsl (unsigned long port, const void *src, unsigned long count) 110 { 111 const unsigned long *p = src; 112 while (count--) outl (*p++, port); 113 } 114 115 /* 116 * Clear and set bits in one shot. These macros can be used to clear and 117 * set multiple bits in a register using a single call. These macros can 118 * also be used to set a multiple-bit bit pattern using a mask, by 119 * specifying the mask in the 'clear' parameter and the new bit pattern 120 * in the 'set' parameter. 121 */ 122 123 #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a) 124 #define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a)) 125 126 #define out_le32(a,v) out_arch(l,le32,a,v) 127 #define out_le16(a,v) out_arch(w,le16,a,v) 128 129 #define in_le32(a) in_arch(l,le32,a) 130 #define in_le16(a) in_arch(w,le16,a) 131 132 #define out_be32(a,v) out_arch(l,be32,a,v) 133 #define out_be16(a,v) out_arch(w,be16,a,v) 134 135 #define in_be32(a) in_arch(l,be32,a) 136 #define in_be16(a) in_arch(w,be16,a) 137 138 #define out_8(a,v) __raw_writeb(v,a) 139 #define in_8(a) __raw_readb(a) 140 141 #define clrbits(type, addr, clear) \ 142 out_##type((addr), in_##type(addr) & ~(clear)) 143 144 #define setbits(type, addr, set) \ 145 out_##type((addr), in_##type(addr) | (set)) 146 147 #define clrsetbits(type, addr, clear, set) \ 148 out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) 149 150 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) 151 #define setbits_be32(addr, set) setbits(be32, addr, set) 152 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 153 154 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) 155 #define setbits_le32(addr, set) setbits(le32, addr, set) 156 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 157 158 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) 159 #define setbits_be16(addr, set) setbits(be16, addr, set) 160 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) 161 162 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) 163 #define setbits_le16(addr, set) setbits(le16, addr, set) 164 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) 165 166 #define clrbits_8(addr, clear) clrbits(8, addr, clear) 167 #define setbits_8(addr, set) setbits(8, addr, set) 168 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 169 170 #define memset_io(a, b, c) memset((void *)(a), (b), (c)) 171 #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) 172 #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) 173 174 #endif /* __ASM_NIOS2_IO_H_ */ 175