1 /* 2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com> 3 * Scott McNutt <smcnutt@psyent.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __ASM_NIOS2_IO_H_ 9 #define __ASM_NIOS2_IO_H_ 10 11 static inline void sync(void) 12 { 13 __asm__ __volatile__ ("sync" : : : "memory"); 14 } 15 16 /* 17 * Given a physical address and a length, return a virtual address 18 * that can be used to access the memory range with the caching 19 * properties specified by "flags". 20 */ 21 #define MAP_NOCACHE (0) 22 #define MAP_WRCOMBINE (0) 23 #define MAP_WRBACK (0) 24 #define MAP_WRTHROUGH (0) 25 26 static inline void * 27 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) 28 { 29 return (void *)paddr; 30 } 31 32 /* 33 * Take down a mapping set up by map_physmem(). 34 */ 35 static inline void unmap_physmem(void *vaddr, unsigned long flags) 36 { 37 38 } 39 40 static inline phys_addr_t virt_to_phys(void * vaddr) 41 { 42 return (phys_addr_t)(vaddr); 43 } 44 45 static inline void *ioremap(unsigned long physaddr, unsigned long size) 46 { 47 return (void *)(IO_REGION_BASE | physaddr); 48 } 49 50 extern unsigned char inb (unsigned char *port); 51 extern unsigned short inw (unsigned short *port); 52 extern unsigned inl (unsigned port); 53 54 #define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) 55 #define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) 56 #define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) 57 58 #define __raw_readb(a) (*(volatile unsigned char *)(a)) 59 #define __raw_readw(a) (*(volatile unsigned short *)(a)) 60 #define __raw_readl(a) (*(volatile unsigned int *)(a)) 61 62 #define readb(addr)\ 63 ({unsigned char val;\ 64 asm volatile( "ldbio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) 65 #define readw(addr)\ 66 ({unsigned short val;\ 67 asm volatile( "ldhio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) 68 #define readl(addr)\ 69 ({unsigned long val;\ 70 asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) 71 72 #define writeb(val,addr)\ 73 asm volatile ("stbio %0, 0(%1)" : : "r" (val), "r" (addr)) 74 #define writew(val,addr)\ 75 asm volatile ("sthio %0, 0(%1)" : : "r" (val), "r" (addr)) 76 #define writel(val,addr)\ 77 asm volatile ("stwio %0, 0(%1)" : : "r" (val), "r" (addr)) 78 79 #define inb(addr) readb(addr) 80 #define inw(addr) readw(addr) 81 #define inl(addr) readl(addr) 82 #define outb(val, addr) writeb(val,addr) 83 #define outw(val, addr) writew(val,addr) 84 #define outl(val, addr) writel(val,addr) 85 86 static inline void insb (unsigned long port, void *dst, unsigned long count) 87 { 88 unsigned char *p = dst; 89 while (count--) *p++ = inb (port); 90 } 91 static inline void insw (unsigned long port, void *dst, unsigned long count) 92 { 93 unsigned short *p = dst; 94 while (count--) *p++ = inw (port); 95 } 96 static inline void insl (unsigned long port, void *dst, unsigned long count) 97 { 98 unsigned long *p = dst; 99 while (count--) *p++ = inl (port); 100 } 101 102 static inline void outsb (unsigned long port, const void *src, unsigned long count) 103 { 104 const unsigned char *p = src; 105 while (count--) outb (*p++, port); 106 } 107 108 static inline void outsw (unsigned long port, const void *src, unsigned long count) 109 { 110 const unsigned short *p = src; 111 while (count--) outw (*p++, port); 112 } 113 static inline void outsl (unsigned long port, const void *src, unsigned long count) 114 { 115 const unsigned long *p = src; 116 while (count--) outl (*p++, port); 117 } 118 119 #endif /* __ASM_NIOS2_IO_H_ */ 120