xref: /openbmc/u-boot/arch/nios2/include/asm/io.h (revision 21ff7344)
1 /*
2  * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
3  * Scott McNutt <smcnutt@psyent.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __ASM_NIOS2_IO_H_
9 #define __ASM_NIOS2_IO_H_
10 
11 static inline void sync(void)
12 {
13 	__asm__ __volatile__ ("sync" : : : "memory");
14 }
15 
16 /*
17  * Given a physical address and a length, return a virtual address
18  * that can be used to access the memory range with the caching
19  * properties specified by "flags".
20  */
21 #define MAP_NOCACHE	(0)
22 #define MAP_WRCOMBINE	(0)
23 #define MAP_WRBACK	(0)
24 #define MAP_WRTHROUGH	(0)
25 
26 static inline void *
27 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
28 {
29 	return (void *)paddr;
30 }
31 
32 /*
33  * Take down a mapping set up by map_physmem().
34  */
35 static inline void unmap_physmem(void *vaddr, unsigned long flags)
36 {
37 
38 }
39 
40 static inline phys_addr_t virt_to_phys(void * vaddr)
41 {
42 	return (phys_addr_t)(vaddr);
43 }
44 
45 static inline void *ioremap(unsigned long physaddr, unsigned long size)
46 {
47 	DECLARE_GLOBAL_DATA_PTR;
48 	return (void *)(gd->arch.io_region_base | physaddr);
49 }
50 
51 #define __raw_writeb(v,a)       (*(volatile unsigned char  *)(a) = (v))
52 #define __raw_writew(v,a)       (*(volatile unsigned short *)(a) = (v))
53 #define __raw_writel(v,a)       (*(volatile unsigned int   *)(a) = (v))
54 
55 #define __raw_readb(a)          (*(volatile unsigned char  *)(a))
56 #define __raw_readw(a)          (*(volatile unsigned short *)(a))
57 #define __raw_readl(a)          (*(volatile unsigned int   *)(a))
58 
59 #define readb(addr)\
60 	({unsigned char val;\
61 	 asm volatile( "ldbio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
62 #define readw(addr)\
63 	({unsigned short val;\
64 	 asm volatile( "ldhio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
65 #define readl(addr)\
66 	({unsigned long val;\
67 	 asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
68 
69 #define writeb(val,addr)\
70 	asm volatile ("stbio %0, 0(%1)" : : "r" (val), "r" (addr))
71 #define writew(val,addr)\
72 	asm volatile ("sthio %0, 0(%1)" : : "r" (val), "r" (addr))
73 #define writel(val,addr)\
74 	asm volatile ("stwio %0, 0(%1)" : : "r" (val), "r" (addr))
75 
76 #define inb(addr)	readb(addr)
77 #define inw(addr)	readw(addr)
78 #define inl(addr)	readl(addr)
79 #define outb(val, addr)	writeb(val,addr)
80 #define outw(val, addr)	writew(val,addr)
81 #define outl(val, addr)	writel(val,addr)
82 
83 static inline void insb (unsigned long port, void *dst, unsigned long count)
84 {
85 	unsigned char *p = dst;
86 	while (count--) *p++ = inb (port);
87 }
88 static inline void insw (unsigned long port, void *dst, unsigned long count)
89 {
90 	unsigned short *p = dst;
91 	while (count--) *p++ = inw (port);
92 }
93 static inline void insl (unsigned long port, void *dst, unsigned long count)
94 {
95 	unsigned long *p = dst;
96 	while (count--) *p++ = inl (port);
97 }
98 
99 static inline void outsb (unsigned long port, const void *src, unsigned long count)
100 {
101 	const unsigned char *p = src;
102 	while (count--) outb (*p++, port);
103 }
104 
105 static inline void outsw (unsigned long port, const void *src, unsigned long count)
106 {
107 	const unsigned short *p = src;
108 	while (count--) outw (*p++, port);
109 }
110 static inline void outsl (unsigned long port, const void *src, unsigned long count)
111 {
112 	const unsigned long *p = src;
113 	while (count--) outl (*p++, port);
114 }
115 
116 /*
117  * Clear and set bits in one shot. These macros can be used to clear and
118  * set multiple bits in a register using a single call. These macros can
119  * also be used to set a multiple-bit bit pattern using a mask, by
120  * specifying the mask in the 'clear' parameter and the new bit pattern
121  * in the 'set' parameter.
122  */
123 
124 #define out_arch(type,endian,a,v)	__raw_write##type(cpu_to_##endian(v),a)
125 #define in_arch(type,endian,a)		endian##_to_cpu(__raw_read##type(a))
126 
127 #define out_le32(a,v)	out_arch(l,le32,a,v)
128 #define out_le16(a,v)	out_arch(w,le16,a,v)
129 
130 #define in_le32(a)	in_arch(l,le32,a)
131 #define in_le16(a)	in_arch(w,le16,a)
132 
133 #define out_be32(a,v)	out_arch(l,be32,a,v)
134 #define out_be16(a,v)	out_arch(w,be16,a,v)
135 
136 #define in_be32(a)	in_arch(l,be32,a)
137 #define in_be16(a)	in_arch(w,be16,a)
138 
139 #define out_8(a,v)	__raw_writeb(v,a)
140 #define in_8(a)		__raw_readb(a)
141 
142 #define clrbits(type, addr, clear) \
143 	out_##type((addr), in_##type(addr) & ~(clear))
144 
145 #define setbits(type, addr, set) \
146 	out_##type((addr), in_##type(addr) | (set))
147 
148 #define clrsetbits(type, addr, clear, set) \
149 	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
150 
151 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
152 #define setbits_be32(addr, set) setbits(be32, addr, set)
153 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
154 
155 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
156 #define setbits_le32(addr, set) setbits(le32, addr, set)
157 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
158 
159 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
160 #define setbits_be16(addr, set) setbits(be16, addr, set)
161 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
162 
163 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
164 #define setbits_le16(addr, set) setbits(le16, addr, set)
165 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
166 
167 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
168 #define setbits_8(addr, set) setbits(8, addr, set)
169 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
170 
171 #endif /* __ASM_NIOS2_IO_H_ */
172