1 /* 2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com> 3 * Scott McNutt <smcnutt@psyent.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __ASM_NIOS2_IO_H_ 9 #define __ASM_NIOS2_IO_H_ 10 11 static inline void sync(void) 12 { 13 __asm__ __volatile__ ("sync" : : : "memory"); 14 } 15 16 /* 17 * Given a physical address and a length, return a virtual address 18 * that can be used to access the memory range with the caching 19 * properties specified by "flags". 20 */ 21 #define MAP_NOCACHE 1 22 #define MAP_WRCOMBINE 0 23 #define MAP_WRBACK 0 24 #define MAP_WRTHROUGH 0 25 26 static inline void * 27 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) 28 { 29 DECLARE_GLOBAL_DATA_PTR; 30 if (flags) 31 return (void *)(paddr | gd->arch.io_region_base); 32 else 33 return (void *)(paddr | gd->arch.mem_region_base); 34 } 35 36 /* 37 * Take down a mapping set up by map_physmem(). 38 */ 39 static inline void unmap_physmem(void *vaddr, unsigned long flags) 40 { 41 42 } 43 44 static inline phys_addr_t virt_to_phys(void * vaddr) 45 { 46 DECLARE_GLOBAL_DATA_PTR; 47 return (phys_addr_t)vaddr & gd->arch.physaddr_mask; 48 } 49 50 static inline void *ioremap(unsigned long physaddr, unsigned long size) 51 { 52 DECLARE_GLOBAL_DATA_PTR; 53 return (void *)(gd->arch.io_region_base | physaddr); 54 } 55 56 #define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) 57 #define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) 58 #define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v)) 59 60 #define __raw_readb(a) (*(volatile unsigned char *)(a)) 61 #define __raw_readw(a) (*(volatile unsigned short *)(a)) 62 #define __raw_readl(a) (*(volatile unsigned int *)(a)) 63 64 #define readb(addr)\ 65 ({unsigned char val;\ 66 asm volatile( "ldbio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) 67 #define readw(addr)\ 68 ({unsigned short val;\ 69 asm volatile( "ldhio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) 70 #define readl(addr)\ 71 ({unsigned long val;\ 72 asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;}) 73 74 #define writeb(val,addr)\ 75 asm volatile ("stbio %0, 0(%1)" : : "r" (val), "r" (addr)) 76 #define writew(val,addr)\ 77 asm volatile ("sthio %0, 0(%1)" : : "r" (val), "r" (addr)) 78 #define writel(val,addr)\ 79 asm volatile ("stwio %0, 0(%1)" : : "r" (val), "r" (addr)) 80 81 #define inb(addr) readb(addr) 82 #define inw(addr) readw(addr) 83 #define inl(addr) readl(addr) 84 #define outb(val, addr) writeb(val,addr) 85 #define outw(val, addr) writew(val,addr) 86 #define outl(val, addr) writel(val,addr) 87 88 static inline void insb (unsigned long port, void *dst, unsigned long count) 89 { 90 unsigned char *p = dst; 91 while (count--) *p++ = inb (port); 92 } 93 static inline void insw (unsigned long port, void *dst, unsigned long count) 94 { 95 unsigned short *p = dst; 96 while (count--) *p++ = inw (port); 97 } 98 static inline void insl (unsigned long port, void *dst, unsigned long count) 99 { 100 unsigned long *p = dst; 101 while (count--) *p++ = inl (port); 102 } 103 104 static inline void outsb (unsigned long port, const void *src, unsigned long count) 105 { 106 const unsigned char *p = src; 107 while (count--) outb (*p++, port); 108 } 109 110 static inline void outsw (unsigned long port, const void *src, unsigned long count) 111 { 112 const unsigned short *p = src; 113 while (count--) outw (*p++, port); 114 } 115 static inline void outsl (unsigned long port, const void *src, unsigned long count) 116 { 117 const unsigned long *p = src; 118 while (count--) outl (*p++, port); 119 } 120 121 /* 122 * Clear and set bits in one shot. These macros can be used to clear and 123 * set multiple bits in a register using a single call. These macros can 124 * also be used to set a multiple-bit bit pattern using a mask, by 125 * specifying the mask in the 'clear' parameter and the new bit pattern 126 * in the 'set' parameter. 127 */ 128 129 #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a) 130 #define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a)) 131 132 #define out_le32(a,v) out_arch(l,le32,a,v) 133 #define out_le16(a,v) out_arch(w,le16,a,v) 134 135 #define in_le32(a) in_arch(l,le32,a) 136 #define in_le16(a) in_arch(w,le16,a) 137 138 #define out_be32(a,v) out_arch(l,be32,a,v) 139 #define out_be16(a,v) out_arch(w,be16,a,v) 140 141 #define in_be32(a) in_arch(l,be32,a) 142 #define in_be16(a) in_arch(w,be16,a) 143 144 #define out_8(a,v) __raw_writeb(v,a) 145 #define in_8(a) __raw_readb(a) 146 147 #define clrbits(type, addr, clear) \ 148 out_##type((addr), in_##type(addr) & ~(clear)) 149 150 #define setbits(type, addr, set) \ 151 out_##type((addr), in_##type(addr) | (set)) 152 153 #define clrsetbits(type, addr, clear, set) \ 154 out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) 155 156 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) 157 #define setbits_be32(addr, set) setbits(be32, addr, set) 158 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 159 160 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) 161 #define setbits_le32(addr, set) setbits(le32, addr, set) 162 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 163 164 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) 165 #define setbits_be16(addr, set) setbits(be16, addr, set) 166 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) 167 168 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) 169 #define setbits_le16(addr, set) setbits(le16, addr, set) 170 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) 171 172 #define clrbits_8(addr, clear) clrbits(8, addr, clear) 173 #define setbits_8(addr, set) setbits(8, addr, set) 174 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 175 176 #define memset_io(a, b, c) memset((void *)(a), (b), (c)) 177 #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) 178 #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) 179 180 #endif /* __ASM_NIOS2_IO_H_ */ 181