1*c93adc08Smaxims@google.com /* 2*c93adc08Smaxims@google.com * Copyright 2017 Google, Inc 3*c93adc08Smaxims@google.com * 4*c93adc08Smaxims@google.com * SPDX-License-Identifier: GPL-2.0+ 5*c93adc08Smaxims@google.com */ 6*c93adc08Smaxims@google.com 7*c93adc08Smaxims@google.com #ifndef _ABI_MACH_ASPEED_AST2500_RESET_H_ 8*c93adc08Smaxims@google.com #define _ABI_MACH_ASPEED_AST2500_RESET_H_ 9*c93adc08Smaxims@google.com 10*c93adc08Smaxims@google.com /* 11*c93adc08Smaxims@google.com * The values are intentionally layed out as flags in 12*c93adc08Smaxims@google.com * WDT reset parameter. 13*c93adc08Smaxims@google.com */ 14*c93adc08Smaxims@google.com 15*c93adc08Smaxims@google.com #define AST_RESET_SOC 0 16*c93adc08Smaxims@google.com #define AST_RESET_CHIP 1 17*c93adc08Smaxims@google.com #define AST_RESET_CPU (1 << 1) 18*c93adc08Smaxims@google.com #define AST_RESET_ARM (1 << 2) 19*c93adc08Smaxims@google.com #define AST_RESET_COPROC (1 << 3) 20*c93adc08Smaxims@google.com #define AST_RESET_SDRAM (1 << 4) 21*c93adc08Smaxims@google.com #define AST_RESET_AHB (1 << 5) 22*c93adc08Smaxims@google.com #define AST_RESET_I2C (1 << 6) 23*c93adc08Smaxims@google.com #define AST_RESET_MAC1 (1 << 7) 24*c93adc08Smaxims@google.com #define AST_RESET_MAC2 (1 << 8) 25*c93adc08Smaxims@google.com #define AST_RESET_GCRT (1 << 9) 26*c93adc08Smaxims@google.com #define AST_RESET_USB20 (1 << 10) 27*c93adc08Smaxims@google.com #define AST_RESET_USB11_HOST (1 << 11) 28*c93adc08Smaxims@google.com #define AST_RESET_USB11_HID (1 << 12) 29*c93adc08Smaxims@google.com #define AST_RESET_VIDEO (1 << 13) 30*c93adc08Smaxims@google.com #define AST_RESET_HAC (1 << 14) 31*c93adc08Smaxims@google.com #define AST_RESET_LPC (1 << 15) 32*c93adc08Smaxims@google.com #define AST_RESET_SDIO (1 << 16) 33*c93adc08Smaxims@google.com #define AST_RESET_MIC (1 << 17) 34*c93adc08Smaxims@google.com #define AST_RESET_CRT2D (1 << 18) 35*c93adc08Smaxims@google.com #define AST_RESET_PWM (1 << 19) 36*c93adc08Smaxims@google.com #define AST_RESET_PECI (1 << 20) 37*c93adc08Smaxims@google.com #define AST_RESET_JTAG (1 << 21) 38*c93adc08Smaxims@google.com #define AST_RESET_ADC (1 << 22) 39*c93adc08Smaxims@google.com #define AST_RESET_GPIO (1 << 23) 40*c93adc08Smaxims@google.com #define AST_RESET_MCTP (1 << 24) 41*c93adc08Smaxims@google.com #define AST_RESET_XDMA (1 << 25) 42*c93adc08Smaxims@google.com #define AST_RESET_SPI (1 << 26) 43*c93adc08Smaxims@google.com #define AST_RESET_MISC (1 << 27) 44*c93adc08Smaxims@google.com 45*c93adc08Smaxims@google.com #endif /* _ABI_MACH_ASPEED_AST2500_RESET_H_ */ 46