1*2a1eade8SHiroyuki Yokoyama /* SPDX-License-Identifier: GPL-2.0 */ 2*2a1eade8SHiroyuki Yokoyama /* 3*2a1eade8SHiroyuki Yokoyama * Copyright (C) 2018 Renesas Electronics Corp. 4*2a1eade8SHiroyuki Yokoyama */ 5*2a1eade8SHiroyuki Yokoyama #ifndef __DT_BINDINGS_POWER_R8A77990_SYSC_H__ 6*2a1eade8SHiroyuki Yokoyama #define __DT_BINDINGS_POWER_R8A77990_SYSC_H__ 7*2a1eade8SHiroyuki Yokoyama 8*2a1eade8SHiroyuki Yokoyama /* 9*2a1eade8SHiroyuki Yokoyama * These power domain indices match the numbers of the interrupt bits 10*2a1eade8SHiroyuki Yokoyama * representing the power areas in the various Interrupt Registers 11*2a1eade8SHiroyuki Yokoyama * (e.g. SYSCISR, Interrupt Status Register) 12*2a1eade8SHiroyuki Yokoyama */ 13*2a1eade8SHiroyuki Yokoyama 14*2a1eade8SHiroyuki Yokoyama #define R8A77990_PD_CA53_CPU0 5 15*2a1eade8SHiroyuki Yokoyama #define R8A77990_PD_CA53_SCU 21 16*2a1eade8SHiroyuki Yokoyama 17*2a1eade8SHiroyuki Yokoyama /* Always-on power area */ 18*2a1eade8SHiroyuki Yokoyama #define R8A77990_PD_ALWAYS_ON 32 19*2a1eade8SHiroyuki Yokoyama 20*2a1eade8SHiroyuki Yokoyama #endif /* __DT_BINDINGS_POWER_R8A77990_SYSC_H__ */ 21