1*13b36facSJagan Teki /*
2*13b36facSJagan Teki  * Copyright 2016 Maxime Ripard
3*13b36facSJagan Teki  *
4*13b36facSJagan Teki  * Maxime Ripard <maxime.ripard@free-electrons.com>
5*13b36facSJagan Teki  *
6*13b36facSJagan Teki  * This program is free software; you can redistribute it and/or modify
7*13b36facSJagan Teki  * it under the terms of the GNU General Public License as published by
8*13b36facSJagan Teki  * the Free Software Foundation; either version 2 of the License, or
9*13b36facSJagan Teki  * (at your option) any later version.
10*13b36facSJagan Teki  *
11*13b36facSJagan Teki  * This program is distributed in the hope that it will be useful,
12*13b36facSJagan Teki  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13*13b36facSJagan Teki  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14*13b36facSJagan Teki  * GNU General Public License for more details.
15*13b36facSJagan Teki  */
16*13b36facSJagan Teki 
17*13b36facSJagan Teki #ifndef _DT_BINDINGS_CLK_SUN5I_H_
18*13b36facSJagan Teki #define _DT_BINDINGS_CLK_SUN5I_H_
19*13b36facSJagan Teki 
20*13b36facSJagan Teki #define CLK_HOSC		1
21*13b36facSJagan Teki 
22*13b36facSJagan Teki #define CLK_PLL_VIDEO0_2X	9
23*13b36facSJagan Teki 
24*13b36facSJagan Teki #define CLK_PLL_VIDEO1_2X	16
25*13b36facSJagan Teki #define CLK_CPU			17
26*13b36facSJagan Teki 
27*13b36facSJagan Teki #define CLK_AHB_OTG		23
28*13b36facSJagan Teki #define CLK_AHB_EHCI		24
29*13b36facSJagan Teki #define CLK_AHB_OHCI		25
30*13b36facSJagan Teki #define CLK_AHB_SS		26
31*13b36facSJagan Teki #define CLK_AHB_DMA		27
32*13b36facSJagan Teki #define CLK_AHB_BIST		28
33*13b36facSJagan Teki #define CLK_AHB_MMC0		29
34*13b36facSJagan Teki #define CLK_AHB_MMC1		30
35*13b36facSJagan Teki #define CLK_AHB_MMC2		31
36*13b36facSJagan Teki #define CLK_AHB_NAND		32
37*13b36facSJagan Teki #define CLK_AHB_SDRAM		33
38*13b36facSJagan Teki #define CLK_AHB_EMAC		34
39*13b36facSJagan Teki #define CLK_AHB_TS		35
40*13b36facSJagan Teki #define CLK_AHB_SPI0		36
41*13b36facSJagan Teki #define CLK_AHB_SPI1		37
42*13b36facSJagan Teki #define CLK_AHB_SPI2		38
43*13b36facSJagan Teki #define CLK_AHB_GPS		39
44*13b36facSJagan Teki #define CLK_AHB_HSTIMER		40
45*13b36facSJagan Teki #define CLK_AHB_VE		41
46*13b36facSJagan Teki #define CLK_AHB_TVE		42
47*13b36facSJagan Teki #define CLK_AHB_LCD		43
48*13b36facSJagan Teki #define CLK_AHB_CSI		44
49*13b36facSJagan Teki #define CLK_AHB_HDMI		45
50*13b36facSJagan Teki #define CLK_AHB_DE_BE		46
51*13b36facSJagan Teki #define CLK_AHB_DE_FE		47
52*13b36facSJagan Teki #define CLK_AHB_IEP		48
53*13b36facSJagan Teki #define CLK_AHB_GPU		49
54*13b36facSJagan Teki #define CLK_APB0_CODEC		50
55*13b36facSJagan Teki #define CLK_APB0_SPDIF		51
56*13b36facSJagan Teki #define CLK_APB0_I2S		52
57*13b36facSJagan Teki #define CLK_APB0_PIO		53
58*13b36facSJagan Teki #define CLK_APB0_IR		54
59*13b36facSJagan Teki #define CLK_APB0_KEYPAD		55
60*13b36facSJagan Teki #define CLK_APB1_I2C0		56
61*13b36facSJagan Teki #define CLK_APB1_I2C1		57
62*13b36facSJagan Teki #define CLK_APB1_I2C2		58
63*13b36facSJagan Teki #define CLK_APB1_UART0		59
64*13b36facSJagan Teki #define CLK_APB1_UART1		60
65*13b36facSJagan Teki #define CLK_APB1_UART2		61
66*13b36facSJagan Teki #define CLK_APB1_UART3		62
67*13b36facSJagan Teki #define CLK_NAND		63
68*13b36facSJagan Teki #define CLK_MMC0		64
69*13b36facSJagan Teki #define CLK_MMC1		65
70*13b36facSJagan Teki #define CLK_MMC2		66
71*13b36facSJagan Teki #define CLK_TS			67
72*13b36facSJagan Teki #define CLK_SS			68
73*13b36facSJagan Teki #define CLK_SPI0		69
74*13b36facSJagan Teki #define CLK_SPI1		70
75*13b36facSJagan Teki #define CLK_SPI2		71
76*13b36facSJagan Teki #define CLK_IR			72
77*13b36facSJagan Teki #define CLK_I2S			73
78*13b36facSJagan Teki #define CLK_SPDIF		74
79*13b36facSJagan Teki #define CLK_KEYPAD		75
80*13b36facSJagan Teki #define CLK_USB_OHCI		76
81*13b36facSJagan Teki #define CLK_USB_PHY0		77
82*13b36facSJagan Teki #define CLK_USB_PHY1		78
83*13b36facSJagan Teki #define CLK_GPS			79
84*13b36facSJagan Teki #define CLK_DRAM_VE		80
85*13b36facSJagan Teki #define CLK_DRAM_CSI		81
86*13b36facSJagan Teki #define CLK_DRAM_TS		82
87*13b36facSJagan Teki #define CLK_DRAM_TVE		83
88*13b36facSJagan Teki #define CLK_DRAM_DE_FE		84
89*13b36facSJagan Teki #define CLK_DRAM_DE_BE		85
90*13b36facSJagan Teki #define CLK_DRAM_ACE		86
91*13b36facSJagan Teki #define CLK_DRAM_IEP		87
92*13b36facSJagan Teki #define CLK_DE_BE		88
93*13b36facSJagan Teki #define CLK_DE_FE		89
94*13b36facSJagan Teki #define CLK_TCON_CH0		90
95*13b36facSJagan Teki 
96*13b36facSJagan Teki #define CLK_TCON_CH1		92
97*13b36facSJagan Teki #define CLK_CSI			93
98*13b36facSJagan Teki #define CLK_VE			94
99*13b36facSJagan Teki #define CLK_CODEC		95
100*13b36facSJagan Teki #define CLK_AVS			96
101*13b36facSJagan Teki #define CLK_HDMI		97
102*13b36facSJagan Teki #define CLK_GPU			98
103*13b36facSJagan Teki 
104*13b36facSJagan Teki #define CLK_IEP			100
105*13b36facSJagan Teki 
106*13b36facSJagan Teki #endif /* _DT_BINDINGS_CLK_SUN5I_H_ */
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