1*92aa0995SMarek Vasut /*
2*92aa0995SMarek Vasut  * Copyright (C) 2015 Renesas Electronics Corp.
3*92aa0995SMarek Vasut  *
4*92aa0995SMarek Vasut  * This program is free software; you can redistribute it and/or modify
5*92aa0995SMarek Vasut  * it under the terms of the GNU General Public License as published by
6*92aa0995SMarek Vasut  * the Free Software Foundation; either version 2 of the License, or
7*92aa0995SMarek Vasut  * (at your option) any later version.
8*92aa0995SMarek Vasut  */
9*92aa0995SMarek Vasut 
10*92aa0995SMarek Vasut #ifndef __DT_BINDINGS_CLOCK_R8A7793_CPG_MSSR_H__
11*92aa0995SMarek Vasut #define __DT_BINDINGS_CLOCK_R8A7793_CPG_MSSR_H__
12*92aa0995SMarek Vasut 
13*92aa0995SMarek Vasut #include <dt-bindings/clock/renesas-cpg-mssr.h>
14*92aa0995SMarek Vasut 
15*92aa0995SMarek Vasut /* r8a7793 CPG Core Clocks */
16*92aa0995SMarek Vasut #define R8A7793_CLK_Z			0
17*92aa0995SMarek Vasut #define R8A7793_CLK_ZG			1
18*92aa0995SMarek Vasut #define R8A7793_CLK_ZTR			2
19*92aa0995SMarek Vasut #define R8A7793_CLK_ZTRD2		3
20*92aa0995SMarek Vasut #define R8A7793_CLK_ZT			4
21*92aa0995SMarek Vasut #define R8A7793_CLK_ZX			5
22*92aa0995SMarek Vasut #define R8A7793_CLK_ZS			6
23*92aa0995SMarek Vasut #define R8A7793_CLK_HP			7
24*92aa0995SMarek Vasut #define R8A7793_CLK_I			8
25*92aa0995SMarek Vasut #define R8A7793_CLK_B			9
26*92aa0995SMarek Vasut #define R8A7793_CLK_LB			10
27*92aa0995SMarek Vasut #define R8A7793_CLK_P			11
28*92aa0995SMarek Vasut #define R8A7793_CLK_CL			12
29*92aa0995SMarek Vasut #define R8A7793_CLK_M2			13
30*92aa0995SMarek Vasut #define R8A7793_CLK_ADSP		14
31*92aa0995SMarek Vasut #define R8A7793_CLK_ZB3			15
32*92aa0995SMarek Vasut #define R8A7793_CLK_ZB3D2		16
33*92aa0995SMarek Vasut #define R8A7793_CLK_DDR			17
34*92aa0995SMarek Vasut #define R8A7793_CLK_SDH			18
35*92aa0995SMarek Vasut #define R8A7793_CLK_SD0			19
36*92aa0995SMarek Vasut #define R8A7793_CLK_SD2			20
37*92aa0995SMarek Vasut #define R8A7793_CLK_SD3			21
38*92aa0995SMarek Vasut #define R8A7793_CLK_MMC0		22
39*92aa0995SMarek Vasut #define R8A7793_CLK_MP			23
40*92aa0995SMarek Vasut #define R8A7793_CLK_SSP			24
41*92aa0995SMarek Vasut #define R8A7793_CLK_SSPRS		25
42*92aa0995SMarek Vasut #define R8A7793_CLK_QSPI		26
43*92aa0995SMarek Vasut #define R8A7793_CLK_CP			27
44*92aa0995SMarek Vasut #define R8A7793_CLK_RCAN		28
45*92aa0995SMarek Vasut #define R8A7793_CLK_R			29
46*92aa0995SMarek Vasut #define R8A7793_CLK_OSC			30
47*92aa0995SMarek Vasut 
48*92aa0995SMarek Vasut #endif /* __DT_BINDINGS_CLOCK_R8A7793_CPG_MSSR_H__ */
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