1/* 2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com> 3 * Scott McNutt <smcnutt@psyent.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8#include <asm-offsets.h> 9#include <config.h> 10#include <version.h> 11 12/* 13 * icache and dcache configuration used only for start.S. 14 * the values are chosen so that it will work for all configuration. 15 */ 16#define ICACHE_LINE_SIZE 32 /* fixed 32 */ 17#define ICACHE_SIZE_MAX 0x10000 /* 64k max */ 18#define DCACHE_LINE_SIZE_MIN 4 /* 4, 16, 32 */ 19#define DCACHE_SIZE_MAX 0x10000 /* 64k max */ 20 21 /* RESTART */ 22 .text 23 .global _start, _except_start, _except_end 24 25_start: 26 wrctl status, r0 /* Disable interrupts */ 27 /* 28 * ICACHE INIT -- only the icache line at the reset address 29 * is invalidated at reset. So the init must stay within 30 * the cache line size (8 words). If GERMS is used, we'll 31 * just be invalidating the cache a second time. If cache 32 * is not implemented initi behaves as nop. 33 */ 34 ori r4, r0, %lo(ICACHE_LINE_SIZE) 35 movhi r5, %hi(ICACHE_SIZE_MAX) 36 ori r5, r5, %lo(ICACHE_SIZE_MAX) 370: initi r5 38 sub r5, r5, r4 39 bgt r5, r0, 0b 40 br _except_end /* Skip the tramp */ 41 42 /* 43 * EXCEPTION TRAMPOLINE -- the following gets copied 44 * to the exception address (below), but is otherwise at the 45 * default exception vector offset (0x0020). 46 */ 47_except_start: 48 movhi et, %hi(_exception) 49 ori et, et, %lo(_exception) 50 jmp et 51_except_end: 52 53 /* 54 * INTERRUPTS -- for now, all interrupts masked and globally 55 * disabled. 56 */ 57 wrctl ienable, r0 /* All disabled */ 58 59 /* 60 * DCACHE INIT -- if dcache not implemented, initd behaves as 61 * nop. 62 */ 63 ori r4, r0, %lo(DCACHE_LINE_SIZE_MIN) 64 movhi r5, %hi(DCACHE_SIZE_MAX) 65 ori r5, r5, %lo(DCACHE_SIZE_MAX) 66 mov r6, r0 671: initd 0(r6) 68 add r6, r6, r4 69 bltu r6, r5, 1b 70 71 /* 72 * RELOCATE CODE, DATA & COMMAND TABLE -- the following code 73 * assumes code, data and the command table are all 74 * contiguous. This lets us relocate everything as a single 75 * block. Make sure the linker script matches this ;-) 76 */ 77 nextpc r4 78_cur: movhi r5, %hi(_cur - _start) 79 ori r5, r5, %lo(_cur - _start) 80 sub r4, r4, r5 /* r4 <- cur _start */ 81 mov r8, r4 82 movhi r5, %hi(_start) 83 ori r5, r5, %lo(_start) /* r5 <- linked _start */ 84 mov sp, r5 /* initial stack below u-boot code */ 85 beq r4, r5, 3f 86 87 movhi r6, %hi(CONFIG_SYS_MONITOR_LEN) 88 ori r6, r6, %lo(CONFIG_SYS_MONITOR_LEN) 89 add r6, r6, r5 902: ldwio r7, 0(r4) 91 addi r4, r4, 4 92 stwio r7, 0(r5) 93 addi r5, r5, 4 94 bne r5, r6, 2b 953: 96 97 /* JUMP TO RELOC ADDR */ 98 movhi r4, %hi(_reloc) 99 ori r4, r4, %lo(_reloc) 100 jmp r4 101_reloc: 102 103 /* STACK INIT -- zero top two words for call back chain. */ 104 addi sp, sp, -8 105 stw r0, 0(sp) 106 stw r0, 4(sp) 107 mov fp, sp 108 109#ifdef CONFIG_DEBUG_UART 110 /* Set up the debug UART */ 111 movhi r2, %hi(debug_uart_init@h) 112 ori r2, r2, %lo(debug_uart_init@h) 113 callr r2 114#endif 115 116 /* Allocate and initialize reserved area, update SP */ 117 mov r4, sp 118 movhi r2, %hi(board_init_f_alloc_reserve@h) 119 ori r2, r2, %lo(board_init_f_alloc_reserve@h) 120 callr r2 121 mov sp, r2 122 mov r4, sp 123 movhi r2, %hi(board_init_f_init_reserve@h) 124 ori r2, r2, %lo(board_init_f_init_reserve@h) 125 callr r2 126 127 /* Update frame-pointer */ 128 mov fp, sp 129 130 /* Call board_init_f -- never returns */ 131 mov r4, r0 132 movhi r2, %hi(board_init_f@h) 133 ori r2, r2, %lo(board_init_f@h) 134 callr r2 135 136 /* 137 * NEVER RETURNS -- but branch to the _start just 138 * in case ;-) 139 */ 140 br _start 141 142 /* 143 * relocate_code -- Nios2 handles the relocation above. But 144 * the generic board code monkeys with the heap, stack, etc. 145 * (it makes some assumptions that may not be appropriate 146 * for Nios). Nevertheless, we capitulate here. 147 * 148 * We'll call the board_init_r from here since this isn't 149 * supposed to return. 150 * 151 * void relocate_code (ulong sp, gd_t *global_data, 152 * ulong reloc_addr) 153 * __attribute__ ((noreturn)); 154 */ 155 .text 156 .global relocate_code 157 158relocate_code: 159 mov sp, r4 /* Set the new sp */ 160 mov r4, r5 161 162 /* 163 * ZERO BSS/SBSS -- bss and sbss are assumed to be adjacent 164 * and between __bss_start and __bss_end. 165 */ 166 movhi r5, %hi(__bss_start) 167 ori r5, r5, %lo(__bss_start) 168 movhi r6, %hi(__bss_end) 169 ori r6, r6, %lo(__bss_end) 170 beq r5, r6, 5f 171 1724: stw r0, 0(r5) 173 addi r5, r5, 4 174 bne r5, r6, 4b 1755: 176 177 movhi r8, %hi(board_init_r@h) 178 ori r8, r8, %lo(board_init_r@h) 179 callr r8 180 ret 181