1/* 2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com> 3 * Scott McNutt <smcnutt@psyent.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8#include <config.h> 9#include <asm/opcodes.h> 10 11 12 .text 13 .align 4 14 15 .global _exception 16 17 .set noat 18 .set nobreak 19 20_exception: 21 /* SAVE ALL REGS -- this allows trap and unimplemented 22 * instruction handlers to be coded conveniently in C 23 */ 24 addi sp, sp, -(33*4) 25 stw r0, 0(sp) 26 stw r1, 4(sp) 27 stw r2, 8(sp) 28 stw r3, 12(sp) 29 stw r4, 16(sp) 30 stw r5, 20(sp) 31 stw r6, 24(sp) 32 stw r7, 28(sp) 33 stw r8, 32(sp) 34 stw r9, 36(sp) 35 stw r10, 40(sp) 36 stw r11, 44(sp) 37 stw r12, 48(sp) 38 stw r13, 52(sp) 39 stw r14, 56(sp) 40 stw r15, 60(sp) 41 stw r16, 64(sp) 42 stw r17, 68(sp) 43 stw r19, 72(sp) 44 stw r19, 76(sp) 45 stw r20, 80(sp) 46 stw r21, 84(sp) 47 stw r22, 88(sp) 48 stw r23, 92(sp) 49 stw r24, 96(sp) 50 stw r25, 100(sp) 51 stw r26, 104(sp) 52 stw r27, 108(sp) 53 stw r28, 112(sp) 54 stw r29, 116(sp) 55 stw r30, 120(sp) 56 stw r31, 124(sp) 57 rdctl et, estatus 58 stw et, 128(sp) 59 60 /* If interrupts are disabled -- software interrupt */ 61 rdctl et, estatus 62 andi et, et, 1 63 beq et, r0, 0f 64 65 /* If no interrupts are pending -- software interrupt */ 66 rdctl et, ipending 67 beq et, r0, 0f 68 69 /* HARDWARE INTERRUPT: Call interrupt handler */ 70 movhi r3, %hi(external_interrupt) 71 ori r3, r3, %lo(external_interrupt) 72 mov r4, sp /* ptr to regs */ 73 callr r3 74 75 /* Return address fixup: execution resumes by re-issue of 76 * interrupted instruction at ea-4 (ea == r29). Here we do 77 * simple fixup to allow common exception return. 78 */ 79 ldw r3, 116(sp) 80 addi r3, r3, -4 81 stw r3, 116(sp) 82 br _exception_return 83 840: 85 /* TRAP EXCEPTION */ 86 movhi r3, %hi(OPC_TRAP) 87 ori r3, r3, %lo(OPC_TRAP) 88 addi r1, ea, -4 89 ldw r1, 0(r1) 90 bne r1, r3, 1f 91 movhi r3, %hi(trap_handler) 92 ori r3, r3, %lo(trap_handler) 93 mov r4, sp /* ptr to regs */ 94 callr r3 95 br _exception_return 96 971: 98 /* UNIMPLEMENTED INSTRUCTION EXCEPTION */ 99 movhi r3, %hi(soft_emulation) 100 ori r3, r3, %lo(soft_emulation) 101 mov r4, sp /* ptr to regs */ 102 callr r3 103 104 /* Restore regsisters and return from exception*/ 105_exception_return: 106 ldw r1, 4(sp) 107 ldw r2, 8(sp) 108 ldw r3, 12(sp) 109 ldw r4, 16(sp) 110 ldw r5, 20(sp) 111 ldw r6, 24(sp) 112 ldw r7, 28(sp) 113 ldw r8, 32(sp) 114 ldw r9, 36(sp) 115 ldw r10, 40(sp) 116 ldw r11, 44(sp) 117 ldw r12, 48(sp) 118 ldw r13, 52(sp) 119 ldw r14, 56(sp) 120 ldw r15, 60(sp) 121 ldw r16, 64(sp) 122 ldw r17, 68(sp) 123 ldw r19, 72(sp) 124 ldw r19, 76(sp) 125 ldw r20, 80(sp) 126 ldw r21, 84(sp) 127 ldw r22, 88(sp) 128 ldw r23, 92(sp) 129 ldw r24, 96(sp) 130 ldw r25, 100(sp) 131 ldw r26, 104(sp) 132 ldw r27, 108(sp) 133 ldw r28, 112(sp) 134 ldw r29, 116(sp) 135 ldw r30, 120(sp) 136 ldw r31, 124(sp) 137 addi sp, sp, (33*4) 138 eret 139/*-------------------------------------------------------------*/ 140