1 /* 2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com> 3 * Scott McNutt <smcnutt@psyent.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <cpu.h> 10 #include <dm.h> 11 #include <errno.h> 12 #include <asm/cache.h> 13 14 DECLARE_GLOBAL_DATA_PTR; 15 16 #ifdef CONFIG_DISPLAY_CPUINFO 17 int print_cpuinfo(void) 18 { 19 printf("CPU: Nios-II\n"); 20 return 0; 21 } 22 #endif /* CONFIG_DISPLAY_CPUINFO */ 23 24 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 25 { 26 disable_interrupts(); 27 /* indirect call to go beyond 256MB limitation of toolchain */ 28 nios2_callr(gd->arch.reset_addr); 29 return 0; 30 } 31 32 /* 33 * COPY EXCEPTION TRAMPOLINE -- copy the tramp to the 34 * exception address. Define CONFIG_ROM_STUBS to prevent 35 * the copy (e.g. exception in flash or in other 36 * softare/firmware component). 37 */ 38 #ifndef CONFIG_ROM_STUBS 39 static void copy_exception_trampoline(void) 40 { 41 extern int _except_start, _except_end; 42 void *except_target = (void *)gd->arch.exception_addr; 43 44 if (&_except_start != except_target) { 45 memcpy(except_target, &_except_start, 46 &_except_end - &_except_start); 47 flush_cache(gd->arch.exception_addr, 48 &_except_end - &_except_start); 49 } 50 } 51 #endif 52 53 int arch_cpu_init_dm(void) 54 { 55 struct udevice *dev; 56 int ret; 57 58 ret = uclass_first_device(UCLASS_CPU, &dev); 59 if (ret) 60 return ret; 61 if (!dev) 62 return -ENODEV; 63 64 gd->ram_size = CONFIG_SYS_SDRAM_SIZE; 65 #ifndef CONFIG_ROM_STUBS 66 copy_exception_trampoline(); 67 #endif 68 69 return 0; 70 } 71 72 static int altera_nios2_get_desc(struct udevice *dev, char *buf, int size) 73 { 74 const char *cpu_name = "Nios-II"; 75 76 if (size < strlen(cpu_name)) 77 return -ENOSPC; 78 strcpy(buf, cpu_name); 79 80 return 0; 81 } 82 83 static int altera_nios2_get_info(struct udevice *dev, struct cpu_info *info) 84 { 85 info->cpu_freq = gd->cpu_clk; 86 info->features = (1 << CPU_FEAT_L1_CACHE) | 87 (gd->arch.has_mmu ? (1 << CPU_FEAT_MMU) : 0); 88 89 return 0; 90 } 91 92 static int altera_nios2_get_count(struct udevice *dev) 93 { 94 return 1; 95 } 96 97 static int altera_nios2_probe(struct udevice *dev) 98 { 99 const void *blob = gd->fdt_blob; 100 int node = dev->of_offset; 101 102 gd->cpu_clk = fdtdec_get_int(blob, node, 103 "clock-frequency", 0); 104 gd->arch.dcache_line_size = fdtdec_get_int(blob, node, 105 "dcache-line-size", 0); 106 gd->arch.icache_line_size = fdtdec_get_int(blob, node, 107 "icache-line-size", 0); 108 gd->arch.dcache_size = fdtdec_get_int(blob, node, 109 "dcache-size", 0); 110 gd->arch.icache_size = fdtdec_get_int(blob, node, 111 "icache-size", 0); 112 gd->arch.reset_addr = fdtdec_get_int(blob, node, 113 "altr,reset-addr", 0); 114 gd->arch.exception_addr = fdtdec_get_int(blob, node, 115 "altr,exception-addr", 0); 116 gd->arch.has_initda = fdtdec_get_int(blob, node, 117 "altr,has-initda", 0); 118 gd->arch.has_mmu = fdtdec_get_int(blob, node, 119 "altr,has-mmu", 0); 120 gd->arch.io_region_base = gd->arch.has_mmu ? 0xe0000000 : 0x80000000; 121 gd->arch.mem_region_base = gd->arch.has_mmu ? 0xc0000000 : 0x00000000; 122 gd->arch.physaddr_mask = gd->arch.has_mmu ? 0x1fffffff : 0x7fffffff; 123 124 return 0; 125 } 126 127 static const struct cpu_ops altera_nios2_ops = { 128 .get_desc = altera_nios2_get_desc, 129 .get_info = altera_nios2_get_info, 130 .get_count = altera_nios2_get_count, 131 }; 132 133 static const struct udevice_id altera_nios2_ids[] = { 134 { .compatible = "altr,nios2-1.0" }, 135 { .compatible = "altr,nios2-1.1" }, 136 { } 137 }; 138 139 U_BOOT_DRIVER(altera_nios2) = { 140 .name = "altera_nios2", 141 .id = UCLASS_CPU, 142 .of_match = altera_nios2_ids, 143 .probe = altera_nios2_probe, 144 .ops = &altera_nios2_ops, 145 .flags = DM_FLAG_PRE_RELOC, 146 }; 147