xref: /openbmc/u-boot/arch/nds32/include/asm/system.h (revision cbd2fba1)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2011 Andes Technology Corporation
4  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
5  */
6 
7 #ifndef __ASM_NDS_SYSTEM_H
8 #define __ASM_NDS_SYSTEM_H
9 
10 /*
11  * Interrupt configuring macros.
12  */
13 
14 extern int irq_flags;
15 
16 #define local_irq_enable() \
17 	__asm__ __volatile__ ( \
18 		"mfsr	%0, $psw\n\t" \
19 		"andi	%0, %0, 0x1\n\t" \
20 		"setgie.e\n\t" \
21 		: \
22 		: "r" (irq_flags) \
23 	)
24 
25 #define local_irq_disable() \
26 	do { \
27 		int __tmp_dummy; \
28 		__asm__ __volatile__ ( \
29 			"mfsr	%0, $psw\n\t" \
30 			"andi	%0, %0, 0x1\n\t" \
31 			"setgie.d\n\t" \
32 			"dsb\n\t" \
33 			: "=r" (__tmp_dummy) \
34 		); \
35 	} while (0)
36 
37 #define local_irq_save(x) \
38 	__asm__ __volatile__ ( \
39 		"mfsr	%0, $psw\n\t" \
40 		"andi	%0, %0, 0x1\n\t" \
41 		"setgie.d\n\t" \
42 		"dsb\n\t" \
43 		: "=&r" (x) \
44 	)
45 
46 #define local_save_flags(x) \
47 	__asm__ __volatile__ ( \
48 		"mfsr	%0, $psw\n\t" \
49 		"andi	%0, %0, 0x1\n\t" \
50 		"setgie.e\n\t" \
51 		"setgie.d\n\t" \
52 		: "=r" (x) \
53 	)
54 
55 #define irqs_enabled_from_flags(x) ((x) != 0x1f)
56 
57 #define local_irq_restore(x) \
58 	do { \
59 		if (irqs_enabled_from_flags(x)) \
60 			local_irq_enable(); \
61 	} while (0)
62 
63 /*
64  * Force strict CPU ordering.
65  */
66 #define nop()			asm volatile ("nop;\n\t" : : )
67 #define mb()			asm volatile (""   : : : "memory")
68 #define rmb()			asm volatile (""   : : : "memory")
69 #define wmb()			asm volatile (""   : : : "memory")
70 
71 #endif	/* __ASM_NDS_SYSTEM_H */
72