xref: /openbmc/u-boot/arch/nds32/include/asm/system.h (revision b24a8ec1)
1 /*
2  * Copyright (C) 2011 Andes Technology Corporation
3  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __ASM_NDS_SYSTEM_H
9 #define __ASM_NDS_SYSTEM_H
10 
11 /*
12  * Interrupt configuring macros.
13  */
14 
15 extern int irq_flags;
16 
17 #define local_irq_enable() \
18 	__asm__ __volatile__ ( \
19 		"mfsr	%0, $psw\n\t" \
20 		"andi	%0, %0, 0x1\n\t" \
21 		"setgie.e\n\t" \
22 		: \
23 		: "r" (irq_flags) \
24 	)
25 
26 #define local_irq_disable() \
27 	do { \
28 		int __tmp_dummy; \
29 		__asm__ __volatile__ ( \
30 			"mfsr	%0, $psw\n\t" \
31 			"andi	%0, %0, 0x1\n\t" \
32 			"setgie.d\n\t" \
33 			"dsb\n\t" \
34 			: "=r" (__tmp_dummy) \
35 		); \
36 	} while (0)
37 
38 #define local_irq_save(x) \
39 	__asm__ __volatile__ ( \
40 		"mfsr	%0, $psw\n\t" \
41 		"andi	%0, %0, 0x1\n\t" \
42 		"setgie.d\n\t" \
43 		"dsb\n\t" \
44 		: "=&r" (x) \
45 	)
46 
47 #define local_save_flags(x) \
48 	__asm__ __volatile__ ( \
49 		"mfsr	%0, $psw\n\t" \
50 		"andi	%0, %0, 0x1\n\t" \
51 		"setgie.e\n\t" \
52 		"setgie.d\n\t" \
53 		: "=r" (x) \
54 	)
55 
56 #define irqs_enabled_from_flags(x) ((x) != 0x1f)
57 
58 #define local_irq_restore(x) \
59 	do { \
60 		if (irqs_enabled_from_flags(x)) \
61 			local_irq_enable(); \
62 	} while (0)
63 
64 /*
65  * Force strict CPU ordering.
66  */
67 #define nop()			asm volatile ("nop;\n\t" : : )
68 #define mb()			asm volatile (""   : : : "memory")
69 #define rmb()			asm volatile (""   : : : "memory")
70 #define wmb()			asm volatile (""   : : : "memory")
71 
72 #endif	/* __ASM_NDS_SYSTEM_H */
73