xref: /openbmc/u-boot/arch/nds32/include/asm/macro.h (revision cd71b1d5)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * include/asm-nds32/macro.h
4  *
5  * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6  * Copyright (C) 2011 Andes Technology Corporation
7  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
8  */
9 
10 #ifndef __ASM_NDS_MACRO_H
11 #define __ASM_NDS_MACRO_H
12 #ifdef __ASSEMBLY__
13 
14 /*
15  * These macros provide a convenient way to write 8, 16 and 32 bit data
16  * to an "immediate address (address used by periphal)" only.
17  * Registers r4 and r5 are used, any data in these registers are
18  * overwritten by the macros.
19  * The macros are valid for any NDS32 architecture, they do not implement
20  * any memory barriers so caution is recommended when using these when the
21  * caches are enabled or on a multi-core system.
22  */
23 
24 .macro	write32, addr, data
25 	li	$r4, \addr
26 	li	$r5, \data
27 	swi	$r5, [$r4]
28 .endm
29 
30 .macro	write16, addr, data
31 	li	$r4, \addr
32 	li	$r5, \data
33 	shi	$r5, [$r4]
34 .endm
35 
36 .macro	write8, addr, data
37 	li	$r4, \addr
38 	li	$r5, \data
39 	sbi	$r5, [$r4]
40 .endm
41 
42 /*
43  * This macro read a value from a register, then do OR operation
44  * (set bit fields) to the value, and then store it back to the register.
45  * Note: Instruction 'ori' supports immediate value up to 15 bits.
46  */
47 .macro	setbf32, addr, data
48 	li	$r4, \addr
49 	lwi	$r5, [$r4]
50 	li	$r6, \data
51 	or	$r5, $r5, $r6
52 	swi	$r5, [$r4]
53 .endm
54 
55 .macro	setbf15, addr, data
56 	li	$r4, \addr
57 	lwi	$r5, [$r4]
58 	ori	$r5, $r5, \data
59 	swi	$r5, [$r4]
60 .endm
61 
62 /*
63  * This macro generates a loop that can be used for delays in the code.
64  * Register r4 is used, any data in this register is overwritten by the
65  * macro.
66  * The macro is valid for any NDS32 architeture. The actual time spent in the
67  * loop will vary from CPU to CPU though.
68  */
69 
70 .macro	wait_timer, time
71 	li	$r4, \time
72 1:
73 	nop
74 	addi	$r4, $r4, -1
75 	bnez    $r4, 1b
76 .endm
77 
78 #endif /* __ASSEMBLY__ */
79 #endif /* __ASM_ARM_MACRO_H */
80