1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * linux/include/asm-nds/io.h 4 * 5 * Copyright (C) 1996-2000 Russell King 6 * 7 * Copyright (C) 2011 Andes Technology Corporation 8 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com> 9 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 10 * 11 * Modifications: 12 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both 13 * constant addresses and variable addresses. 14 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture 15 * specific IO header files. 16 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. 17 * 04-Apr-1999 PJB Added check_signature. 18 * 12-Dec-1999 RMK More cleanups 19 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions 20 */ 21 #ifndef __ASM_NDS_IO_H 22 #define __ASM_NDS_IO_H 23 24 /* 25 * CAUTION: 26 * - do not implement for NDS32 Arch yet. 27 * - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc... 28 * iinclude asm/io.h 29 */ 30 31 #ifdef __KERNEL__ 32 33 #include <linux/types.h> 34 #include <asm/byteorder.h> 35 36 static inline void sync(void) 37 { 38 } 39 40 #ifdef CONFIG_ARCH_MAP_SYSMEM 41 static inline void *map_sysmem(phys_addr_t paddr, unsigned long len) 42 { 43 if(paddr <PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE) 44 paddr = paddr | 0x40000000; 45 return (void *)(uintptr_t)paddr; 46 } 47 48 static inline void *unmap_sysmem(const void *vaddr) 49 { 50 phys_addr_t paddr = (phys_addr_t)vaddr; 51 paddr = paddr & ~0x40000000; 52 return (void *)(uintptr_t)paddr; 53 } 54 55 static inline phys_addr_t map_to_sysmem(const void *ptr) 56 { 57 return (phys_addr_t)(uintptr_t)ptr; 58 } 59 #endif 60 61 /* 62 * Generic virtual read/write. Note that we don't support half-word 63 * read/writes. We define __arch_*[bl] here, and leave __arch_*w 64 * to the architecture specific code. 65 */ 66 #define __arch_getb(a) (*(unsigned char *)(a)) 67 #define __arch_getw(a) (*(unsigned short *)(a)) 68 #define __arch_getl(a) (*(unsigned int *)(a)) 69 70 #define __arch_putb(v, a) (*(unsigned char *)(a) = (v)) 71 #define __arch_putw(v, a) (*(unsigned short *)(a) = (v)) 72 #define __arch_putl(v, a) (*(unsigned int *)(a) = (v)) 73 74 extern void __raw_writesb(unsigned int addr, const void *data, int bytelen); 75 extern void __raw_writesw(unsigned int addr, const void *data, int wordlen); 76 extern void __raw_writesl(unsigned int addr, const void *data, int longlen); 77 78 extern void __raw_readsb(unsigned int addr, void *data, int bytelen); 79 extern void __raw_readsw(unsigned int addr, void *data, int wordlen); 80 extern void __raw_readsl(unsigned int addr, void *data, int longlen); 81 82 #define __raw_writeb(v, a) __arch_putb(v, a) 83 #define __raw_writew(v, a) __arch_putw(v, a) 84 #define __raw_writel(v, a) __arch_putl(v, a) 85 86 #define __raw_readb(a) __arch_getb(a) 87 #define __raw_readw(a) __arch_getw(a) 88 #define __raw_readl(a) __arch_getl(a) 89 90 /* 91 * TODO: The kernel offers some more advanced versions of barriers, it might 92 * have some advantages to use them instead of the simple one here. 93 */ 94 #define dmb() __asm__ __volatile__ ("" : : : "memory") 95 #define __iormb() dmb() 96 #define __iowmb() dmb() 97 98 static inline void writeb(u8 val, volatile void __iomem *addr) 99 { 100 __iowmb(); 101 __arch_putb(val, addr); 102 } 103 104 static inline void writew(u16 val, volatile void __iomem *addr) 105 { 106 __iowmb(); 107 __arch_putw(val, addr); 108 109 } 110 111 static inline void writel(u32 val, volatile void __iomem *addr) 112 { 113 __iowmb(); 114 __arch_putl(val, addr); 115 } 116 117 static inline u8 readb(const volatile void __iomem *addr) 118 { 119 u8 val; 120 121 val = __arch_getb(addr); 122 __iormb(); 123 return val; 124 } 125 126 static inline u16 readw(const volatile void __iomem *addr) 127 { 128 u16 val; 129 130 val = __arch_getw(addr); 131 __iormb(); 132 return val; 133 } 134 135 static inline u32 readl(const volatile void __iomem *addr) 136 { 137 u32 val; 138 139 val = __arch_getl(addr); 140 __iormb(); 141 return val; 142 } 143 144 /* 145 * The compiler seems to be incapable of optimising constants 146 * properly. Spell it out to the compiler in some cases. 147 * These are only valid for small values of "off" (< 1<<12) 148 */ 149 #define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off) 150 #define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off) 151 #define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off) 152 153 #define __raw_base_readb(base, off) __arch_base_getb(base, off) 154 #define __raw_base_readw(base, off) __arch_base_getw(base, off) 155 #define __raw_base_readl(base, off) __arch_base_getl(base, off) 156 157 #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) 158 #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) 159 160 #define out_le32(a, v) out_arch(l, le32, a, v) 161 #define out_le16(a, v) out_arch(w, le16, a, v) 162 163 #define in_le32(a) in_arch(l, le32, a) 164 #define in_le16(a) in_arch(w, le16, a) 165 166 #define out_be32(a, v) out_arch(l, be32, a, v) 167 #define out_be16(a, v) out_arch(w, be16, a, v) 168 169 #define in_be32(a) in_arch(l, be32, a) 170 #define in_be16(a) in_arch(w, be16, a) 171 172 #define out_8(a, v) __raw_writeb(v, a) 173 #define in_8(a) __raw_readb(a) 174 175 /* 176 * Clear and set bits in one shot. These macros can be used to clear and 177 * set multiple bits in a register using a single call. These macros can 178 * also be used to set a multiple-bit bit pattern using a mask, by 179 * specifying the mask in the 'clear' parameter and the new bit pattern 180 * in the 'set' parameter. 181 */ 182 183 #define clrbits(type, addr, clear) \ 184 out_##type((addr), in_##type(addr) & ~(clear)) 185 186 #define setbits(type, addr, set) \ 187 out_##type((addr), in_##type(addr) | (set)) 188 189 #define clrsetbits(type, addr, clear, set) \ 190 out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) 191 192 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) 193 #define setbits_be32(addr, set) setbits(be32, addr, set) 194 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 195 196 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) 197 #define setbits_le32(addr, set) setbits(le32, addr, set) 198 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 199 200 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) 201 #define setbits_be16(addr, set) setbits(be16, addr, set) 202 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) 203 204 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) 205 #define setbits_le16(addr, set) setbits(le16, addr, set) 206 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) 207 208 #define clrbits_8(addr, clear) clrbits(8, addr, clear) 209 #define setbits_8(addr, set) setbits(8, addr, set) 210 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 211 212 /* 213 * Now, pick up the machine-defined IO definitions 214 * #include <asm/arch/io.h> 215 */ 216 217 /* 218 * IO port access primitives 219 * ------------------------- 220 * 221 * The NDS32 doesn't have special IO access instructions just like ARM; 222 * all IO is memory mapped. 223 * Note that these are defined to perform little endian accesses 224 * only. Their primary purpose is to access PCI and ISA peripherals. 225 * 226 * Note that for a big endian machine, this implies that the following 227 * big endian mode connectivity is in place, as described by numerious 228 * ARM documents: 229 * 230 * PCI: D0-D7 D8-D15 D16-D23 D24-D31 231 * ARM: D24-D31 D16-D23 D8-D15 D0-D7 232 * 233 * The machine specific io.h include defines __io to translate an "IO" 234 * address to a memory address. 235 * 236 * Note that we prevent GCC re-ordering or caching values in expressions 237 * by introducing sequence points into the in*() definitions. Note that 238 * __raw_* do not guarantee this behaviour. 239 * 240 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. 241 */ 242 #ifdef __io 243 #define outb(v, p) __raw_writeb(v, __io(p)) 244 #define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) 245 #define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p)) 246 247 #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) 248 #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) 249 #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) 250 251 #define outsb(p, d, l) writesb(__io(p), d, l) 252 #define outsw(p, d, l) writesw(__io(p), d, l) 253 #define outsl(p, d, l) writesl(__io(p), d, l) 254 255 #define insb(p, d, l) readsb(__io(p), d, l) 256 #define insw(p, d, l) readsw(__io(p), d, l) 257 #define insl(p, d, l) readsl(__io(p), d, l) 258 259 static inline void readsb(unsigned int *addr, void * data, int bytelen) 260 { 261 unsigned char *ptr = (unsigned char *)addr; 262 unsigned char *ptr2 = (unsigned char *)data; 263 while (bytelen) { 264 *ptr2 = *ptr; 265 ptr2++; 266 bytelen--; 267 } 268 } 269 270 static inline void readsw(unsigned int *addr, void * data, int wordlen) 271 { 272 unsigned short *ptr = (unsigned short *)addr; 273 unsigned short *ptr2 = (unsigned short *)data; 274 while (wordlen) { 275 *ptr2 = *ptr; 276 ptr2++; 277 wordlen--; 278 } 279 } 280 281 static inline void readsl(unsigned int *addr, void * data, int longlen) 282 { 283 unsigned int *ptr = (unsigned int *)addr; 284 unsigned int *ptr2 = (unsigned int *)data; 285 while (longlen) { 286 *ptr2 = *ptr; 287 ptr2++; 288 longlen--; 289 } 290 } 291 static inline void writesb(unsigned int *addr, const void * data, int bytelen) 292 { 293 unsigned char *ptr = (unsigned char *)addr; 294 unsigned char *ptr2 = (unsigned char *)data; 295 while (bytelen) { 296 *ptr = *ptr2; 297 ptr2++; 298 bytelen--; 299 } 300 } 301 static inline void writesw(unsigned int *addr, const void * data, int wordlen) 302 { 303 unsigned short *ptr = (unsigned short *)addr; 304 unsigned short *ptr2 = (unsigned short *)data; 305 while (wordlen) { 306 *ptr = *ptr2; 307 ptr2++; 308 wordlen--; 309 } 310 } 311 static inline void writesl(unsigned int *addr, const void * data, int longlen) 312 { 313 unsigned int *ptr = (unsigned int *)addr; 314 unsigned int *ptr2 = (unsigned int *)data; 315 while (longlen) { 316 *ptr = *ptr2; 317 ptr2++; 318 longlen--; 319 } 320 } 321 #endif 322 323 #define outb_p(val, port) outb((val), (port)) 324 #define outw_p(val, port) outw((val), (port)) 325 #define outl_p(val, port) outl((val), (port)) 326 #define inb_p(port) inb((port)) 327 #define inw_p(port) inw((port)) 328 #define inl_p(port) inl((port)) 329 330 #define outsb_p(port, from, len) outsb(port, from, len) 331 #define outsw_p(port, from, len) outsw(port, from, len) 332 #define outsl_p(port, from, len) outsl(port, from, len) 333 #define insb_p(port, to, len) insb(port, to, len) 334 #define insw_p(port, to, len) insw(port, to, len) 335 #define insl_p(port, to, len) insl(port, to, len) 336 337 /* 338 * DMA-consistent mapping functions. These allocate/free a region of 339 * uncached, unwrite-buffered mapped memory space for use with DMA 340 * devices. This is the "generic" version. The PCI specific version 341 * is in pci.h 342 */ 343 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); 344 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); 345 extern void consistent_sync(void *vaddr, size_t size, int rw); 346 347 /* 348 * String version of IO memory access ops: 349 */ 350 extern void _memcpy_fromio(void *, unsigned long, size_t); 351 extern void _memcpy_toio(unsigned long, const void *, size_t); 352 extern void _memset_io(unsigned long, int, size_t); 353 354 extern void __readwrite_bug(const char *fn); 355 356 /* 357 * If this architecture has PCI memory IO, then define the read/write 358 * macros. These should only be used with the cookie passed from 359 * ioremap. 360 */ 361 #ifdef __mem_pci 362 363 #define readb(c) ({ unsigned int __v = \ 364 __raw_readb(__mem_pci(c)); __v; }) 365 #define readw(c) ({ unsigned int __v = \ 366 le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) 367 #define readl(c) ({ unsigned int __v = \ 368 le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) 369 370 #define writeb(v, c) __raw_writeb(v, __mem_pci(c)) 371 #define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c)) 372 #define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c)) 373 374 #define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l)) 375 #define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l)) 376 #define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l)) 377 378 #define eth_io_copy_and_sum(s, c, l, b) \ 379 eth_copy_and_sum((s), __mem_pci(c), (l), (b)) 380 381 static inline int 382 check_signature(unsigned long io_addr, const unsigned char *signature, 383 int length) 384 { 385 int retval = 0; 386 do { 387 if (readb(io_addr) != *signature) 388 goto out; 389 io_addr++; 390 signature++; 391 length--; 392 } while (length); 393 retval = 1; 394 out: 395 return retval; 396 } 397 #endif /* __mem_pci */ 398 399 /* 400 * If this architecture has ISA IO, then define the isa_read/isa_write 401 * macros. 402 */ 403 #ifdef __mem_isa 404 405 #define isa_readb(addr) __raw_readb(__mem_isa(addr)) 406 #define isa_readw(addr) __raw_readw(__mem_isa(addr)) 407 #define isa_readl(addr) __raw_readl(__mem_isa(addr)) 408 #define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr)) 409 #define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr)) 410 #define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr)) 411 #define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c)) 412 #define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c)) 413 #define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c)) 414 415 #define isa_eth_io_copy_and_sum(a, b, c, d) \ 416 eth_copy_and_sum((a), __mem_isa(b), (c), (d)) 417 418 static inline int 419 isa_check_signature(unsigned long io_addr, const unsigned char *signature, 420 int length) 421 { 422 int retval = 0; 423 do { 424 if (isa_readb(io_addr) != *signature) 425 goto out; 426 io_addr++; 427 signature++; 428 length--; 429 } while (length); 430 retval = 1; 431 out: 432 return retval; 433 } 434 435 #else /* __mem_isa */ 436 437 #define isa_readb(addr) (__readwrite_bug("isa_readb"), 0) 438 #define isa_readw(addr) (__readwrite_bug("isa_readw"), 0) 439 #define isa_readl(addr) (__readwrite_bug("isa_readl"), 0) 440 #define isa_writeb(val, addr) __readwrite_bug("isa_writeb") 441 #define isa_writew(val, addr) __readwrite_bug("isa_writew") 442 #define isa_writel(val, addr) __readwrite_bug("isa_writel") 443 #define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io") 444 #define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio") 445 #define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio") 446 447 #define isa_eth_io_copy_and_sum(a, b, c, d) \ 448 __readwrite_bug("isa_eth_io_copy_and_sum") 449 450 #define isa_check_signature(io, sig, len) (0) 451 452 #endif /* __mem_isa */ 453 454 #include <asm-generic/io.h> 455 456 #endif /* __KERNEL__ */ 457 #endif /* __ASM_NDS_IO_H */ 458