1 /* 2 * linux/include/asm-nds/io.h 3 * 4 * Copyright (C) 1996-2000 Russell King 5 * 6 * Copyright (C) 2011 Andes Technology Corporation 7 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com> 8 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 * Modifications: 15 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both 16 * constant addresses and variable addresses. 17 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture 18 * specific IO header files. 19 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. 20 * 04-Apr-1999 PJB Added check_signature. 21 * 12-Dec-1999 RMK More cleanups 22 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions 23 */ 24 #ifndef __ASM_NDS_IO_H 25 #define __ASM_NDS_IO_H 26 27 /* 28 * CAUTION: 29 * - do not implement for NDS32 Arch yet. 30 * - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc... 31 * iinclude asm/io.h 32 */ 33 34 #ifdef __KERNEL__ 35 36 #include <linux/types.h> 37 #include <asm/byteorder.h> 38 39 static inline void sync(void) 40 { 41 } 42 43 /* 44 * Given a physical address and a length, return a virtual address 45 * that can be used to access the memory range with the caching 46 * properties specified by "flags". 47 */ 48 #define MAP_NOCACHE (0) 49 #define MAP_WRCOMBINE (0) 50 #define MAP_WRBACK (0) 51 #define MAP_WRTHROUGH (0) 52 53 static inline void * 54 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) 55 { 56 return (void *)paddr; 57 } 58 59 /* 60 * Take down a mapping set up by map_physmem(). 61 */ 62 static inline void unmap_physmem(void *vaddr, unsigned long flags) 63 { 64 65 } 66 67 static inline phys_addr_t virt_to_phys(void *vaddr) 68 { 69 return (phys_addr_t)(vaddr); 70 } 71 72 /* 73 * Generic virtual read/write. Note that we don't support half-word 74 * read/writes. We define __arch_*[bl] here, and leave __arch_*w 75 * to the architecture specific code. 76 */ 77 #define __arch_getb(a) (*(unsigned char *)(a)) 78 #define __arch_getw(a) (*(unsigned short *)(a)) 79 #define __arch_getl(a) (*(unsigned int *)(a)) 80 81 #define __arch_putb(v, a) (*(unsigned char *)(a) = (v)) 82 #define __arch_putw(v, a) (*(unsigned short *)(a) = (v)) 83 #define __arch_putl(v, a) (*(unsigned int *)(a) = (v)) 84 85 extern void __raw_writesb(unsigned int addr, const void *data, int bytelen); 86 extern void __raw_writesw(unsigned int addr, const void *data, int wordlen); 87 extern void __raw_writesl(unsigned int addr, const void *data, int longlen); 88 89 extern void __raw_readsb(unsigned int addr, void *data, int bytelen); 90 extern void __raw_readsw(unsigned int addr, void *data, int wordlen); 91 extern void __raw_readsl(unsigned int addr, void *data, int longlen); 92 93 #define __raw_writeb(v, a) __arch_putb(v, a) 94 #define __raw_writew(v, a) __arch_putw(v, a) 95 #define __raw_writel(v, a) __arch_putl(v, a) 96 97 #define __raw_readb(a) __arch_getb(a) 98 #define __raw_readw(a) __arch_getw(a) 99 #define __raw_readl(a) __arch_getl(a) 100 101 /* 102 * TODO: The kernel offers some more advanced versions of barriers, it might 103 * have some advantages to use them instead of the simple one here. 104 */ 105 #define dmb() __asm__ __volatile__ ("" : : : "memory") 106 #define __iormb() dmb() 107 #define __iowmb() dmb() 108 109 static inline void writeb(unsigned char val, unsigned char *addr) 110 { 111 __iowmb(); 112 __arch_putb(val, addr); 113 } 114 115 static inline void writew(unsigned short val, unsigned short *addr) 116 { 117 __iowmb(); 118 __arch_putw(val, addr); 119 120 } 121 122 static inline void writel(unsigned int val, unsigned int *addr) 123 { 124 __iowmb(); 125 __arch_putl(val, addr); 126 } 127 128 static inline unsigned char readb(unsigned char *addr) 129 { 130 u8 val; 131 132 val = __arch_getb(addr); 133 __iormb(); 134 return val; 135 } 136 137 static inline unsigned short readw(unsigned short *addr) 138 { 139 u16 val; 140 141 val = __arch_getw(addr); 142 __iormb(); 143 return val; 144 } 145 146 static inline unsigned int readl(unsigned int *addr) 147 { 148 u32 val; 149 150 val = __arch_getl(addr); 151 __iormb(); 152 return val; 153 } 154 155 /* 156 * The compiler seems to be incapable of optimising constants 157 * properly. Spell it out to the compiler in some cases. 158 * These are only valid for small values of "off" (< 1<<12) 159 */ 160 #define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off) 161 #define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off) 162 #define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off) 163 164 #define __raw_base_readb(base, off) __arch_base_getb(base, off) 165 #define __raw_base_readw(base, off) __arch_base_getw(base, off) 166 #define __raw_base_readl(base, off) __arch_base_getl(base, off) 167 168 #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) 169 #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) 170 171 #define out_le32(a, v) out_arch(l, le32, a, v) 172 #define out_le16(a, v) out_arch(w, le16, a, v) 173 174 #define in_le32(a) in_arch(l, le32, a) 175 #define in_le16(a) in_arch(w, le16, a) 176 177 #define out_be32(a, v) out_arch(l, be32, a, v) 178 #define out_be16(a, v) out_arch(w, be16, a, v) 179 180 #define in_be32(a) in_arch(l, be32, a) 181 #define in_be16(a) in_arch(w, be16, a) 182 183 #define out_8(a, v) __raw_writeb(v, a) 184 #define in_8(a) __raw_readb(a) 185 186 /* 187 * Now, pick up the machine-defined IO definitions 188 * #include <asm/arch/io.h> 189 */ 190 191 /* 192 * IO port access primitives 193 * ------------------------- 194 * 195 * The NDS32 doesn't have special IO access instructions just like ARM; 196 * all IO is memory mapped. 197 * Note that these are defined to perform little endian accesses 198 * only. Their primary purpose is to access PCI and ISA peripherals. 199 * 200 * Note that for a big endian machine, this implies that the following 201 * big endian mode connectivity is in place, as described by numerious 202 * ARM documents: 203 * 204 * PCI: D0-D7 D8-D15 D16-D23 D24-D31 205 * ARM: D24-D31 D16-D23 D8-D15 D0-D7 206 * 207 * The machine specific io.h include defines __io to translate an "IO" 208 * address to a memory address. 209 * 210 * Note that we prevent GCC re-ordering or caching values in expressions 211 * by introducing sequence points into the in*() definitions. Note that 212 * __raw_* do not guarantee this behaviour. 213 * 214 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. 215 */ 216 #ifdef __io 217 #define outb(v, p) __raw_writeb(v, __io(p)) 218 #define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) 219 #define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p)) 220 221 #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) 222 #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) 223 #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) 224 225 #define outsb(p, d, l) writesb(__io(p), d, l) 226 #define outsw(p, d, l) writesw(__io(p), d, l) 227 #define outsl(p, d, l) writesl(__io(p), d, l) 228 229 #define insb(p, d, l) readsb(__io(p), d, l) 230 #define insw(p, d, l) readsw(__io(p), d, l) 231 #define insl(p, d, l) readsl(__io(p), d, l) 232 233 static inline void readsb(unsigned int *addr, void * data, int bytelen) 234 { 235 unsigned char *ptr = (unsigned char *)addr; 236 unsigned char *ptr2 = (unsigned char *)data; 237 while (bytelen) { 238 *ptr2 = *ptr; 239 ptr2++; 240 bytelen--; 241 } 242 } 243 244 static inline void readsw(unsigned int *addr, void * data, int wordlen) 245 { 246 unsigned short *ptr = (unsigned short *)addr; 247 unsigned short *ptr2 = (unsigned short *)data; 248 while (wordlen) { 249 *ptr2 = *ptr; 250 ptr2++; 251 wordlen--; 252 } 253 } 254 255 static inline void readsl(unsigned int *addr, void * data, int longlen) 256 { 257 unsigned int *ptr = (unsigned int *)addr; 258 unsigned int *ptr2 = (unsigned int *)data; 259 while (longlen) { 260 *ptr2 = *ptr; 261 ptr2++; 262 longlen--; 263 } 264 } 265 static inline void writesb(unsigned int *addr, const void * data, int bytelen) 266 { 267 unsigned char *ptr = (unsigned char *)addr; 268 unsigned char *ptr2 = (unsigned char *)data; 269 while (bytelen) { 270 *ptr = *ptr2; 271 ptr2++; 272 bytelen--; 273 } 274 } 275 static inline void writesw(unsigned int *addr, const void * data, int wordlen) 276 { 277 unsigned short *ptr = (unsigned short *)addr; 278 unsigned short *ptr2 = (unsigned short *)data; 279 while (wordlen) { 280 *ptr = *ptr2; 281 ptr2++; 282 wordlen--; 283 } 284 } 285 static inline void writesl(unsigned int *addr, const void * data, int longlen) 286 { 287 unsigned int *ptr = (unsigned int *)addr; 288 unsigned int *ptr2 = (unsigned int *)data; 289 while (longlen) { 290 *ptr = *ptr2; 291 ptr2++; 292 longlen--; 293 } 294 } 295 #endif 296 297 #define outb_p(val, port) outb((val), (port)) 298 #define outw_p(val, port) outw((val), (port)) 299 #define outl_p(val, port) outl((val), (port)) 300 #define inb_p(port) inb((port)) 301 #define inw_p(port) inw((port)) 302 #define inl_p(port) inl((port)) 303 304 #define outsb_p(port, from, len) outsb(port, from, len) 305 #define outsw_p(port, from, len) outsw(port, from, len) 306 #define outsl_p(port, from, len) outsl(port, from, len) 307 #define insb_p(port, to, len) insb(port, to, len) 308 #define insw_p(port, to, len) insw(port, to, len) 309 #define insl_p(port, to, len) insl(port, to, len) 310 311 /* 312 * ioremap and friends. 313 * 314 * ioremap takes a PCI memory address, as specified in 315 * linux/Documentation/IO-mapping.txt. If you want a 316 * physical address, use __ioremap instead. 317 */ 318 extern void *__ioremap(unsigned long offset, size_t size, unsigned long flags); 319 extern void __iounmap(void *addr); 320 321 /* 322 * Generic ioremap support. 323 * 324 * Define: 325 * iomem_valid_addr(off,size) 326 * iomem_to_phys(off) 327 */ 328 #ifdef iomem_valid_addr 329 #define __arch_ioremap(off, sz, nocache) \ 330 ({ \ 331 unsigned long _off = (off), _size = (sz); \ 332 void *_ret = (void *)0; \ 333 if (iomem_valid_addr(_off, _size)) \ 334 _ret = __ioremap(iomem_to_phys(_off), _size, 0); \ 335 _ret; \ 336 }) 337 338 #define __arch_iounmap __iounmap 339 #endif 340 341 #define ioremap(off, sz) __arch_ioremap((off), (sz), 0) 342 #define ioremap_nocache(off, sz) __arch_ioremap((off), (sz), 1) 343 #define iounmap(_addr) __arch_iounmap(_addr) 344 345 /* 346 * DMA-consistent mapping functions. These allocate/free a region of 347 * uncached, unwrite-buffered mapped memory space for use with DMA 348 * devices. This is the "generic" version. The PCI specific version 349 * is in pci.h 350 */ 351 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); 352 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); 353 extern void consistent_sync(void *vaddr, size_t size, int rw); 354 355 /* 356 * String version of IO memory access ops: 357 */ 358 extern void _memcpy_fromio(void *, unsigned long, size_t); 359 extern void _memcpy_toio(unsigned long, const void *, size_t); 360 extern void _memset_io(unsigned long, int, size_t); 361 362 extern void __readwrite_bug(const char *fn); 363 364 /* 365 * If this architecture has PCI memory IO, then define the read/write 366 * macros. These should only be used with the cookie passed from 367 * ioremap. 368 */ 369 #ifdef __mem_pci 370 371 #define readb(c) ({ unsigned int __v = \ 372 __raw_readb(__mem_pci(c)); __v; }) 373 #define readw(c) ({ unsigned int __v = \ 374 le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) 375 #define readl(c) ({ unsigned int __v = \ 376 le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) 377 378 #define writeb(v, c) __raw_writeb(v, __mem_pci(c)) 379 #define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c)) 380 #define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c)) 381 382 #define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l)) 383 #define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l)) 384 #define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l)) 385 386 #define eth_io_copy_and_sum(s, c, l, b) \ 387 eth_copy_and_sum((s), __mem_pci(c), (l), (b)) 388 389 static inline int 390 check_signature(unsigned long io_addr, const unsigned char *signature, 391 int length) 392 { 393 int retval = 0; 394 do { 395 if (readb(io_addr) != *signature) 396 goto out; 397 io_addr++; 398 signature++; 399 length--; 400 } while (length); 401 retval = 1; 402 out: 403 return retval; 404 } 405 #endif /* __mem_pci */ 406 407 /* 408 * If this architecture has ISA IO, then define the isa_read/isa_write 409 * macros. 410 */ 411 #ifdef __mem_isa 412 413 #define isa_readb(addr) __raw_readb(__mem_isa(addr)) 414 #define isa_readw(addr) __raw_readw(__mem_isa(addr)) 415 #define isa_readl(addr) __raw_readl(__mem_isa(addr)) 416 #define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr)) 417 #define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr)) 418 #define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr)) 419 #define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c)) 420 #define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c)) 421 #define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c)) 422 423 #define isa_eth_io_copy_and_sum(a, b, c, d) \ 424 eth_copy_and_sum((a), __mem_isa(b), (c), (d)) 425 426 static inline int 427 isa_check_signature(unsigned long io_addr, const unsigned char *signature, 428 int length) 429 { 430 int retval = 0; 431 do { 432 if (isa_readb(io_addr) != *signature) 433 goto out; 434 io_addr++; 435 signature++; 436 length--; 437 } while (length); 438 retval = 1; 439 out: 440 return retval; 441 } 442 443 #else /* __mem_isa */ 444 445 #define isa_readb(addr) (__readwrite_bug("isa_readb"), 0) 446 #define isa_readw(addr) (__readwrite_bug("isa_readw"), 0) 447 #define isa_readl(addr) (__readwrite_bug("isa_readl"), 0) 448 #define isa_writeb(val, addr) __readwrite_bug("isa_writeb") 449 #define isa_writew(val, addr) __readwrite_bug("isa_writew") 450 #define isa_writel(val, addr) __readwrite_bug("isa_writel") 451 #define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io") 452 #define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio") 453 #define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio") 454 455 #define isa_eth_io_copy_and_sum(a, b, c, d) \ 456 __readwrite_bug("isa_eth_io_copy_and_sum") 457 458 #define isa_check_signature(io, sig, len) (0) 459 460 #endif /* __mem_isa */ 461 #endif /* __KERNEL__ */ 462 #endif /* __ASM_NDS_IO_H */ 463