xref: /openbmc/u-boot/arch/nds32/include/asm/io.h (revision 48263504)
1 /*
2  *  linux/include/asm-nds/io.h
3  *
4  * Copyright (C) 1996-2000 Russell King
5  *
6  * Copyright (C) 2011 Andes Technology Corporation
7  * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
8  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
9  *
10  * SPDX-License-Identifier:	GPL-2.0
11  *
12  * Modifications:
13  *  16-Sep-1996	RMK	Inlined the inx/outx functions & optimised for both
14  *			constant addresses and variable addresses.
15  *  04-Dec-1997	RMK	Moved a lot of this stuff to the new architecture
16  *			specific IO header files.
17  *  27-Mar-1999	PJB	Second parameter of memcpy_toio is const..
18  *  04-Apr-1999	PJB	Added check_signature.
19  *  12-Dec-1999	RMK	More cleanups
20  *  18-Jun-2000 RMK	Removed virt_to_* and friends definitions
21  */
22 #ifndef __ASM_NDS_IO_H
23 #define __ASM_NDS_IO_H
24 
25 /*
26  * CAUTION:
27  *   - do not implement for NDS32 Arch yet.
28  *   - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc...
29  *     iinclude asm/io.h
30  */
31 
32 #ifdef __KERNEL__
33 
34 #include <linux/types.h>
35 #include <asm/byteorder.h>
36 
37 static inline void sync(void)
38 {
39 }
40 
41 #ifdef CONFIG_ARCH_MAP_SYSMEM
42 static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
43 {
44 	if(paddr <PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE)
45 	paddr = paddr | 0x40000000;
46 	return (void *)(uintptr_t)paddr;
47 }
48 
49 static inline void *unmap_sysmem(const void *vaddr)
50 {
51 	phys_addr_t paddr = (phys_addr_t)vaddr;
52 	paddr = paddr & ~0x40000000;
53 	return (void *)(uintptr_t)paddr;
54 }
55 
56 static inline phys_addr_t map_to_sysmem(const void *ptr)
57 {
58 	return (phys_addr_t)(uintptr_t)ptr;
59 }
60 #endif
61 
62 /*
63  * Generic virtual read/write.  Note that we don't support half-word
64  * read/writes.  We define __arch_*[bl] here, and leave __arch_*w
65  * to the architecture specific code.
66  */
67 #define __arch_getb(a)			(*(unsigned char *)(a))
68 #define __arch_getw(a)			(*(unsigned short *)(a))
69 #define __arch_getl(a)			(*(unsigned int *)(a))
70 
71 #define __arch_putb(v, a)		(*(unsigned char *)(a) = (v))
72 #define __arch_putw(v, a)		(*(unsigned short *)(a) = (v))
73 #define __arch_putl(v, a)		(*(unsigned int *)(a) = (v))
74 
75 extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
76 extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
77 extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
78 
79 extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
80 extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
81 extern void __raw_readsl(unsigned int addr, void *data, int longlen);
82 
83 #define __raw_writeb(v, a)		__arch_putb(v, a)
84 #define __raw_writew(v, a)		__arch_putw(v, a)
85 #define __raw_writel(v, a)		__arch_putl(v, a)
86 
87 #define __raw_readb(a)			__arch_getb(a)
88 #define __raw_readw(a)			__arch_getw(a)
89 #define __raw_readl(a)			__arch_getl(a)
90 
91 /*
92  * TODO: The kernel offers some more advanced versions of barriers, it might
93  * have some advantages to use them instead of the simple one here.
94  */
95 #define dmb()		__asm__ __volatile__ ("" : : : "memory")
96 #define __iormb()	dmb()
97 #define __iowmb()	dmb()
98 
99 static inline void writeb(u8 val, volatile void __iomem *addr)
100 {
101 	__iowmb();
102 	__arch_putb(val, addr);
103 }
104 
105 static inline void writew(u16 val, volatile void __iomem *addr)
106 {
107 	__iowmb();
108 	__arch_putw(val, addr);
109 
110 }
111 
112 static inline void writel(u32 val, volatile void __iomem *addr)
113 {
114 	__iowmb();
115 	__arch_putl(val, addr);
116 }
117 
118 static inline u8 readb(const volatile void __iomem *addr)
119 {
120 	u8	val;
121 
122 	val = __arch_getb(addr);
123 	__iormb();
124 	return val;
125 }
126 
127 static inline u16 readw(const volatile void __iomem *addr)
128 {
129 	u16	val;
130 
131 	val = __arch_getw(addr);
132 	__iormb();
133 	return val;
134 }
135 
136 static inline u32 readl(const volatile void __iomem *addr)
137 {
138 	u32	val;
139 
140 	val = __arch_getl(addr);
141 	__iormb();
142 	return val;
143 }
144 
145 /*
146  * The compiler seems to be incapable of optimising constants
147  * properly.  Spell it out to the compiler in some cases.
148  * These are only valid for small values of "off" (< 1<<12)
149  */
150 #define __raw_base_writeb(val, base, off)	__arch_base_putb(val, base, off)
151 #define __raw_base_writew(val, base, off)	__arch_base_putw(val, base, off)
152 #define __raw_base_writel(val, base, off)	__arch_base_putl(val, base, off)
153 
154 #define __raw_base_readb(base, off)	__arch_base_getb(base, off)
155 #define __raw_base_readw(base, off)	__arch_base_getw(base, off)
156 #define __raw_base_readl(base, off)	__arch_base_getl(base, off)
157 
158 #define out_arch(type, endian, a, v)	__raw_write##type(cpu_to_##endian(v), a)
159 #define in_arch(type, endian, a)	endian##_to_cpu(__raw_read##type(a))
160 
161 #define out_le32(a, v)			out_arch(l, le32, a, v)
162 #define out_le16(a, v)			out_arch(w, le16, a, v)
163 
164 #define in_le32(a)			in_arch(l, le32, a)
165 #define in_le16(a)			in_arch(w, le16, a)
166 
167 #define out_be32(a, v)			out_arch(l, be32, a, v)
168 #define out_be16(a, v)			out_arch(w, be16, a, v)
169 
170 #define in_be32(a)			in_arch(l, be32, a)
171 #define in_be16(a)			in_arch(w, be16, a)
172 
173 #define out_8(a, v)			__raw_writeb(v, a)
174 #define in_8(a)				__raw_readb(a)
175 
176 /*
177  * Clear and set bits in one shot. These macros can be used to clear and
178  * set multiple bits in a register using a single call. These macros can
179  * also be used to set a multiple-bit bit pattern using a mask, by
180  * specifying the mask in the 'clear' parameter and the new bit pattern
181  * in the 'set' parameter.
182  */
183 
184 #define clrbits(type, addr, clear) \
185 	out_##type((addr), in_##type(addr) & ~(clear))
186 
187 #define setbits(type, addr, set) \
188 	out_##type((addr), in_##type(addr) | (set))
189 
190 #define clrsetbits(type, addr, clear, set) \
191 	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
192 
193 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
194 #define setbits_be32(addr, set) setbits(be32, addr, set)
195 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
196 
197 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
198 #define setbits_le32(addr, set) setbits(le32, addr, set)
199 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
200 
201 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
202 #define setbits_be16(addr, set) setbits(be16, addr, set)
203 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
204 
205 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
206 #define setbits_le16(addr, set) setbits(le16, addr, set)
207 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
208 
209 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
210 #define setbits_8(addr, set) setbits(8, addr, set)
211 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
212 
213 /*
214  * Now, pick up the machine-defined IO definitions
215  * #include <asm/arch/io.h>
216  */
217 
218 /*
219  *  IO port access primitives
220  *  -------------------------
221  *
222  * The NDS32 doesn't have special IO access instructions just like ARM;
223  * all IO is memory mapped.
224  * Note that these are defined to perform little endian accesses
225  * only.  Their primary purpose is to access PCI and ISA peripherals.
226  *
227  * Note that for a big endian machine, this implies that the following
228  * big endian mode connectivity is in place, as described by numerious
229  * ARM documents:
230  *
231  *    PCI:  D0-D7   D8-D15 D16-D23 D24-D31
232  *    ARM: D24-D31 D16-D23  D8-D15  D0-D7
233  *
234  * The machine specific io.h include defines __io to translate an "IO"
235  * address to a memory address.
236  *
237  * Note that we prevent GCC re-ordering or caching values in expressions
238  * by introducing sequence points into the in*() definitions.  Note that
239  * __raw_* do not guarantee this behaviour.
240  *
241  * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
242  */
243 #ifdef __io
244 #define outb(v, p)			__raw_writeb(v, __io(p))
245 #define outw(v, p)			__raw_writew(cpu_to_le16(v), __io(p))
246 #define outl(v, p)			__raw_writel(cpu_to_le32(v), __io(p))
247 
248 #define inb(p)	({ unsigned int __v = __raw_readb(__io(p)); __v; })
249 #define inw(p)	({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
250 #define inl(p)	({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
251 
252 #define outsb(p, d, l)			writesb(__io(p), d, l)
253 #define outsw(p, d, l)			writesw(__io(p), d, l)
254 #define outsl(p, d, l)			writesl(__io(p), d, l)
255 
256 #define insb(p, d, l)			readsb(__io(p), d, l)
257 #define insw(p, d, l)			readsw(__io(p), d, l)
258 #define insl(p, d, l)			readsl(__io(p), d, l)
259 
260 static inline void readsb(unsigned int *addr, void * data, int bytelen)
261 {
262 	unsigned char *ptr = (unsigned char *)addr;
263 	unsigned char *ptr2 = (unsigned char *)data;
264 	while (bytelen) {
265 		*ptr2 = *ptr;
266 		ptr2++;
267 		bytelen--;
268 	}
269 }
270 
271 static inline void readsw(unsigned int *addr, void * data, int wordlen)
272 {
273 	unsigned short *ptr = (unsigned short *)addr;
274 	unsigned short *ptr2 = (unsigned short *)data;
275 	while (wordlen) {
276 		*ptr2 = *ptr;
277 		ptr2++;
278 		wordlen--;
279 	}
280 }
281 
282 static inline void readsl(unsigned int *addr, void * data, int longlen)
283 {
284 	unsigned int *ptr = (unsigned int *)addr;
285 	unsigned int *ptr2 = (unsigned int *)data;
286 	while (longlen) {
287 		*ptr2 = *ptr;
288 		ptr2++;
289 		longlen--;
290 	}
291 }
292 static inline void writesb(unsigned int *addr, const void * data, int bytelen)
293 {
294 	unsigned char *ptr = (unsigned char *)addr;
295 	unsigned char *ptr2 = (unsigned char *)data;
296 	while (bytelen) {
297 		*ptr = *ptr2;
298 		ptr2++;
299 		bytelen--;
300 	}
301 }
302 static inline void writesw(unsigned int *addr, const void * data, int wordlen)
303 {
304 	unsigned short *ptr = (unsigned short *)addr;
305 	unsigned short *ptr2 = (unsigned short *)data;
306 	while (wordlen) {
307 		*ptr = *ptr2;
308 		ptr2++;
309 		wordlen--;
310 	}
311 }
312 static inline void writesl(unsigned int *addr, const void * data, int longlen)
313 {
314 	unsigned int *ptr = (unsigned int *)addr;
315 	unsigned int *ptr2 = (unsigned int *)data;
316 	while (longlen) {
317 		*ptr = *ptr2;
318 		ptr2++;
319 		longlen--;
320 	}
321 }
322 #endif
323 
324 #define outb_p(val, port)		outb((val), (port))
325 #define outw_p(val, port)		outw((val), (port))
326 #define outl_p(val, port)		outl((val), (port))
327 #define inb_p(port)			inb((port))
328 #define inw_p(port)			inw((port))
329 #define inl_p(port)			inl((port))
330 
331 #define outsb_p(port, from, len)	outsb(port, from, len)
332 #define outsw_p(port, from, len)	outsw(port, from, len)
333 #define outsl_p(port, from, len)	outsl(port, from, len)
334 #define insb_p(port, to, len)		insb(port, to, len)
335 #define insw_p(port, to, len)		insw(port, to, len)
336 #define insl_p(port, to, len)		insl(port, to, len)
337 
338 /*
339  * DMA-consistent mapping functions.  These allocate/free a region of
340  * uncached, unwrite-buffered mapped memory space for use with DMA
341  * devices.  This is the "generic" version.  The PCI specific version
342  * is in pci.h
343  */
344 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
345 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
346 extern void consistent_sync(void *vaddr, size_t size, int rw);
347 
348 /*
349  * String version of IO memory access ops:
350  */
351 extern void _memcpy_fromio(void *, unsigned long, size_t);
352 extern void _memcpy_toio(unsigned long, const void *, size_t);
353 extern void _memset_io(unsigned long, int, size_t);
354 
355 extern void __readwrite_bug(const char *fn);
356 
357 /*
358  * If this architecture has PCI memory IO, then define the read/write
359  * macros.  These should only be used with the cookie passed from
360  * ioremap.
361  */
362 #ifdef __mem_pci
363 
364 #define readb(c) ({ unsigned int __v = \
365 			__raw_readb(__mem_pci(c)); __v; })
366 #define readw(c) ({ unsigned int __v = \
367 			le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
368 #define readl(c) ({ unsigned int __v = \
369 			le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
370 
371 #define writeb(v, c)		__raw_writeb(v, __mem_pci(c))
372 #define writew(v, c)		__raw_writew(cpu_to_le16(v), __mem_pci(c))
373 #define writel(v, c)		__raw_writel(cpu_to_le32(v), __mem_pci(c))
374 
375 #define memset_io(c, v, l)	_memset_io(__mem_pci(c), (v), (l))
376 #define memcpy_fromio(a, c, l)	_memcpy_fromio((a), __mem_pci(c), (l))
377 #define memcpy_toio(c, a, l)	_memcpy_toio(__mem_pci(c), (a), (l))
378 
379 #define eth_io_copy_and_sum(s, c, l, b) \
380 	eth_copy_and_sum((s), __mem_pci(c), (l), (b))
381 
382 static inline int
383 check_signature(unsigned long io_addr, const unsigned char *signature,
384 		int length)
385 {
386 	int retval = 0;
387 	do {
388 		if (readb(io_addr) != *signature)
389 			goto out;
390 		io_addr++;
391 		signature++;
392 		length--;
393 	} while (length);
394 	retval = 1;
395 out:
396 	return retval;
397 }
398 #endif	/* __mem_pci */
399 
400 /*
401  * If this architecture has ISA IO, then define the isa_read/isa_write
402  * macros.
403  */
404 #ifdef __mem_isa
405 
406 #define isa_readb(addr)			__raw_readb(__mem_isa(addr))
407 #define isa_readw(addr)			__raw_readw(__mem_isa(addr))
408 #define isa_readl(addr)			__raw_readl(__mem_isa(addr))
409 #define isa_writeb(val, addr)		__raw_writeb(val, __mem_isa(addr))
410 #define isa_writew(val, addr)		__raw_writew(val, __mem_isa(addr))
411 #define isa_writel(val, addr)		__raw_writel(val, __mem_isa(addr))
412 #define isa_memset_io(a, b, c)		_memset_io(__mem_isa(a), (b), (c))
413 #define isa_memcpy_fromio(a, b, c)	_memcpy_fromio((a), __mem_isa(b), (c))
414 #define isa_memcpy_toio(a, b, c)	_memcpy_toio(__mem_isa((a)), (b), (c))
415 
416 #define isa_eth_io_copy_and_sum(a, b, c, d) \
417 	eth_copy_and_sum((a), __mem_isa(b), (c), (d))
418 
419 static inline int
420 isa_check_signature(unsigned long io_addr, const unsigned char *signature,
421 			int length)
422 {
423 	int retval = 0;
424 	do {
425 		if (isa_readb(io_addr) != *signature)
426 			goto out;
427 		io_addr++;
428 		signature++;
429 		length--;
430 	} while (length);
431 	retval = 1;
432 out:
433 	return retval;
434 }
435 
436 #else	/* __mem_isa */
437 
438 #define isa_readb(addr)			(__readwrite_bug("isa_readb"), 0)
439 #define isa_readw(addr)			(__readwrite_bug("isa_readw"), 0)
440 #define isa_readl(addr)			(__readwrite_bug("isa_readl"), 0)
441 #define isa_writeb(val, addr)		__readwrite_bug("isa_writeb")
442 #define isa_writew(val, addr)		__readwrite_bug("isa_writew")
443 #define isa_writel(val, addr)		__readwrite_bug("isa_writel")
444 #define isa_memset_io(a, b, c)		__readwrite_bug("isa_memset_io")
445 #define isa_memcpy_fromio(a, b, c)	__readwrite_bug("isa_memcpy_fromio")
446 #define isa_memcpy_toio(a, b, c)	__readwrite_bug("isa_memcpy_toio")
447 
448 #define isa_eth_io_copy_and_sum(a, b, c, d) \
449 	__readwrite_bug("isa_eth_io_copy_and_sum")
450 
451 #define isa_check_signature(io, sig, len)	(0)
452 
453 #endif	/* __mem_isa */
454 
455 #include <asm-generic/io.h>
456 
457 #endif	/* __KERNEL__ */
458 #endif	/* __ASM_NDS_IO_H */
459