xref: /openbmc/u-boot/arch/nds32/include/asm/io.h (revision 2f3f477b)
1 /*
2  *  linux/include/asm-nds/io.h
3  *
4  * Copyright (C) 1996-2000 Russell King
5  *
6  * Copyright (C) 2011 Andes Technology Corporation
7  * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
8  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
9  *
10  * SPDX-License-Identifier:	GPL-2.0
11  *
12  * Modifications:
13  *  16-Sep-1996	RMK	Inlined the inx/outx functions & optimised for both
14  *			constant addresses and variable addresses.
15  *  04-Dec-1997	RMK	Moved a lot of this stuff to the new architecture
16  *			specific IO header files.
17  *  27-Mar-1999	PJB	Second parameter of memcpy_toio is const..
18  *  04-Apr-1999	PJB	Added check_signature.
19  *  12-Dec-1999	RMK	More cleanups
20  *  18-Jun-2000 RMK	Removed virt_to_* and friends definitions
21  */
22 #ifndef __ASM_NDS_IO_H
23 #define __ASM_NDS_IO_H
24 
25 /*
26  * CAUTION:
27  *   - do not implement for NDS32 Arch yet.
28  *   - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc...
29  *     iinclude asm/io.h
30  */
31 
32 #ifdef __KERNEL__
33 
34 #include <linux/types.h>
35 #include <asm/byteorder.h>
36 
37 static inline void sync(void)
38 {
39 }
40 
41 /*
42  * Given a physical address and a length, return a virtual address
43  * that can be used to access the memory range with the caching
44  * properties specified by "flags".
45  */
46 #define MAP_NOCACHE	(0)
47 #define MAP_WRCOMBINE	(0)
48 #define MAP_WRBACK	(0)
49 #define MAP_WRTHROUGH	(0)
50 
51 static inline void *
52 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
53 {
54 	return (void *)paddr;
55 }
56 
57 /*
58  * Take down a mapping set up by map_physmem().
59  */
60 static inline void unmap_physmem(void *vaddr, unsigned long flags)
61 {
62 
63 }
64 
65 static inline phys_addr_t virt_to_phys(void *vaddr)
66 {
67 	return (phys_addr_t)(vaddr);
68 }
69 
70 /*
71  * Generic virtual read/write.  Note that we don't support half-word
72  * read/writes.  We define __arch_*[bl] here, and leave __arch_*w
73  * to the architecture specific code.
74  */
75 #define __arch_getb(a)			(*(unsigned char *)(a))
76 #define __arch_getw(a)			(*(unsigned short *)(a))
77 #define __arch_getl(a)			(*(unsigned int *)(a))
78 
79 #define __arch_putb(v, a)		(*(unsigned char *)(a) = (v))
80 #define __arch_putw(v, a)		(*(unsigned short *)(a) = (v))
81 #define __arch_putl(v, a)		(*(unsigned int *)(a) = (v))
82 
83 extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
84 extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
85 extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
86 
87 extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
88 extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
89 extern void __raw_readsl(unsigned int addr, void *data, int longlen);
90 
91 #define __raw_writeb(v, a)		__arch_putb(v, a)
92 #define __raw_writew(v, a)		__arch_putw(v, a)
93 #define __raw_writel(v, a)		__arch_putl(v, a)
94 
95 #define __raw_readb(a)			__arch_getb(a)
96 #define __raw_readw(a)			__arch_getw(a)
97 #define __raw_readl(a)			__arch_getl(a)
98 
99 /*
100  * TODO: The kernel offers some more advanced versions of barriers, it might
101  * have some advantages to use them instead of the simple one here.
102  */
103 #define dmb()		__asm__ __volatile__ ("" : : : "memory")
104 #define __iormb()	dmb()
105 #define __iowmb()	dmb()
106 
107 static inline void writeb(unsigned char val, unsigned char *addr)
108 {
109 	__iowmb();
110 	__arch_putb(val, addr);
111 }
112 
113 static inline void writew(unsigned short val, unsigned short *addr)
114 {
115 	__iowmb();
116 	__arch_putw(val, addr);
117 
118 }
119 
120 static inline void writel(unsigned int val, unsigned int *addr)
121 {
122 	__iowmb();
123 	__arch_putl(val, addr);
124 }
125 
126 static inline unsigned char readb(unsigned char *addr)
127 {
128 	u8	val;
129 
130 	val = __arch_getb(addr);
131 	__iormb();
132 	return val;
133 }
134 
135 static inline unsigned short readw(unsigned short *addr)
136 {
137 	u16	val;
138 
139 	val = __arch_getw(addr);
140 	__iormb();
141 	return val;
142 }
143 
144 static inline unsigned int readl(unsigned int *addr)
145 {
146 	u32	val;
147 
148 	val = __arch_getl(addr);
149 	__iormb();
150 	return val;
151 }
152 
153 /*
154  * The compiler seems to be incapable of optimising constants
155  * properly.  Spell it out to the compiler in some cases.
156  * These are only valid for small values of "off" (< 1<<12)
157  */
158 #define __raw_base_writeb(val, base, off)	__arch_base_putb(val, base, off)
159 #define __raw_base_writew(val, base, off)	__arch_base_putw(val, base, off)
160 #define __raw_base_writel(val, base, off)	__arch_base_putl(val, base, off)
161 
162 #define __raw_base_readb(base, off)	__arch_base_getb(base, off)
163 #define __raw_base_readw(base, off)	__arch_base_getw(base, off)
164 #define __raw_base_readl(base, off)	__arch_base_getl(base, off)
165 
166 #define out_arch(type, endian, a, v)	__raw_write##type(cpu_to_##endian(v), a)
167 #define in_arch(type, endian, a)	endian##_to_cpu(__raw_read##type(a))
168 
169 #define out_le32(a, v)			out_arch(l, le32, a, v)
170 #define out_le16(a, v)			out_arch(w, le16, a, v)
171 
172 #define in_le32(a)			in_arch(l, le32, a)
173 #define in_le16(a)			in_arch(w, le16, a)
174 
175 #define out_be32(a, v)			out_arch(l, be32, a, v)
176 #define out_be16(a, v)			out_arch(w, be16, a, v)
177 
178 #define in_be32(a)			in_arch(l, be32, a)
179 #define in_be16(a)			in_arch(w, be16, a)
180 
181 #define out_8(a, v)			__raw_writeb(v, a)
182 #define in_8(a)				__raw_readb(a)
183 
184 /*
185  * Clear and set bits in one shot. These macros can be used to clear and
186  * set multiple bits in a register using a single call. These macros can
187  * also be used to set a multiple-bit bit pattern using a mask, by
188  * specifying the mask in the 'clear' parameter and the new bit pattern
189  * in the 'set' parameter.
190  */
191 
192 #define clrbits(type, addr, clear) \
193 	out_##type((addr), in_##type(addr) & ~(clear))
194 
195 #define setbits(type, addr, set) \
196 	out_##type((addr), in_##type(addr) | (set))
197 
198 #define clrsetbits(type, addr, clear, set) \
199 	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
200 
201 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
202 #define setbits_be32(addr, set) setbits(be32, addr, set)
203 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
204 
205 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
206 #define setbits_le32(addr, set) setbits(le32, addr, set)
207 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
208 
209 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
210 #define setbits_be16(addr, set) setbits(be16, addr, set)
211 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
212 
213 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
214 #define setbits_le16(addr, set) setbits(le16, addr, set)
215 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
216 
217 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
218 #define setbits_8(addr, set) setbits(8, addr, set)
219 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
220 
221 /*
222  * Now, pick up the machine-defined IO definitions
223  * #include <asm/arch/io.h>
224  */
225 
226 /*
227  *  IO port access primitives
228  *  -------------------------
229  *
230  * The NDS32 doesn't have special IO access instructions just like ARM;
231  * all IO is memory mapped.
232  * Note that these are defined to perform little endian accesses
233  * only.  Their primary purpose is to access PCI and ISA peripherals.
234  *
235  * Note that for a big endian machine, this implies that the following
236  * big endian mode connectivity is in place, as described by numerious
237  * ARM documents:
238  *
239  *    PCI:  D0-D7   D8-D15 D16-D23 D24-D31
240  *    ARM: D24-D31 D16-D23  D8-D15  D0-D7
241  *
242  * The machine specific io.h include defines __io to translate an "IO"
243  * address to a memory address.
244  *
245  * Note that we prevent GCC re-ordering or caching values in expressions
246  * by introducing sequence points into the in*() definitions.  Note that
247  * __raw_* do not guarantee this behaviour.
248  *
249  * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
250  */
251 #ifdef __io
252 #define outb(v, p)			__raw_writeb(v, __io(p))
253 #define outw(v, p)			__raw_writew(cpu_to_le16(v), __io(p))
254 #define outl(v, p)			__raw_writel(cpu_to_le32(v), __io(p))
255 
256 #define inb(p)	({ unsigned int __v = __raw_readb(__io(p)); __v; })
257 #define inw(p)	({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
258 #define inl(p)	({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
259 
260 #define outsb(p, d, l)			writesb(__io(p), d, l)
261 #define outsw(p, d, l)			writesw(__io(p), d, l)
262 #define outsl(p, d, l)			writesl(__io(p), d, l)
263 
264 #define insb(p, d, l)			readsb(__io(p), d, l)
265 #define insw(p, d, l)			readsw(__io(p), d, l)
266 #define insl(p, d, l)			readsl(__io(p), d, l)
267 
268 static inline void readsb(unsigned int *addr, void * data, int bytelen)
269 {
270 	unsigned char *ptr = (unsigned char *)addr;
271 	unsigned char *ptr2 = (unsigned char *)data;
272 	while (bytelen) {
273 		*ptr2 = *ptr;
274 		ptr2++;
275 		bytelen--;
276 	}
277 }
278 
279 static inline void readsw(unsigned int *addr, void * data, int wordlen)
280 {
281 	unsigned short *ptr = (unsigned short *)addr;
282 	unsigned short *ptr2 = (unsigned short *)data;
283 	while (wordlen) {
284 		*ptr2 = *ptr;
285 		ptr2++;
286 		wordlen--;
287 	}
288 }
289 
290 static inline void readsl(unsigned int *addr, void * data, int longlen)
291 {
292 	unsigned int *ptr = (unsigned int *)addr;
293 	unsigned int *ptr2 = (unsigned int *)data;
294 	while (longlen) {
295 		*ptr2 = *ptr;
296 		ptr2++;
297 		longlen--;
298 	}
299 }
300 static inline void writesb(unsigned int *addr, const void * data, int bytelen)
301 {
302 	unsigned char *ptr = (unsigned char *)addr;
303 	unsigned char *ptr2 = (unsigned char *)data;
304 	while (bytelen) {
305 		*ptr = *ptr2;
306 		ptr2++;
307 		bytelen--;
308 	}
309 }
310 static inline void writesw(unsigned int *addr, const void * data, int wordlen)
311 {
312 	unsigned short *ptr = (unsigned short *)addr;
313 	unsigned short *ptr2 = (unsigned short *)data;
314 	while (wordlen) {
315 		*ptr = *ptr2;
316 		ptr2++;
317 		wordlen--;
318 	}
319 }
320 static inline void writesl(unsigned int *addr, const void * data, int longlen)
321 {
322 	unsigned int *ptr = (unsigned int *)addr;
323 	unsigned int *ptr2 = (unsigned int *)data;
324 	while (longlen) {
325 		*ptr = *ptr2;
326 		ptr2++;
327 		longlen--;
328 	}
329 }
330 #endif
331 
332 #define outb_p(val, port)		outb((val), (port))
333 #define outw_p(val, port)		outw((val), (port))
334 #define outl_p(val, port)		outl((val), (port))
335 #define inb_p(port)			inb((port))
336 #define inw_p(port)			inw((port))
337 #define inl_p(port)			inl((port))
338 
339 #define outsb_p(port, from, len)	outsb(port, from, len)
340 #define outsw_p(port, from, len)	outsw(port, from, len)
341 #define outsl_p(port, from, len)	outsl(port, from, len)
342 #define insb_p(port, to, len)		insb(port, to, len)
343 #define insw_p(port, to, len)		insw(port, to, len)
344 #define insl_p(port, to, len)		insl(port, to, len)
345 
346 /*
347  * ioremap and friends.
348  *
349  * ioremap takes a PCI memory address, as specified in
350  * linux/Documentation/IO-mapping.txt.  If you want a
351  * physical address, use __ioremap instead.
352  */
353 extern void *__ioremap(unsigned long offset, size_t size, unsigned long flags);
354 extern void __iounmap(void *addr);
355 
356 /*
357  * Generic ioremap support.
358  *
359  * Define:
360  *  iomem_valid_addr(off,size)
361  *  iomem_to_phys(off)
362  */
363 #ifdef iomem_valid_addr
364 #define __arch_ioremap(off, sz, nocache)				\
365 ({									\
366 	unsigned long _off = (off), _size = (sz);			\
367 	void *_ret = (void *)0;						\
368 	if (iomem_valid_addr(_off, _size))				\
369 		_ret = __ioremap(iomem_to_phys(_off), _size, 0);	\
370 	_ret;								\
371 })
372 
373 #define __arch_iounmap __iounmap
374 #endif
375 
376 #define ioremap(off, sz)		__arch_ioremap((off), (sz), 0)
377 #define ioremap_nocache(off, sz)	__arch_ioremap((off), (sz), 1)
378 #define iounmap(_addr)			__arch_iounmap(_addr)
379 
380 /*
381  * DMA-consistent mapping functions.  These allocate/free a region of
382  * uncached, unwrite-buffered mapped memory space for use with DMA
383  * devices.  This is the "generic" version.  The PCI specific version
384  * is in pci.h
385  */
386 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
387 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
388 extern void consistent_sync(void *vaddr, size_t size, int rw);
389 
390 /*
391  * String version of IO memory access ops:
392  */
393 extern void _memcpy_fromio(void *, unsigned long, size_t);
394 extern void _memcpy_toio(unsigned long, const void *, size_t);
395 extern void _memset_io(unsigned long, int, size_t);
396 
397 extern void __readwrite_bug(const char *fn);
398 
399 /*
400  * If this architecture has PCI memory IO, then define the read/write
401  * macros.  These should only be used with the cookie passed from
402  * ioremap.
403  */
404 #ifdef __mem_pci
405 
406 #define readb(c) ({ unsigned int __v = \
407 			__raw_readb(__mem_pci(c)); __v; })
408 #define readw(c) ({ unsigned int __v = \
409 			le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
410 #define readl(c) ({ unsigned int __v = \
411 			le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
412 
413 #define writeb(v, c)		__raw_writeb(v, __mem_pci(c))
414 #define writew(v, c)		__raw_writew(cpu_to_le16(v), __mem_pci(c))
415 #define writel(v, c)		__raw_writel(cpu_to_le32(v), __mem_pci(c))
416 
417 #define memset_io(c, v, l)	_memset_io(__mem_pci(c), (v), (l))
418 #define memcpy_fromio(a, c, l)	_memcpy_fromio((a), __mem_pci(c), (l))
419 #define memcpy_toio(c, a, l)	_memcpy_toio(__mem_pci(c), (a), (l))
420 
421 #define eth_io_copy_and_sum(s, c, l, b) \
422 	eth_copy_and_sum((s), __mem_pci(c), (l), (b))
423 
424 static inline int
425 check_signature(unsigned long io_addr, const unsigned char *signature,
426 		int length)
427 {
428 	int retval = 0;
429 	do {
430 		if (readb(io_addr) != *signature)
431 			goto out;
432 		io_addr++;
433 		signature++;
434 		length--;
435 	} while (length);
436 	retval = 1;
437 out:
438 	return retval;
439 }
440 #endif	/* __mem_pci */
441 
442 /*
443  * If this architecture has ISA IO, then define the isa_read/isa_write
444  * macros.
445  */
446 #ifdef __mem_isa
447 
448 #define isa_readb(addr)			__raw_readb(__mem_isa(addr))
449 #define isa_readw(addr)			__raw_readw(__mem_isa(addr))
450 #define isa_readl(addr)			__raw_readl(__mem_isa(addr))
451 #define isa_writeb(val, addr)		__raw_writeb(val, __mem_isa(addr))
452 #define isa_writew(val, addr)		__raw_writew(val, __mem_isa(addr))
453 #define isa_writel(val, addr)		__raw_writel(val, __mem_isa(addr))
454 #define isa_memset_io(a, b, c)		_memset_io(__mem_isa(a), (b), (c))
455 #define isa_memcpy_fromio(a, b, c)	_memcpy_fromio((a), __mem_isa(b), (c))
456 #define isa_memcpy_toio(a, b, c)	_memcpy_toio(__mem_isa((a)), (b), (c))
457 
458 #define isa_eth_io_copy_and_sum(a, b, c, d) \
459 	eth_copy_and_sum((a), __mem_isa(b), (c), (d))
460 
461 static inline int
462 isa_check_signature(unsigned long io_addr, const unsigned char *signature,
463 			int length)
464 {
465 	int retval = 0;
466 	do {
467 		if (isa_readb(io_addr) != *signature)
468 			goto out;
469 		io_addr++;
470 		signature++;
471 		length--;
472 	} while (length);
473 	retval = 1;
474 out:
475 	return retval;
476 }
477 
478 #else	/* __mem_isa */
479 
480 #define isa_readb(addr)			(__readwrite_bug("isa_readb"), 0)
481 #define isa_readw(addr)			(__readwrite_bug("isa_readw"), 0)
482 #define isa_readl(addr)			(__readwrite_bug("isa_readl"), 0)
483 #define isa_writeb(val, addr)		__readwrite_bug("isa_writeb")
484 #define isa_writew(val, addr)		__readwrite_bug("isa_writew")
485 #define isa_writel(val, addr)		__readwrite_bug("isa_writel")
486 #define isa_memset_io(a, b, c)		__readwrite_bug("isa_memset_io")
487 #define isa_memcpy_fromio(a, b, c)	__readwrite_bug("isa_memcpy_fromio")
488 #define isa_memcpy_toio(a, b, c)	__readwrite_bug("isa_memcpy_toio")
489 
490 #define isa_eth_io_copy_and_sum(a, b, c, d) \
491 	__readwrite_bug("isa_eth_io_copy_and_sum")
492 
493 #define isa_check_signature(io, sig, len)	(0)
494 
495 #endif	/* __mem_isa */
496 #endif	/* __KERNEL__ */
497 #endif	/* __ASM_NDS_IO_H */
498