1 /* 2 * linux/include/asm-nds/io.h 3 * 4 * Copyright (C) 1996-2000 Russell King 5 * 6 * Copyright (C) 2011 Andes Technology Corporation 7 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com> 8 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 9 * 10 * SPDX-License-Identifier: GPL-2.0 11 * 12 * Modifications: 13 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both 14 * constant addresses and variable addresses. 15 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture 16 * specific IO header files. 17 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. 18 * 04-Apr-1999 PJB Added check_signature. 19 * 12-Dec-1999 RMK More cleanups 20 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions 21 */ 22 #ifndef __ASM_NDS_IO_H 23 #define __ASM_NDS_IO_H 24 25 /* 26 * CAUTION: 27 * - do not implement for NDS32 Arch yet. 28 * - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc... 29 * iinclude asm/io.h 30 */ 31 32 #ifdef __KERNEL__ 33 34 #include <linux/types.h> 35 #include <asm/byteorder.h> 36 37 static inline void sync(void) 38 { 39 } 40 41 /* 42 * Given a physical address and a length, return a virtual address 43 * that can be used to access the memory range with the caching 44 * properties specified by "flags". 45 */ 46 #define MAP_NOCACHE (0) 47 #define MAP_WRCOMBINE (0) 48 #define MAP_WRBACK (0) 49 #define MAP_WRTHROUGH (0) 50 51 #ifdef CONFIG_ARCH_MAP_SYSMEM 52 static inline void *map_sysmem(phys_addr_t paddr, unsigned long len) 53 { 54 if(paddr <PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE) 55 paddr = paddr | 0x40000000; 56 return (void *)(uintptr_t)paddr; 57 } 58 59 static inline void *unmap_sysmem(const void *vaddr) 60 { 61 phys_addr_t paddr = (phys_addr_t)vaddr; 62 paddr = paddr & ~0x40000000; 63 return (void *)(uintptr_t)paddr; 64 } 65 66 static inline phys_addr_t map_to_sysmem(const void *ptr) 67 { 68 return (phys_addr_t)(uintptr_t)ptr; 69 } 70 #endif 71 72 static inline void * 73 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) 74 { 75 return (void *)paddr; 76 } 77 78 /* 79 * Take down a mapping set up by map_physmem(). 80 */ 81 static inline void unmap_physmem(void *vaddr, unsigned long flags) 82 { 83 84 } 85 86 static inline phys_addr_t virt_to_phys(void *vaddr) 87 { 88 return (phys_addr_t)(vaddr); 89 } 90 91 /* 92 * Generic virtual read/write. Note that we don't support half-word 93 * read/writes. We define __arch_*[bl] here, and leave __arch_*w 94 * to the architecture specific code. 95 */ 96 #define __arch_getb(a) (*(unsigned char *)(a)) 97 #define __arch_getw(a) (*(unsigned short *)(a)) 98 #define __arch_getl(a) (*(unsigned int *)(a)) 99 100 #define __arch_putb(v, a) (*(unsigned char *)(a) = (v)) 101 #define __arch_putw(v, a) (*(unsigned short *)(a) = (v)) 102 #define __arch_putl(v, a) (*(unsigned int *)(a) = (v)) 103 104 extern void __raw_writesb(unsigned int addr, const void *data, int bytelen); 105 extern void __raw_writesw(unsigned int addr, const void *data, int wordlen); 106 extern void __raw_writesl(unsigned int addr, const void *data, int longlen); 107 108 extern void __raw_readsb(unsigned int addr, void *data, int bytelen); 109 extern void __raw_readsw(unsigned int addr, void *data, int wordlen); 110 extern void __raw_readsl(unsigned int addr, void *data, int longlen); 111 112 #define __raw_writeb(v, a) __arch_putb(v, a) 113 #define __raw_writew(v, a) __arch_putw(v, a) 114 #define __raw_writel(v, a) __arch_putl(v, a) 115 116 #define __raw_readb(a) __arch_getb(a) 117 #define __raw_readw(a) __arch_getw(a) 118 #define __raw_readl(a) __arch_getl(a) 119 120 /* 121 * TODO: The kernel offers some more advanced versions of barriers, it might 122 * have some advantages to use them instead of the simple one here. 123 */ 124 #define dmb() __asm__ __volatile__ ("" : : : "memory") 125 #define __iormb() dmb() 126 #define __iowmb() dmb() 127 128 static inline void writeb(unsigned char val, unsigned char *addr) 129 { 130 __iowmb(); 131 __arch_putb(val, addr); 132 } 133 134 static inline void writew(unsigned short val, unsigned short *addr) 135 { 136 __iowmb(); 137 __arch_putw(val, addr); 138 139 } 140 141 static inline void writel(unsigned int val, unsigned int *addr) 142 { 143 __iowmb(); 144 __arch_putl(val, addr); 145 } 146 147 static inline unsigned char readb(unsigned char *addr) 148 { 149 u8 val; 150 151 val = __arch_getb(addr); 152 __iormb(); 153 return val; 154 } 155 156 static inline unsigned short readw(unsigned short *addr) 157 { 158 u16 val; 159 160 val = __arch_getw(addr); 161 __iormb(); 162 return val; 163 } 164 165 static inline unsigned int readl(unsigned int *addr) 166 { 167 u32 val; 168 169 val = __arch_getl(addr); 170 __iormb(); 171 return val; 172 } 173 174 /* 175 * The compiler seems to be incapable of optimising constants 176 * properly. Spell it out to the compiler in some cases. 177 * These are only valid for small values of "off" (< 1<<12) 178 */ 179 #define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off) 180 #define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off) 181 #define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off) 182 183 #define __raw_base_readb(base, off) __arch_base_getb(base, off) 184 #define __raw_base_readw(base, off) __arch_base_getw(base, off) 185 #define __raw_base_readl(base, off) __arch_base_getl(base, off) 186 187 #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) 188 #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) 189 190 #define out_le32(a, v) out_arch(l, le32, a, v) 191 #define out_le16(a, v) out_arch(w, le16, a, v) 192 193 #define in_le32(a) in_arch(l, le32, a) 194 #define in_le16(a) in_arch(w, le16, a) 195 196 #define out_be32(a, v) out_arch(l, be32, a, v) 197 #define out_be16(a, v) out_arch(w, be16, a, v) 198 199 #define in_be32(a) in_arch(l, be32, a) 200 #define in_be16(a) in_arch(w, be16, a) 201 202 #define out_8(a, v) __raw_writeb(v, a) 203 #define in_8(a) __raw_readb(a) 204 205 /* 206 * Clear and set bits in one shot. These macros can be used to clear and 207 * set multiple bits in a register using a single call. These macros can 208 * also be used to set a multiple-bit bit pattern using a mask, by 209 * specifying the mask in the 'clear' parameter and the new bit pattern 210 * in the 'set' parameter. 211 */ 212 213 #define clrbits(type, addr, clear) \ 214 out_##type((addr), in_##type(addr) & ~(clear)) 215 216 #define setbits(type, addr, set) \ 217 out_##type((addr), in_##type(addr) | (set)) 218 219 #define clrsetbits(type, addr, clear, set) \ 220 out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) 221 222 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) 223 #define setbits_be32(addr, set) setbits(be32, addr, set) 224 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 225 226 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) 227 #define setbits_le32(addr, set) setbits(le32, addr, set) 228 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 229 230 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) 231 #define setbits_be16(addr, set) setbits(be16, addr, set) 232 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) 233 234 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) 235 #define setbits_le16(addr, set) setbits(le16, addr, set) 236 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) 237 238 #define clrbits_8(addr, clear) clrbits(8, addr, clear) 239 #define setbits_8(addr, set) setbits(8, addr, set) 240 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 241 242 /* 243 * Now, pick up the machine-defined IO definitions 244 * #include <asm/arch/io.h> 245 */ 246 247 /* 248 * IO port access primitives 249 * ------------------------- 250 * 251 * The NDS32 doesn't have special IO access instructions just like ARM; 252 * all IO is memory mapped. 253 * Note that these are defined to perform little endian accesses 254 * only. Their primary purpose is to access PCI and ISA peripherals. 255 * 256 * Note that for a big endian machine, this implies that the following 257 * big endian mode connectivity is in place, as described by numerious 258 * ARM documents: 259 * 260 * PCI: D0-D7 D8-D15 D16-D23 D24-D31 261 * ARM: D24-D31 D16-D23 D8-D15 D0-D7 262 * 263 * The machine specific io.h include defines __io to translate an "IO" 264 * address to a memory address. 265 * 266 * Note that we prevent GCC re-ordering or caching values in expressions 267 * by introducing sequence points into the in*() definitions. Note that 268 * __raw_* do not guarantee this behaviour. 269 * 270 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. 271 */ 272 #ifdef __io 273 #define outb(v, p) __raw_writeb(v, __io(p)) 274 #define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) 275 #define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p)) 276 277 #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) 278 #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) 279 #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) 280 281 #define outsb(p, d, l) writesb(__io(p), d, l) 282 #define outsw(p, d, l) writesw(__io(p), d, l) 283 #define outsl(p, d, l) writesl(__io(p), d, l) 284 285 #define insb(p, d, l) readsb(__io(p), d, l) 286 #define insw(p, d, l) readsw(__io(p), d, l) 287 #define insl(p, d, l) readsl(__io(p), d, l) 288 289 static inline void readsb(unsigned int *addr, void * data, int bytelen) 290 { 291 unsigned char *ptr = (unsigned char *)addr; 292 unsigned char *ptr2 = (unsigned char *)data; 293 while (bytelen) { 294 *ptr2 = *ptr; 295 ptr2++; 296 bytelen--; 297 } 298 } 299 300 static inline void readsw(unsigned int *addr, void * data, int wordlen) 301 { 302 unsigned short *ptr = (unsigned short *)addr; 303 unsigned short *ptr2 = (unsigned short *)data; 304 while (wordlen) { 305 *ptr2 = *ptr; 306 ptr2++; 307 wordlen--; 308 } 309 } 310 311 static inline void readsl(unsigned int *addr, void * data, int longlen) 312 { 313 unsigned int *ptr = (unsigned int *)addr; 314 unsigned int *ptr2 = (unsigned int *)data; 315 while (longlen) { 316 *ptr2 = *ptr; 317 ptr2++; 318 longlen--; 319 } 320 } 321 static inline void writesb(unsigned int *addr, const void * data, int bytelen) 322 { 323 unsigned char *ptr = (unsigned char *)addr; 324 unsigned char *ptr2 = (unsigned char *)data; 325 while (bytelen) { 326 *ptr = *ptr2; 327 ptr2++; 328 bytelen--; 329 } 330 } 331 static inline void writesw(unsigned int *addr, const void * data, int wordlen) 332 { 333 unsigned short *ptr = (unsigned short *)addr; 334 unsigned short *ptr2 = (unsigned short *)data; 335 while (wordlen) { 336 *ptr = *ptr2; 337 ptr2++; 338 wordlen--; 339 } 340 } 341 static inline void writesl(unsigned int *addr, const void * data, int longlen) 342 { 343 unsigned int *ptr = (unsigned int *)addr; 344 unsigned int *ptr2 = (unsigned int *)data; 345 while (longlen) { 346 *ptr = *ptr2; 347 ptr2++; 348 longlen--; 349 } 350 } 351 #endif 352 353 #define outb_p(val, port) outb((val), (port)) 354 #define outw_p(val, port) outw((val), (port)) 355 #define outl_p(val, port) outl((val), (port)) 356 #define inb_p(port) inb((port)) 357 #define inw_p(port) inw((port)) 358 #define inl_p(port) inl((port)) 359 360 #define outsb_p(port, from, len) outsb(port, from, len) 361 #define outsw_p(port, from, len) outsw(port, from, len) 362 #define outsl_p(port, from, len) outsl(port, from, len) 363 #define insb_p(port, to, len) insb(port, to, len) 364 #define insw_p(port, to, len) insw(port, to, len) 365 #define insl_p(port, to, len) insl(port, to, len) 366 367 /* 368 * DMA-consistent mapping functions. These allocate/free a region of 369 * uncached, unwrite-buffered mapped memory space for use with DMA 370 * devices. This is the "generic" version. The PCI specific version 371 * is in pci.h 372 */ 373 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); 374 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); 375 extern void consistent_sync(void *vaddr, size_t size, int rw); 376 377 /* 378 * String version of IO memory access ops: 379 */ 380 extern void _memcpy_fromio(void *, unsigned long, size_t); 381 extern void _memcpy_toio(unsigned long, const void *, size_t); 382 extern void _memset_io(unsigned long, int, size_t); 383 384 extern void __readwrite_bug(const char *fn); 385 386 /* 387 * If this architecture has PCI memory IO, then define the read/write 388 * macros. These should only be used with the cookie passed from 389 * ioremap. 390 */ 391 #ifdef __mem_pci 392 393 #define readb(c) ({ unsigned int __v = \ 394 __raw_readb(__mem_pci(c)); __v; }) 395 #define readw(c) ({ unsigned int __v = \ 396 le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) 397 #define readl(c) ({ unsigned int __v = \ 398 le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) 399 400 #define writeb(v, c) __raw_writeb(v, __mem_pci(c)) 401 #define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c)) 402 #define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c)) 403 404 #define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l)) 405 #define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l)) 406 #define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l)) 407 408 #define eth_io_copy_and_sum(s, c, l, b) \ 409 eth_copy_and_sum((s), __mem_pci(c), (l), (b)) 410 411 static inline int 412 check_signature(unsigned long io_addr, const unsigned char *signature, 413 int length) 414 { 415 int retval = 0; 416 do { 417 if (readb(io_addr) != *signature) 418 goto out; 419 io_addr++; 420 signature++; 421 length--; 422 } while (length); 423 retval = 1; 424 out: 425 return retval; 426 } 427 #endif /* __mem_pci */ 428 429 /* 430 * If this architecture has ISA IO, then define the isa_read/isa_write 431 * macros. 432 */ 433 #ifdef __mem_isa 434 435 #define isa_readb(addr) __raw_readb(__mem_isa(addr)) 436 #define isa_readw(addr) __raw_readw(__mem_isa(addr)) 437 #define isa_readl(addr) __raw_readl(__mem_isa(addr)) 438 #define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr)) 439 #define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr)) 440 #define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr)) 441 #define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c)) 442 #define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c)) 443 #define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c)) 444 445 #define isa_eth_io_copy_and_sum(a, b, c, d) \ 446 eth_copy_and_sum((a), __mem_isa(b), (c), (d)) 447 448 static inline int 449 isa_check_signature(unsigned long io_addr, const unsigned char *signature, 450 int length) 451 { 452 int retval = 0; 453 do { 454 if (isa_readb(io_addr) != *signature) 455 goto out; 456 io_addr++; 457 signature++; 458 length--; 459 } while (length); 460 retval = 1; 461 out: 462 return retval; 463 } 464 465 #else /* __mem_isa */ 466 467 #define isa_readb(addr) (__readwrite_bug("isa_readb"), 0) 468 #define isa_readw(addr) (__readwrite_bug("isa_readw"), 0) 469 #define isa_readl(addr) (__readwrite_bug("isa_readl"), 0) 470 #define isa_writeb(val, addr) __readwrite_bug("isa_writeb") 471 #define isa_writew(val, addr) __readwrite_bug("isa_writew") 472 #define isa_writel(val, addr) __readwrite_bug("isa_writel") 473 #define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io") 474 #define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio") 475 #define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio") 476 477 #define isa_eth_io_copy_and_sum(a, b, c, d) \ 478 __readwrite_bug("isa_eth_io_copy_and_sum") 479 480 #define isa_check_signature(io, sig, len) (0) 481 482 #endif /* __mem_isa */ 483 #endif /* __KERNEL__ */ 484 #endif /* __ASM_NDS_IO_H */ 485