1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0 */ 200f892fcSMacpaul Lin /* 300f892fcSMacpaul Lin * linux/include/asm-nds/io.h 400f892fcSMacpaul Lin * 500f892fcSMacpaul Lin * Copyright (C) 1996-2000 Russell King 600f892fcSMacpaul Lin * 700f892fcSMacpaul Lin * Copyright (C) 2011 Andes Technology Corporation 800f892fcSMacpaul Lin * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com> 900f892fcSMacpaul Lin * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 1000f892fcSMacpaul Lin * 1100f892fcSMacpaul Lin * Modifications: 1200f892fcSMacpaul Lin * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both 1300f892fcSMacpaul Lin * constant addresses and variable addresses. 1400f892fcSMacpaul Lin * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture 1500f892fcSMacpaul Lin * specific IO header files. 1600f892fcSMacpaul Lin * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. 1700f892fcSMacpaul Lin * 04-Apr-1999 PJB Added check_signature. 1800f892fcSMacpaul Lin * 12-Dec-1999 RMK More cleanups 1900f892fcSMacpaul Lin * 18-Jun-2000 RMK Removed virt_to_* and friends definitions 2000f892fcSMacpaul Lin */ 2100f892fcSMacpaul Lin #ifndef __ASM_NDS_IO_H 2200f892fcSMacpaul Lin #define __ASM_NDS_IO_H 2300f892fcSMacpaul Lin 2400f892fcSMacpaul Lin /* 2500f892fcSMacpaul Lin * CAUTION: 2600f892fcSMacpaul Lin * - do not implement for NDS32 Arch yet. 2700f892fcSMacpaul Lin * - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc... 2800f892fcSMacpaul Lin * iinclude asm/io.h 2900f892fcSMacpaul Lin */ 3000f892fcSMacpaul Lin 3100f892fcSMacpaul Lin #ifdef __KERNEL__ 3200f892fcSMacpaul Lin 3300f892fcSMacpaul Lin #include <linux/types.h> 3400f892fcSMacpaul Lin #include <asm/byteorder.h> 3500f892fcSMacpaul Lin 3600f892fcSMacpaul Lin static inline void sync(void) 3700f892fcSMacpaul Lin { 3800f892fcSMacpaul Lin } 3900f892fcSMacpaul Lin 40e336b73dSrick #ifdef CONFIG_ARCH_MAP_SYSMEM 41e336b73dSrick static inline void *map_sysmem(phys_addr_t paddr, unsigned long len) 42e336b73dSrick { 43e336b73dSrick if(paddr <PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE) 44e336b73dSrick paddr = paddr | 0x40000000; 45e336b73dSrick return (void *)(uintptr_t)paddr; 46e336b73dSrick } 47e336b73dSrick 48e336b73dSrick static inline void *unmap_sysmem(const void *vaddr) 49e336b73dSrick { 50e336b73dSrick phys_addr_t paddr = (phys_addr_t)vaddr; 51e336b73dSrick paddr = paddr & ~0x40000000; 52e336b73dSrick return (void *)(uintptr_t)paddr; 53e336b73dSrick } 54e336b73dSrick 55e336b73dSrick static inline phys_addr_t map_to_sysmem(const void *ptr) 56e336b73dSrick { 57e336b73dSrick return (phys_addr_t)(uintptr_t)ptr; 58e336b73dSrick } 59e336b73dSrick #endif 60e336b73dSrick 6100f892fcSMacpaul Lin /* 6200f892fcSMacpaul Lin * Generic virtual read/write. Note that we don't support half-word 6300f892fcSMacpaul Lin * read/writes. We define __arch_*[bl] here, and leave __arch_*w 6400f892fcSMacpaul Lin * to the architecture specific code. 6500f892fcSMacpaul Lin */ 6600f892fcSMacpaul Lin #define __arch_getb(a) (*(unsigned char *)(a)) 6700f892fcSMacpaul Lin #define __arch_getw(a) (*(unsigned short *)(a)) 6800f892fcSMacpaul Lin #define __arch_getl(a) (*(unsigned int *)(a)) 6900f892fcSMacpaul Lin 7000f892fcSMacpaul Lin #define __arch_putb(v, a) (*(unsigned char *)(a) = (v)) 7100f892fcSMacpaul Lin #define __arch_putw(v, a) (*(unsigned short *)(a) = (v)) 7200f892fcSMacpaul Lin #define __arch_putl(v, a) (*(unsigned int *)(a) = (v)) 7300f892fcSMacpaul Lin 7400f892fcSMacpaul Lin extern void __raw_writesb(unsigned int addr, const void *data, int bytelen); 7500f892fcSMacpaul Lin extern void __raw_writesw(unsigned int addr, const void *data, int wordlen); 7600f892fcSMacpaul Lin extern void __raw_writesl(unsigned int addr, const void *data, int longlen); 7700f892fcSMacpaul Lin 7800f892fcSMacpaul Lin extern void __raw_readsb(unsigned int addr, void *data, int bytelen); 7900f892fcSMacpaul Lin extern void __raw_readsw(unsigned int addr, void *data, int wordlen); 8000f892fcSMacpaul Lin extern void __raw_readsl(unsigned int addr, void *data, int longlen); 8100f892fcSMacpaul Lin 8200f892fcSMacpaul Lin #define __raw_writeb(v, a) __arch_putb(v, a) 8300f892fcSMacpaul Lin #define __raw_writew(v, a) __arch_putw(v, a) 8400f892fcSMacpaul Lin #define __raw_writel(v, a) __arch_putl(v, a) 8500f892fcSMacpaul Lin 8600f892fcSMacpaul Lin #define __raw_readb(a) __arch_getb(a) 8700f892fcSMacpaul Lin #define __raw_readw(a) __arch_getw(a) 8800f892fcSMacpaul Lin #define __raw_readl(a) __arch_getl(a) 8900f892fcSMacpaul Lin 90a53ef5e4SMacpaul Lin /* 91a53ef5e4SMacpaul Lin * TODO: The kernel offers some more advanced versions of barriers, it might 92a53ef5e4SMacpaul Lin * have some advantages to use them instead of the simple one here. 93a53ef5e4SMacpaul Lin */ 94a53ef5e4SMacpaul Lin #define dmb() __asm__ __volatile__ ("" : : : "memory") 95a53ef5e4SMacpaul Lin #define __iormb() dmb() 96a53ef5e4SMacpaul Lin #define __iowmb() dmb() 9700f892fcSMacpaul Lin 989c7ffc94Srick static inline void writeb(u8 val, volatile void __iomem *addr) 99a53ef5e4SMacpaul Lin { 100a53ef5e4SMacpaul Lin __iowmb(); 101a53ef5e4SMacpaul Lin __arch_putb(val, addr); 102a53ef5e4SMacpaul Lin } 103a53ef5e4SMacpaul Lin 1049c7ffc94Srick static inline void writew(u16 val, volatile void __iomem *addr) 105a53ef5e4SMacpaul Lin { 106a53ef5e4SMacpaul Lin __iowmb(); 107a53ef5e4SMacpaul Lin __arch_putw(val, addr); 108a53ef5e4SMacpaul Lin 109a53ef5e4SMacpaul Lin } 110a53ef5e4SMacpaul Lin 1119c7ffc94Srick static inline void writel(u32 val, volatile void __iomem *addr) 112a53ef5e4SMacpaul Lin { 113a53ef5e4SMacpaul Lin __iowmb(); 114a53ef5e4SMacpaul Lin __arch_putl(val, addr); 115a53ef5e4SMacpaul Lin } 116a53ef5e4SMacpaul Lin 1179c7ffc94Srick static inline u8 readb(const volatile void __iomem *addr) 118a53ef5e4SMacpaul Lin { 119a53ef5e4SMacpaul Lin u8 val; 120a53ef5e4SMacpaul Lin 121a53ef5e4SMacpaul Lin val = __arch_getb(addr); 122a53ef5e4SMacpaul Lin __iormb(); 123a53ef5e4SMacpaul Lin return val; 124a53ef5e4SMacpaul Lin } 125a53ef5e4SMacpaul Lin 1269c7ffc94Srick static inline u16 readw(const volatile void __iomem *addr) 127a53ef5e4SMacpaul Lin { 128a53ef5e4SMacpaul Lin u16 val; 129a53ef5e4SMacpaul Lin 130a53ef5e4SMacpaul Lin val = __arch_getw(addr); 131a53ef5e4SMacpaul Lin __iormb(); 132a53ef5e4SMacpaul Lin return val; 133a53ef5e4SMacpaul Lin } 134a53ef5e4SMacpaul Lin 1359c7ffc94Srick static inline u32 readl(const volatile void __iomem *addr) 136a53ef5e4SMacpaul Lin { 137a53ef5e4SMacpaul Lin u32 val; 138a53ef5e4SMacpaul Lin 139a53ef5e4SMacpaul Lin val = __arch_getl(addr); 140a53ef5e4SMacpaul Lin __iormb(); 141a53ef5e4SMacpaul Lin return val; 142a53ef5e4SMacpaul Lin } 14300f892fcSMacpaul Lin 14400f892fcSMacpaul Lin /* 14500f892fcSMacpaul Lin * The compiler seems to be incapable of optimising constants 14600f892fcSMacpaul Lin * properly. Spell it out to the compiler in some cases. 14700f892fcSMacpaul Lin * These are only valid for small values of "off" (< 1<<12) 14800f892fcSMacpaul Lin */ 14900f892fcSMacpaul Lin #define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off) 15000f892fcSMacpaul Lin #define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off) 15100f892fcSMacpaul Lin #define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off) 15200f892fcSMacpaul Lin 15300f892fcSMacpaul Lin #define __raw_base_readb(base, off) __arch_base_getb(base, off) 15400f892fcSMacpaul Lin #define __raw_base_readw(base, off) __arch_base_getw(base, off) 15500f892fcSMacpaul Lin #define __raw_base_readl(base, off) __arch_base_getl(base, off) 15600f892fcSMacpaul Lin 157d21f6e58SMacpaul Lin #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) 158d21f6e58SMacpaul Lin #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) 159d21f6e58SMacpaul Lin 160d21f6e58SMacpaul Lin #define out_le32(a, v) out_arch(l, le32, a, v) 161d21f6e58SMacpaul Lin #define out_le16(a, v) out_arch(w, le16, a, v) 162d21f6e58SMacpaul Lin 163d21f6e58SMacpaul Lin #define in_le32(a) in_arch(l, le32, a) 164d21f6e58SMacpaul Lin #define in_le16(a) in_arch(w, le16, a) 165d21f6e58SMacpaul Lin 166d21f6e58SMacpaul Lin #define out_be32(a, v) out_arch(l, be32, a, v) 167d21f6e58SMacpaul Lin #define out_be16(a, v) out_arch(w, be16, a, v) 168d21f6e58SMacpaul Lin 169d21f6e58SMacpaul Lin #define in_be32(a) in_arch(l, be32, a) 170d21f6e58SMacpaul Lin #define in_be16(a) in_arch(w, be16, a) 171d21f6e58SMacpaul Lin 172d21f6e58SMacpaul Lin #define out_8(a, v) __raw_writeb(v, a) 173d21f6e58SMacpaul Lin #define in_8(a) __raw_readb(a) 174d21f6e58SMacpaul Lin 17500f892fcSMacpaul Lin /* 176bea2868fSGabor Juhos * Clear and set bits in one shot. These macros can be used to clear and 177bea2868fSGabor Juhos * set multiple bits in a register using a single call. These macros can 178bea2868fSGabor Juhos * also be used to set a multiple-bit bit pattern using a mask, by 179bea2868fSGabor Juhos * specifying the mask in the 'clear' parameter and the new bit pattern 180bea2868fSGabor Juhos * in the 'set' parameter. 181bea2868fSGabor Juhos */ 182bea2868fSGabor Juhos 183bea2868fSGabor Juhos #define clrbits(type, addr, clear) \ 184bea2868fSGabor Juhos out_##type((addr), in_##type(addr) & ~(clear)) 185bea2868fSGabor Juhos 186bea2868fSGabor Juhos #define setbits(type, addr, set) \ 187bea2868fSGabor Juhos out_##type((addr), in_##type(addr) | (set)) 188bea2868fSGabor Juhos 189bea2868fSGabor Juhos #define clrsetbits(type, addr, clear, set) \ 190bea2868fSGabor Juhos out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) 191bea2868fSGabor Juhos 192bea2868fSGabor Juhos #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) 193bea2868fSGabor Juhos #define setbits_be32(addr, set) setbits(be32, addr, set) 194bea2868fSGabor Juhos #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 195bea2868fSGabor Juhos 196bea2868fSGabor Juhos #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) 197bea2868fSGabor Juhos #define setbits_le32(addr, set) setbits(le32, addr, set) 198bea2868fSGabor Juhos #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 199bea2868fSGabor Juhos 200bea2868fSGabor Juhos #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) 201bea2868fSGabor Juhos #define setbits_be16(addr, set) setbits(be16, addr, set) 202bea2868fSGabor Juhos #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) 203bea2868fSGabor Juhos 204bea2868fSGabor Juhos #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) 205bea2868fSGabor Juhos #define setbits_le16(addr, set) setbits(le16, addr, set) 206bea2868fSGabor Juhos #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) 207bea2868fSGabor Juhos 208bea2868fSGabor Juhos #define clrbits_8(addr, clear) clrbits(8, addr, clear) 209bea2868fSGabor Juhos #define setbits_8(addr, set) setbits(8, addr, set) 210bea2868fSGabor Juhos #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 211bea2868fSGabor Juhos 212bea2868fSGabor Juhos /* 21300f892fcSMacpaul Lin * Now, pick up the machine-defined IO definitions 21400f892fcSMacpaul Lin * #include <asm/arch/io.h> 21500f892fcSMacpaul Lin */ 21600f892fcSMacpaul Lin 21700f892fcSMacpaul Lin /* 21800f892fcSMacpaul Lin * IO port access primitives 21900f892fcSMacpaul Lin * ------------------------- 22000f892fcSMacpaul Lin * 22100f892fcSMacpaul Lin * The NDS32 doesn't have special IO access instructions just like ARM; 22200f892fcSMacpaul Lin * all IO is memory mapped. 22300f892fcSMacpaul Lin * Note that these are defined to perform little endian accesses 22400f892fcSMacpaul Lin * only. Their primary purpose is to access PCI and ISA peripherals. 22500f892fcSMacpaul Lin * 22600f892fcSMacpaul Lin * Note that for a big endian machine, this implies that the following 22700f892fcSMacpaul Lin * big endian mode connectivity is in place, as described by numerious 22800f892fcSMacpaul Lin * ARM documents: 22900f892fcSMacpaul Lin * 23000f892fcSMacpaul Lin * PCI: D0-D7 D8-D15 D16-D23 D24-D31 23100f892fcSMacpaul Lin * ARM: D24-D31 D16-D23 D8-D15 D0-D7 23200f892fcSMacpaul Lin * 23300f892fcSMacpaul Lin * The machine specific io.h include defines __io to translate an "IO" 23400f892fcSMacpaul Lin * address to a memory address. 23500f892fcSMacpaul Lin * 23600f892fcSMacpaul Lin * Note that we prevent GCC re-ordering or caching values in expressions 23700f892fcSMacpaul Lin * by introducing sequence points into the in*() definitions. Note that 23800f892fcSMacpaul Lin * __raw_* do not guarantee this behaviour. 23900f892fcSMacpaul Lin * 24000f892fcSMacpaul Lin * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. 24100f892fcSMacpaul Lin */ 24200f892fcSMacpaul Lin #ifdef __io 24300f892fcSMacpaul Lin #define outb(v, p) __raw_writeb(v, __io(p)) 24400f892fcSMacpaul Lin #define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p)) 24500f892fcSMacpaul Lin #define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p)) 24600f892fcSMacpaul Lin 24700f892fcSMacpaul Lin #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; }) 24800f892fcSMacpaul Lin #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; }) 24900f892fcSMacpaul Lin #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; }) 25000f892fcSMacpaul Lin 25100f892fcSMacpaul Lin #define outsb(p, d, l) writesb(__io(p), d, l) 25200f892fcSMacpaul Lin #define outsw(p, d, l) writesw(__io(p), d, l) 25300f892fcSMacpaul Lin #define outsl(p, d, l) writesl(__io(p), d, l) 25400f892fcSMacpaul Lin 25500f892fcSMacpaul Lin #define insb(p, d, l) readsb(__io(p), d, l) 25600f892fcSMacpaul Lin #define insw(p, d, l) readsw(__io(p), d, l) 25700f892fcSMacpaul Lin #define insl(p, d, l) readsl(__io(p), d, l) 25800f892fcSMacpaul Lin 25900f892fcSMacpaul Lin static inline void readsb(unsigned int *addr, void * data, int bytelen) 26000f892fcSMacpaul Lin { 26100f892fcSMacpaul Lin unsigned char *ptr = (unsigned char *)addr; 26200f892fcSMacpaul Lin unsigned char *ptr2 = (unsigned char *)data; 26300f892fcSMacpaul Lin while (bytelen) { 26400f892fcSMacpaul Lin *ptr2 = *ptr; 26500f892fcSMacpaul Lin ptr2++; 26600f892fcSMacpaul Lin bytelen--; 26700f892fcSMacpaul Lin } 26800f892fcSMacpaul Lin } 26900f892fcSMacpaul Lin 27000f892fcSMacpaul Lin static inline void readsw(unsigned int *addr, void * data, int wordlen) 27100f892fcSMacpaul Lin { 27200f892fcSMacpaul Lin unsigned short *ptr = (unsigned short *)addr; 27300f892fcSMacpaul Lin unsigned short *ptr2 = (unsigned short *)data; 27400f892fcSMacpaul Lin while (wordlen) { 27500f892fcSMacpaul Lin *ptr2 = *ptr; 27600f892fcSMacpaul Lin ptr2++; 27700f892fcSMacpaul Lin wordlen--; 27800f892fcSMacpaul Lin } 27900f892fcSMacpaul Lin } 28000f892fcSMacpaul Lin 28100f892fcSMacpaul Lin static inline void readsl(unsigned int *addr, void * data, int longlen) 28200f892fcSMacpaul Lin { 28300f892fcSMacpaul Lin unsigned int *ptr = (unsigned int *)addr; 28400f892fcSMacpaul Lin unsigned int *ptr2 = (unsigned int *)data; 28500f892fcSMacpaul Lin while (longlen) { 28600f892fcSMacpaul Lin *ptr2 = *ptr; 28700f892fcSMacpaul Lin ptr2++; 28800f892fcSMacpaul Lin longlen--; 28900f892fcSMacpaul Lin } 29000f892fcSMacpaul Lin } 29100f892fcSMacpaul Lin static inline void writesb(unsigned int *addr, const void * data, int bytelen) 29200f892fcSMacpaul Lin { 29300f892fcSMacpaul Lin unsigned char *ptr = (unsigned char *)addr; 29400f892fcSMacpaul Lin unsigned char *ptr2 = (unsigned char *)data; 29500f892fcSMacpaul Lin while (bytelen) { 29600f892fcSMacpaul Lin *ptr = *ptr2; 29700f892fcSMacpaul Lin ptr2++; 29800f892fcSMacpaul Lin bytelen--; 29900f892fcSMacpaul Lin } 30000f892fcSMacpaul Lin } 30100f892fcSMacpaul Lin static inline void writesw(unsigned int *addr, const void * data, int wordlen) 30200f892fcSMacpaul Lin { 30300f892fcSMacpaul Lin unsigned short *ptr = (unsigned short *)addr; 30400f892fcSMacpaul Lin unsigned short *ptr2 = (unsigned short *)data; 30500f892fcSMacpaul Lin while (wordlen) { 30600f892fcSMacpaul Lin *ptr = *ptr2; 30700f892fcSMacpaul Lin ptr2++; 30800f892fcSMacpaul Lin wordlen--; 30900f892fcSMacpaul Lin } 31000f892fcSMacpaul Lin } 31100f892fcSMacpaul Lin static inline void writesl(unsigned int *addr, const void * data, int longlen) 31200f892fcSMacpaul Lin { 31300f892fcSMacpaul Lin unsigned int *ptr = (unsigned int *)addr; 31400f892fcSMacpaul Lin unsigned int *ptr2 = (unsigned int *)data; 31500f892fcSMacpaul Lin while (longlen) { 31600f892fcSMacpaul Lin *ptr = *ptr2; 31700f892fcSMacpaul Lin ptr2++; 31800f892fcSMacpaul Lin longlen--; 31900f892fcSMacpaul Lin } 32000f892fcSMacpaul Lin } 32100f892fcSMacpaul Lin #endif 32200f892fcSMacpaul Lin 32300f892fcSMacpaul Lin #define outb_p(val, port) outb((val), (port)) 32400f892fcSMacpaul Lin #define outw_p(val, port) outw((val), (port)) 32500f892fcSMacpaul Lin #define outl_p(val, port) outl((val), (port)) 32600f892fcSMacpaul Lin #define inb_p(port) inb((port)) 32700f892fcSMacpaul Lin #define inw_p(port) inw((port)) 32800f892fcSMacpaul Lin #define inl_p(port) inl((port)) 32900f892fcSMacpaul Lin 33000f892fcSMacpaul Lin #define outsb_p(port, from, len) outsb(port, from, len) 33100f892fcSMacpaul Lin #define outsw_p(port, from, len) outsw(port, from, len) 33200f892fcSMacpaul Lin #define outsl_p(port, from, len) outsl(port, from, len) 33300f892fcSMacpaul Lin #define insb_p(port, to, len) insb(port, to, len) 33400f892fcSMacpaul Lin #define insw_p(port, to, len) insw(port, to, len) 33500f892fcSMacpaul Lin #define insl_p(port, to, len) insl(port, to, len) 33600f892fcSMacpaul Lin 33700f892fcSMacpaul Lin /* 33800f892fcSMacpaul Lin * DMA-consistent mapping functions. These allocate/free a region of 33900f892fcSMacpaul Lin * uncached, unwrite-buffered mapped memory space for use with DMA 34000f892fcSMacpaul Lin * devices. This is the "generic" version. The PCI specific version 34100f892fcSMacpaul Lin * is in pci.h 34200f892fcSMacpaul Lin */ 34300f892fcSMacpaul Lin extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); 34400f892fcSMacpaul Lin extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); 34500f892fcSMacpaul Lin extern void consistent_sync(void *vaddr, size_t size, int rw); 34600f892fcSMacpaul Lin 34700f892fcSMacpaul Lin /* 34800f892fcSMacpaul Lin * String version of IO memory access ops: 34900f892fcSMacpaul Lin */ 35000f892fcSMacpaul Lin extern void _memcpy_fromio(void *, unsigned long, size_t); 35100f892fcSMacpaul Lin extern void _memcpy_toio(unsigned long, const void *, size_t); 35200f892fcSMacpaul Lin extern void _memset_io(unsigned long, int, size_t); 35300f892fcSMacpaul Lin 35400f892fcSMacpaul Lin extern void __readwrite_bug(const char *fn); 35500f892fcSMacpaul Lin 35600f892fcSMacpaul Lin /* 35700f892fcSMacpaul Lin * If this architecture has PCI memory IO, then define the read/write 35800f892fcSMacpaul Lin * macros. These should only be used with the cookie passed from 35900f892fcSMacpaul Lin * ioremap. 36000f892fcSMacpaul Lin */ 36100f892fcSMacpaul Lin #ifdef __mem_pci 36200f892fcSMacpaul Lin 36300f892fcSMacpaul Lin #define readb(c) ({ unsigned int __v = \ 36400f892fcSMacpaul Lin __raw_readb(__mem_pci(c)); __v; }) 36500f892fcSMacpaul Lin #define readw(c) ({ unsigned int __v = \ 36600f892fcSMacpaul Lin le16_to_cpu(__raw_readw(__mem_pci(c))); __v; }) 36700f892fcSMacpaul Lin #define readl(c) ({ unsigned int __v = \ 36800f892fcSMacpaul Lin le32_to_cpu(__raw_readl(__mem_pci(c))); __v; }) 36900f892fcSMacpaul Lin 37000f892fcSMacpaul Lin #define writeb(v, c) __raw_writeb(v, __mem_pci(c)) 37100f892fcSMacpaul Lin #define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c)) 37200f892fcSMacpaul Lin #define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c)) 37300f892fcSMacpaul Lin 37400f892fcSMacpaul Lin #define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l)) 37500f892fcSMacpaul Lin #define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l)) 37600f892fcSMacpaul Lin #define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l)) 37700f892fcSMacpaul Lin 37800f892fcSMacpaul Lin #define eth_io_copy_and_sum(s, c, l, b) \ 37900f892fcSMacpaul Lin eth_copy_and_sum((s), __mem_pci(c), (l), (b)) 38000f892fcSMacpaul Lin 38100f892fcSMacpaul Lin static inline int 38200f892fcSMacpaul Lin check_signature(unsigned long io_addr, const unsigned char *signature, 38300f892fcSMacpaul Lin int length) 38400f892fcSMacpaul Lin { 38500f892fcSMacpaul Lin int retval = 0; 38600f892fcSMacpaul Lin do { 38700f892fcSMacpaul Lin if (readb(io_addr) != *signature) 38800f892fcSMacpaul Lin goto out; 38900f892fcSMacpaul Lin io_addr++; 39000f892fcSMacpaul Lin signature++; 39100f892fcSMacpaul Lin length--; 39200f892fcSMacpaul Lin } while (length); 39300f892fcSMacpaul Lin retval = 1; 39400f892fcSMacpaul Lin out: 39500f892fcSMacpaul Lin return retval; 39600f892fcSMacpaul Lin } 39700f892fcSMacpaul Lin #endif /* __mem_pci */ 39800f892fcSMacpaul Lin 39900f892fcSMacpaul Lin /* 40000f892fcSMacpaul Lin * If this architecture has ISA IO, then define the isa_read/isa_write 40100f892fcSMacpaul Lin * macros. 40200f892fcSMacpaul Lin */ 40300f892fcSMacpaul Lin #ifdef __mem_isa 40400f892fcSMacpaul Lin 40500f892fcSMacpaul Lin #define isa_readb(addr) __raw_readb(__mem_isa(addr)) 40600f892fcSMacpaul Lin #define isa_readw(addr) __raw_readw(__mem_isa(addr)) 40700f892fcSMacpaul Lin #define isa_readl(addr) __raw_readl(__mem_isa(addr)) 40800f892fcSMacpaul Lin #define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr)) 40900f892fcSMacpaul Lin #define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr)) 41000f892fcSMacpaul Lin #define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr)) 41100f892fcSMacpaul Lin #define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c)) 41200f892fcSMacpaul Lin #define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c)) 41300f892fcSMacpaul Lin #define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c)) 41400f892fcSMacpaul Lin 41500f892fcSMacpaul Lin #define isa_eth_io_copy_and_sum(a, b, c, d) \ 41600f892fcSMacpaul Lin eth_copy_and_sum((a), __mem_isa(b), (c), (d)) 41700f892fcSMacpaul Lin 41800f892fcSMacpaul Lin static inline int 41900f892fcSMacpaul Lin isa_check_signature(unsigned long io_addr, const unsigned char *signature, 42000f892fcSMacpaul Lin int length) 42100f892fcSMacpaul Lin { 42200f892fcSMacpaul Lin int retval = 0; 42300f892fcSMacpaul Lin do { 42400f892fcSMacpaul Lin if (isa_readb(io_addr) != *signature) 42500f892fcSMacpaul Lin goto out; 42600f892fcSMacpaul Lin io_addr++; 42700f892fcSMacpaul Lin signature++; 42800f892fcSMacpaul Lin length--; 42900f892fcSMacpaul Lin } while (length); 43000f892fcSMacpaul Lin retval = 1; 43100f892fcSMacpaul Lin out: 43200f892fcSMacpaul Lin return retval; 43300f892fcSMacpaul Lin } 43400f892fcSMacpaul Lin 43500f892fcSMacpaul Lin #else /* __mem_isa */ 43600f892fcSMacpaul Lin 43700f892fcSMacpaul Lin #define isa_readb(addr) (__readwrite_bug("isa_readb"), 0) 43800f892fcSMacpaul Lin #define isa_readw(addr) (__readwrite_bug("isa_readw"), 0) 43900f892fcSMacpaul Lin #define isa_readl(addr) (__readwrite_bug("isa_readl"), 0) 44000f892fcSMacpaul Lin #define isa_writeb(val, addr) __readwrite_bug("isa_writeb") 44100f892fcSMacpaul Lin #define isa_writew(val, addr) __readwrite_bug("isa_writew") 44200f892fcSMacpaul Lin #define isa_writel(val, addr) __readwrite_bug("isa_writel") 44300f892fcSMacpaul Lin #define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io") 44400f892fcSMacpaul Lin #define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio") 44500f892fcSMacpaul Lin #define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio") 44600f892fcSMacpaul Lin 44700f892fcSMacpaul Lin #define isa_eth_io_copy_and_sum(a, b, c, d) \ 44800f892fcSMacpaul Lin __readwrite_bug("isa_eth_io_copy_and_sum") 44900f892fcSMacpaul Lin 45000f892fcSMacpaul Lin #define isa_check_signature(io, sig, len) (0) 45100f892fcSMacpaul Lin 45200f892fcSMacpaul Lin #endif /* __mem_isa */ 453b3666a69SPaul Burton 454b3666a69SPaul Burton #include <asm-generic/io.h> 455b3666a69SPaul Burton 45600f892fcSMacpaul Lin #endif /* __KERNEL__ */ 45700f892fcSMacpaul Lin #endif /* __ASM_NDS_IO_H */ 458