xref: /openbmc/u-boot/arch/nds32/cpu/n1213/ag101/cpu.c (revision e11ef3d2)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2002
4  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
5  * Marius Groeger <mgroeger@sysgo.de>
6  *
7  * (C) Copyright 2002
8  * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
9  *
10  * Copyright (C) 2011 Andes Technology Corporation
11  * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
12  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
13  */
14 
15 /* CPU specific code */
16 #include <common.h>
17 #include <command.h>
18 #include <watchdog.h>
19 #include <asm/cache.h>
20 
21 #include <faraday/ftwdt010_wdt.h>
22 
23 /*
24  * cleanup_before_linux() is called just before we call linux
25  * it prepares the processor for linux
26  *
27  * we disable interrupt and caches.
28  */
29 int cleanup_before_linux(void)
30 {
31 	disable_interrupts();
32 
33 	/* turn off I/D-cache */
34 	cache_flush();
35 	icache_disable();
36 	dcache_disable();
37 	return 0;
38 }
39 
40 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
41 {
42 	disable_interrupts();
43 
44 	/*
45 	 * reset to the base addr of andesboot.
46 	 * currently no ROM loader at addr 0.
47 	 * do not use reset_cpu(0);
48 	 */
49 #ifdef CONFIG_FTWDT010_WATCHDOG
50 	/*
51 	 * workaround: if we use CONFIG_HW_WATCHDOG with ftwdt010, will lead
52 	 * automatic hardware reset when booting Linux.
53 	 * Please do not use CONFIG_HW_WATCHDOG and WATCHDOG_RESET() here.
54 	 */
55 	ftwdt010_wdt_reset();
56 	while (1)
57 		;
58 #endif /* CONFIG_FTWDT010_WATCHDOG */
59 
60 	/*NOTREACHED*/
61 }
62